cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
should be changed to GPIO_ACTIVE_HIGH.
Otherwise, the SD may not work properly due to wrong polarity inversion
specified in DT after switch to common parsing function mmc_of_parse().
Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com>
Acked-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
should be changed to GPIO_ACTIVE_HIGH.
Otherwise, the SD may not work properly due to wrong polarity inversion
specified in DT after switch to common parsing function mmc_of_parse().
Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com>
Acked-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
should be changed to GPIO_ACTIVE_HIGH.
Otherwise, the SD may not work properly due to wrong polarity inversion
specified in DT after switch to common parsing function mmc_of_parse().
Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com>
Acked-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Commit 2ae416b1 ("mm: new mm hook framework") introduced an empty
header file (mm-arch-hooks.h) for every architecture, even those which
doesn't need to define mm hooks.

As suggested by Geert Uytterhoeven, this could be cleaned through the use
of a generic header file included via each per architecture
asm/include/Kbuild file.

The PowerPC architecture is not impacted here since this architecture has
to defined the arch_remap MM hook.
Signed-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com>
Suggested-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NVineet Gupta <vgupta@synopsys.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Switch to my kernel.org alias instead of a badly named gmail address,
which I rarely use.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fengguang Wu reports that building ARM with !MMU results in the
following build error:

   arch/arm/kernel/built-in.o: In function `__soft_restart':
>> :(.text+0x1624): undefined reference to `arch_virt_to_idmap'

Fix this by adding an appropriate IS_ENABLED(CONFIG_MMU) into the
__virt_to_idmap() inline function.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We must invalidate the L1 cache before enabling coherency, otherwise
secondary CPUs can inject invalid cache lines into the coherent CPU
cluster, which could then be migrated to other CPUs.  This fixes a
recent regression with SoCFPGA randomly failing to boot.

Fixes: 02b4e275 ("ARM: v7 setup function should invalidate L1 cache")
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

nr_bitmaps member of mapping structure stores the number of already
allocated bitmaps and it is interpreted as loop iterator (it starts from
0 not from 1), so a comparison against number of possible bitmap
extensions should include this fact. This patch fixes this by changing
the extension failure condition. This issue has been introduced by
commit 4d852ef8 ("arm: dma-mapping: Add
support to extend DMA IOMMU mappings").
Reported-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: NHyungwon Hwang <human.hwang@samsung.com>
Cc: stable@vger.kernel.org  # v3.15+
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It's possible, albeit unlikely, that using the of_node here will
reference freed memory. Call of_node_put() after printing the
name to be safe.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch is to get correct physical address of the reset function for
PAE systems, which use aliased physical memory for booting.

See the "ARM: mm: Introduce virt_to_idmap() with an arch hook" for details.
Signed-off-by: NVitaly Andrianov <vitalya@ti.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Now that PCIe DT binding is disabled in SoC specific DTS,
we need a way to override it in a board specific DTS. So
rename the PCIe nodes accordingly.
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>

Currently PCIe DT bindings are broken. PCIe driver can't function
without having a SerDes driver that provide the phy configuration.
On K2E EVM, this causes problem since the EVM has Marvell SATA
controller present and with default values in the SerDes register,
it seems to pass the PCIe link check, but causes issues since
the configuration is not correct. The manifestation is that when
EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable
PCIe on this EVM since to work, SerDes driver has to be present as
well. So by default, the PCIe DT binding should be disabled in SoC
specific DTS. It can be enabled in the board specific DTS when the
SerDes device driver is also present.

So fix the status of PCIe DT bindings in the SoC specific DTS to
"disabled". To enable PCIe, the status should be set to "ok" in
the EVM DTS file when SerDes driver support becomes available in
the upstream tree.
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NSantosh Shilimkar <ssantosh@kernel.org>

Since dm9000 driver added support for a vcc regulator, platform data
based platforms have their ethernet broken, as the regulator claiming
returns -EPROBE_DEFER and prevents dm9000 loading.

This patch fixes this for all pxa boards using dm9000, by using the
specific regulator_has_full_constraints() function.

This was discovered and tested on the cm-x300 board.

Fixes: 7994fe55 ("dm9000: Add regulator and reset support to dm9000")
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

Audio-in was incorrectly routed to Line In. It should be Mic3L as per
schematic.

Using mic-bias voltage at 2.0v (<0x1>) does not work for some reason. There
is no voltage seen on micbias (R127). Mic-bias voltage of 2.5v (<0x2>) works.
I see voltage of 2.475v across GND and micbias.

With these changes, I can record audio with a pair of proliferate TRRS earbuds.
Signed-off-by: NAdam YH Lee <adam.yh.lee@gmail.com>
Acked-by: NAsh Charles <ashcharles@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

CONFIG_HAVE_ARM_SCU only gets selected if CONFIG_SMP is selected in an OMAP
system, however AM43XX needs this option regardless of CONFIG_SMP and also
for an AM43XX only build as it is important for controlling power in the SoC.
Without this we cannot suspend the CPU for SoC suspend or cpuidle. The
ARM Cortex A9 needs SCU CPU Power Status bits to be set to off mode in order
for the PRCM to transition the MPU to low power modes.
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Ux500 is regressing due to commit
a21763a0
"pinctrl: nomadik: activate strict mux mode" which disallows
Nomadik GPIO 5 to be muxed in as a level shifter voltage select
pin, as it is currently described as being used for RX on UART1.

The behaviour is correct, instead the hardware config has been
incorrecly specified: UART1 is indeed unused on HREFv60plus and
Snowball and that is why HREFv60plus can use the pins it would
normally occupy as the voltage select line for the MMC/SD
levelshifter (Snowball uses it for I2C4).

The reason UART1 was anyway enabled on these platforms was
probably to secure the port enumeration to userspace. This
can be solved by using aliases (done in a separate patch) so
we can now deactivate UART1 and let MMC/SD use it properly
on HREFv60plus. We explicitly activate it only for the
older HREFprev60 board.

To complete, we set up the pin configuration for these pins
properly in the sdi0 node.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This enumerates the PL011 serial ports on the Ux500. This is
necessary to do if we want to remove one of the serial ports,
since userspace depends on console to be present on ttyAMA2
and we must not break userspace.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add missing #iommu-cells property to the DSP and IPU IOMMU nodes
for OMAP5 platforms. This property is required as per the generic
iommu binding.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add missing #iommu-cells property to the DSP and IPU IOMMU nodes
for OMAP4 platforms. This property is required as per the generic
iommu binding.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The device tree for Gumstix Pepper has DCDC2 and
DCDC3 correctly labelled but the upper limit values
are wrong. The confusion is due to the hardware
quirk where the DCDC2 and DCDC3 wires are flipped
in Pepper.
Signed-off-by: NArun Bharadwaj <arun@gumstix.com>
Tested-by: NAsh Charles <ashcharles@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Boot process is halting in midway because some of the necessary voltage
regulators are deemed unused and subsequently powered off, leading to
a completely unresponsive system.

Most of the device nodes had correct voltage regulator attachments.
Yet these nodes had to set stricter enforcement on them through
'regulator-boot-on' and 'regulator-always-on' to function correctly.

The consumers of the regulators this commit affect are the followings:

	DCDC1: vdd_1v8 system supply, USB-PHY, and ADC
	DCDC2: Core domain
	DCDC3: MPU core domain
	 LDO1: RTC
	 LDO2: 3v3 IO domain
	 LDO3: USB-PHY; not a boot-time requirement
	 LDO4: LCD [16:23]

All but LDO3 need to be always-on for the system to be functional.

Additionally regulator-name properties have been added for the kernel to
display the name from the schematic. This will improve diagnostics.
Signed-off-by: NAdam YH Lee <adam.yh.lee@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

For Gumstix Overo COMs, the u-boot bootloader typically passes an
argument specifying the default display via the omapdss.def_disp
parameter.  When a default display is specified, DSS2 tries to match
this name with either the device tree label (e.g. label=dvi) or,
failing this, the device tree alias (e.g. label=display0). Update the
panel names for the 'lcd43' and 'lcd35' displays in the device tree
such that they match the names passed by u-boot.
Signed-off-by: NAsh Charles <ashcharles@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add support for 4 Japanese keys
Signed-off-by: NChris Zhong <zyw@rock-chips.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Driver core sets "default" pinmux on on probe and CAN driver
sets "sleep" pinmux during register. This causes a small window
where the CAN pins are in "default" state with the DCAN module
being disabled.

Change the "default" state to be like sleep so this glitch is
avoided. Add a new "active" state that is used by the driver
when CAN is actually active.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>

The CCI device node was added to vexpress CA15_A7(i.e. TC2) much before
the CCI PMU support and binding was added. This patch adds the missing
PMU node so that CCI PMUs can be used on TC2.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NPunit Agrawal <punit.agrawal@arm.com>
Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

The dts for the CoreTile Express A15x2 A7x3 (TC2) only describes the
PMUs of the Cortex-A15 CPUs, and not the Cortex-A7 CPUs.

Now that we have a mechanism for describing disparate PMUs and their
interrupts in device tree, this patch makes use of these to describe the
PMUs for all CPUs in the system. For consistency, the existing A15 PMU
interrupt-affinity property is reflowed across two lines.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NWill Deacon <will.deacon@arm.com>
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

If CONFIG_PM is not set the PU power domain needs to be enabled always,
otherwise there are two failure scenarios which will hang the system if
one of the devices in the PU domain is accessed.

1. New DTs (4.1+) drop the "always-on" property from the PU regulator, so
if it isn't properly enabled by the GPC code it will be disabled at the
end of boot.

2. If the bootloader already disabled the PU domain the GPC explicitly
needs to enable it again, even if the kernel doesn't do any power
management. This is a bit hypothetical, as it requires to boot a
mainline kernel on a downstream bootloader, as no mainline bootloader
disables the PM domains.

Cc: <stable@vger.kernel.org> # 4.1
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Correct HSYNC/VSYNC pins and add ddc-i2c-bus property
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

In order to get iio-hwmon support, the lradc must be declared as an
iio provider. So fix this issue by adding the #io-channel-cells property.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Fixes: bd798f9c ("ARM: dts: mxs: Add iio-hwmon to mx23 soc")
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

include/soc/imx/timer.h describes well the different versions of
the GPT block among the imx family:

enum imx_gpt_type {
	GPT_TYPE_IMX1,		/* i.MX1 */
	GPT_TYPE_IMX21,		/* i.MX21/27 */
	GPT_TYPE_IMX31,		/* i.MX31/35/25/37/51/6Q */
	GPT_TYPE_IMX6DL,	/* i.MX6DL/SX/SL */
};

So the proper compatible string for the MX27 case should be
"fsl,imx21-gpt".
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NPhilippe Reynes <tremyfr@gmail.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch reorders the nodes alphabetically
Signed-off-by: NWalter Lozano <walter@vanguardiasur.com.ar>
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>

This patch fixes the formating of DTS bindings for the adxl34x digital
accelerometer, and updates the compatible string after the deprecation
of "adxl345x" compatible string.
Signed-off-by: NWalter Lozano <walter@vanguardiasur.com.ar>
Acked-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>

When DSS nodes were added to am4372.dtsi, the rfbi node was not marked
as disabled. This should have been done, as the rule of thumb is to
disable all DSS nodes that are not used, and especially rfbi, as we
don't have a driver for rfbi.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Without this USB2 breaks if USB1 is disabled or USB1
initializes after USB2 e.g. due to deferred probing.

Fixes: 5a0f93c6 ("ARM: dts: Add am57xx-beagle-x15")
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Cc: stable@vger.kernel.org (v3.19+)
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add node for TI AM4372 EMIF. Without this we get a warning with the
recent commit fabbe6df (ARM: OMAP: AM43xx hwmod: Add data for am43xx
emif hwmod).
Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
Tested-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This reverts commit 3d76be5b.

The latest revision of Beaglebone Black does not support RTC-only mode.

To avoid potential hardware damage, RTC-only mode was disabled by
default by commit 7a6cb0ab ("ARM: dts: am335x-boneblack: disable
RTC-only sleep to avoid hardware damage").

Unfortunately, an incorrect fix had already been applied, which instead
of just disabling RTC-only mode, prevents the Beaglebone from powering
down at all.

Revert this patch to fix the power-off regression.
Signed-off-by: NJohan Hovold <johan@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Now that we have simplefb support, we can enable it in our defconfig. Also
enable the framebuffer console, so that we are sure that we actually get
something displayed in any case.

And while we're at it, enable the module support.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Commit b2b3a8b9 ("power/reset: Remove sun6i reboot driver") removed
the sun6i reboot driver. But sunxi_defconfig and multi_v7_defconfig
still contain the symbol CONFIG_POWER_RESET_SUN6I that was deprecated
by that commit, so remove it.
Signed-off-by: NTimo Sigurdsson <public_timo.s@silentcreek.de>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add machine support for the Allwinner A33 quad core cortex-a7 based SoC,
which is similar to the A23 SoC.
Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NChen-Yu Tsai <wens@csie.org>

The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar
to other sun8i family SoCs like the A23.
Signed-off-by: NJens Kuske <jenskuske@gmail.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>