ARM: v7 setup function should invalidate L1 cache
All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NThierry Reding <treding@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NMichal Simek <michal.simek@xilinx.com> Tested-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Showing
arch/arm/mach-bcm/brcmstb.h
已删除
100644 → 0
arch/arm/mach-hisi/headsmp.S
已删除
100644 → 0
arch/arm/mach-tegra/headsmp.S
已删除
100644 → 0
想要评论请 注册 或 登录