- 25 1月, 2013 1 次提交
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由 Bastian Hecht 提交于
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 11月, 2012 2 次提交
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由 Nobuhiro Iwamatsu 提交于
This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7377 support. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Nobuhiro Iwamatsu 提交于
This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7367 support. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 30 10月, 2012 2 次提交
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由 Nobuhiro Iwamatsu 提交于
This machine is using old CPU of shmobile (sh7377) and cannot obtain machine, either. Therefore, remove G4EVM support. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Nobuhiro Iwamatsu 提交于
This machine is using old CPU of shmobile (SH7367) and cannot obtain machine, either. Therefore, remove G3EVM support. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 04 9月, 2012 1 次提交
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由 Rafael J. Wysocki 提交于
The role of the only function in the common.c file in arch/arm/mach-shmobile, shmobile_init_late(), is to call two initializers whose definitions depend on kernel configuration options. Those initializers may very well be called from a static inline function in arm/mach-shmobile/include/mach/common.h, though, in which makes the code a bit easier to read. Moreover, the common.c may be dropped entirely then. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NMagnus Damm <damm@opensource.se>
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- 07 7月, 2012 2 次提交
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由 Kuninori Morimoto 提交于
This patch adds basic A4S pm domain support. Now, below devices can be controled by PM Common-SHwy, Common-HPB, BSC, MFI, MMFROM, HS-SHwy, SYS-HPB, INTCA, DBSC, DDRPHY (Logic), ATAPI, GbEther, AXI-bus Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
This patch adds Renesas R-mobile series common PM domain APIs. R-mobile CPU can use/switch this API Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 18 5月, 2012 3 次提交
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由 Magnus Damm 提交于
This is V3 of Emma Mobile EV2 SMP support. At this point only the most basic form of SMP operation is supported. TWD and CPU Hotplug support is excluded. Tied to both the Emma Mobile EV2 and the KZM9D board due to the need to switch on board in platsmp.c and the newly introduced need for static mappings. The static mappings are needed to allow hardware acces early during boot when SMP is initialized. This early requirement forces us to also map in the SMU registers. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
V3 of basic KZM9D board support. At this point a quite thin layer that makes use of the Emma Mobile EV2 SoC code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This is V3 of the Emma Mobile EV2 SoC support. Included here is support for serial and timer devices which is just about enough to boot a kernel. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 13 5月, 2012 2 次提交
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由 Kuninori Morimoto 提交于
This adds very basic KZM-A9-GT board (SH73a0) support Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
This adds very basic armadillo800eva board (R-Mobile A1) support Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 08 5月, 2012 1 次提交
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由 Shawn Guo 提交于
Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMagnus Damm <damm@opensource.se> Acked-by: N"Rafael J. Wysocki" <rjw@sisk.pl>
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- 13 3月, 2012 1 次提交
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由 Marc Zyngier 提交于
Add support for the new smp_twd runtime registration interface to the shmobile platforms, and remove the old compile-time support. Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 12 1月, 2012 1 次提交
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由 Magnus Damm 提交于
This patch contains r8a7779 SMP support V3 - now including CPU hotplug offine and online support. The r8a7779 power domain code is tied together with SMP glue code which allows us to control the power domains via CPU hotplug. At this point the kernel boots with the 4 Cortex-A9 cores in SMP mode and all CPU cores except CPU0 can be hotplugged. The code in platsmp.c is quite far from pretty, but it is kept like that intentionally to avoid creating layers of code that will go away in the near future anyway. The code needs to be updated when some per-SoC handling code will be added to the ARM architecture, see the following patch for more information: "[RFC PATCH 0/3] Per SoC descriptor" Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 10 1月, 2012 1 次提交
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由 Magnus Damm 提交于
Add power domain control support for the r8a7779 SoC V2. This adds support for 4 power domains for I/O Devices together with code that can be used for CPU cores as well. The only out of the ordinary experience is the need for ioremap() of SYSC registers. Because of that we need to execute some init function before setting up the domains. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 09 1月, 2012 2 次提交
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由 Magnus Damm 提交于
Add GPIO-only r8a7779 PFC support V2. Only regular GPIOs are supported at this time. GPIO_FN are not supported because they require variable bit width support in be the shared pfc code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Initial support for the r8a7779 SoC and the Marzen board (V2). Only SCIF ports and the TMU are supported at this point. To keep things simple only entity-mapped virt-to-phys mappings are supported. This forces drivers and other SoC glue code to make use of ioremap(). We cannot support early serial console due to virtual address space collisions with the ARM kernel. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 16 11月, 2011 1 次提交
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由 Marc Zyngier 提交于
Convert the SMP shmobile platforms to use gic_handle_irq() instead of the assembly macro. Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 11 11月, 2011 5 次提交
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由 Kuninori Morimoto 提交于
This adds basic bonito board (R-Mobile A1) support Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
R8A7740 GIC can not get external IRQx interrupt directly without GIC - INTC demux support. Current AG5 is using GIC - INTCS demux with special irq relocation. but GIC - INTCA demux is still not supported and it needs irq number re-mapping. OTOH, normal INTC support as before is very enough for R8A7740, because it is not SMP CPU. This patch adds INTCA/INTCS support instead of GIC. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
This adds PFC support for the R8A7740 (R-Mobile A1) CPU This patch is based on v0.1 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Kuninori Morimoto 提交于
This adds preliminary support for the R8A7740 (R-Mobile A1) CPU Timer, serial, gic, clock are supported at this point. This patch is based on v0.1 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
The runtime PM platform support stub in use by ARM-based SH/R-Mobile platforms contains nothing that's specifically ARM-related and instead of wholly generic to anything using the clock framework. The recent runtime PM changes interact rather badly with the lazy disabling of clocks late in the boot process through the clock framework, leading to situations where the runtime suspend/resume paths are entered without a clock being actively driven due to having been lazily gated off. In order to correct this we can trivially tie in the aforementioned stub as a general fallback for all SH platforms that don't presently have their own runtime PM implementations (the corner case being SH-based SH-Mobile platforms, which have their own stub through the hwblk API -- which in turn has bitrotted and will be subsequently adapted to use the same stub as everyone else), regardless of whether the platforms choose to define power domains of their own or not. This fixes up regressions for clock framework users who also build in runtime PM support without any specific power domains of their own, which was previously causing the serial console to be lost when warring with lazy clock disabling. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 29 8月, 2011 1 次提交
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由 Magnus Damm 提交于
Kota2 base board support including the on-chip SCIFA2 serial console and the on-board SMSC911X ethernet port. The s73a0 SMP bits are also updated to include Kota2. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 25 5月, 2011 3 次提交
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由 Magnus Damm 提交于
This patch adds a shared SH-Mobile ARM specific CPUIdle implementation supporting WFI only at this point. It serves as a common point for late registration of the arch-specific CPUIdle code, and supports adding extra sleep modes using the callback shmobile_cpuidle_setup() together with shmobile_cpuidle_modes[]. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add sh7372 Core Standby sleep mode support and tie it in with the shared SH-Mobile ARM suspend code. The Core Standby mode is the lightest sh7372-specific sleep mode, cutting power to the ARM core excluding the L2 cache. Any interrupt source can be used for wakeups. The low level portion of this code is based on the TI OMAP sleep code in sleep34xx.S, thanks to them. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
This patch adds a simple Suspend-to-RAM implementation for SH-Mobile ARM. The struct shmobile_suspend_ops are kept global to allow cpu-specific code to override the callbacks if needed. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 07 1月, 2011 2 次提交
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由 Magnus Damm 提交于
Break-out GIC specific IRQ demux code from the file entry-macro-intc.S and register during run-time. Covers sh73a0. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Break-out INTC specific IRQ demux code from the file entry-macro-intc.S and register during run-time. Covers sh7367, sh7377 and sh7372. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 22 12月, 2010 1 次提交
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由 Magnus Damm 提交于
Add INTCS support for the sh73a0 processor. The interrupts on the sh73a0 processor are managed through controllers such as GIC, INTCS and INTCA. The ARM cores use the GIC as primary interrupt controller and the INTCS and INTCA are hanging off the GIC as cascaded interrupt controllers. Peripherals connected both to the GIC and the INTC controllers should if possible only use the GIC. If no GIC connection is available then INTCS and INTCA may be used instead. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 14 12月, 2010 3 次提交
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由 Magnus Damm 提交于
Add SMP support for ag5evm and the sh73a0 processor. Onlining and offlining works well, but at this point offlined processor cores are not put into sleep mode. There is no spinlock for syncing the secondary core with the first one in this implementation. The code instead relies on the cpu_online() check in __cpu_up(). Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Add SMP base support for R-Mobile / SH-Mobile processors. This patch contains all base code to support CONFIG_SMP regardless of ARCH_SHMOBILE processor type. Both local timer and CPU hotplug are supported, but no processor specific code is included. At this point only the default behavior is in place, so a single core will always be used even though CONFIG_SMP is enabled on multicore systems. The SMP Kconfig entry for arch/arm/Kconfig is excluded from this patch to simplify merging. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Compiling in multiple CPUs into the same kernel binary requires a Makefile update. With this patch in place it is possible to enable the pinmux code for both the SH7372 and the SH7377. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 29 11月, 2010 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 19 11月, 2010 1 次提交
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由 Takashi YOSHII 提交于
PFC definitions for sh73a0 to support GPIO and pinmux handling. Signed-off-by: NTakashi YOSHII <takashi.yoshii.zj@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 18 11月, 2010 1 次提交
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由 Magnus Damm 提交于
This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 16 8月, 2010 1 次提交
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由 Magnus Damm 提交于
This is the SH-Mobile ARM Runtime PM implementation V3. Only clocks are managed at this point. If Runtime PM is disabled then the clocks will be enabled before ->probe() and disabled after ->remove(). Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 22 5月, 2010 1 次提交
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由 Magnus Damm 提交于
This patch is V2 of clock framework tables/code for sh7377. MSTP support is included for the following hardware blocks: KEYSC, SCIF, IIC, IRDA, FLCTL, USB, SDHI and UIO. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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