1. 25 1月, 2013 1 次提交
  2. 06 11月, 2012 2 次提交
  3. 30 10月, 2012 2 次提交
  4. 04 9月, 2012 1 次提交
  5. 07 7月, 2012 2 次提交
  6. 18 5月, 2012 3 次提交
  7. 13 5月, 2012 2 次提交
  8. 08 5月, 2012 1 次提交
  9. 13 3月, 2012 1 次提交
  10. 12 1月, 2012 1 次提交
    • M
      ARM: mach-shmobile: r8a7779 SMP support V3 · f40aaf6d
      Magnus Damm 提交于
      This patch contains r8a7779 SMP support V3 - now including
      CPU hotplug offine and online support. The r8a7779 power
      domain code is tied together with SMP glue code which allows
      us to control the power domains via CPU hotplug.
      
      At this point the kernel boots with the 4 Cortex-A9 cores in
      SMP mode and all CPU cores except CPU0 can be hotplugged.
      
      The code in platsmp.c is quite far from pretty, but it is
      kept like that intentionally to avoid creating layers of
      code that will go away in the near future anyway. The code
      needs to be updated when some per-SoC handling code will be
      added to the ARM architecture, see the following patch for
      more information:
       "[RFC PATCH 0/3] Per SoC descriptor"
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      f40aaf6d
  11. 10 1月, 2012 1 次提交
  12. 09 1月, 2012 2 次提交
  13. 16 11月, 2011 1 次提交
  14. 11 11月, 2011 5 次提交
  15. 29 8月, 2011 1 次提交
  16. 25 5月, 2011 3 次提交
  17. 07 1月, 2011 2 次提交
  18. 22 12月, 2010 1 次提交
    • M
      ARM: mach-shmobile: sh73a0 INTCS support · 5f53a56a
      Magnus Damm 提交于
      Add INTCS support for the sh73a0 processor.
      
      The interrupts on the sh73a0 processor are managed
      through controllers such as GIC, INTCS and INTCA.
      
      The ARM cores use the GIC as primary interrupt
      controller and the INTCS and INTCA are hanging off
      the GIC as cascaded interrupt controllers.
      
      Peripherals connected both to the GIC and the INTC
      controllers should if possible only use the GIC.
      
      If no GIC connection is available then INTCS and
      INTCA may be used instead.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      5f53a56a
  19. 14 12月, 2010 3 次提交
  20. 29 11月, 2010 1 次提交
  21. 19 11月, 2010 1 次提交
  22. 18 11月, 2010 1 次提交
    • M
      ARM: mach-shmobile: Initial AG5 and AG5EVM support · 6d9598e2
      Magnus Damm 提交于
      This patch adds initial support for Renesas SH-Mobile AG5.
      
      At this point the AG5 CPU support is limited to the ARM
      core, SCIF serial and a CMT timer together with L2 cache
      and the GIC. The AG5EVM board also supports Ethernet.
      
      Future patches will add support for GPIO, INTCS, CPGA
      and platform data / driver updates for devices such as
      IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
      
      The code in entry-macro.S will be cleaned up when the
      ARM IRQ demux code improvements have been merged.
      
      Depends on the AG5EVM mach-type recently registered but
      not yet present in arch/arm/tools/mach-types.
      
      As the AG5EVM board comes with 512MiB memory it is
      recommended to turn on HIGHMEM.
      
      Many thanks to Yoshii-san for initial bring up.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6d9598e2
  23. 16 8月, 2010 1 次提交
  24. 22 5月, 2010 1 次提交