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    ARM: mach-shmobile: sh73a0 INTCS support · 5f53a56a
    Magnus Damm 提交于
    Add INTCS support for the sh73a0 processor.
    
    The interrupts on the sh73a0 processor are managed
    through controllers such as GIC, INTCS and INTCA.
    
    The ARM cores use the GIC as primary interrupt
    controller and the INTCS and INTCA are hanging off
    the GIC as cascaded interrupt controllers.
    
    Peripherals connected both to the GIC and the INTC
    controllers should if possible only use the GIC.
    
    If no GIC connection is available then INTCS and
    INTCA may be used instead.
    Signed-off-by: NMagnus Damm <damm@opensource.se>
    Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
    5f53a56a
Makefile 906 字节