- 25 1月, 2013 8 次提交
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由 Bastian Hecht 提交于
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
sh7372_add_early_devices_dt() and sh7372_add_standard_devices_dt() are defined as global functions in arch/arm/mach-shmobile/setup-sh7372.c, but their declarations are missing. Add them to common.h, where similar functions for this and other SoC types are already declared. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Guennadi Liakhovetski 提交于
According to the Cortex A8 TRM the L2 cache should be first cleaned and then disabled. Fix the swapped order on sh7372. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
When booting with DT, devices are named differently. To get their clocks additional entries have to be added to the lookup table. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Magnus Damm 提交于
Use sh73a0_set_wake() for external IRQ signals on sh73a0. The sh73a0 IRQ hardware for external IRQ pins consists of the INTCA interrupt controller and the GIC together doing their best to limp along. These external IRQ pins are treated as a special case where interrupts need to be managed in both interrupt controllers in parallel. The ->irq_set_wake() callback for the external IRQ pins can be dealt with in the same way as INTCA-only without involving the GIC. So this patch updates the external IRQ pin code for sh73a0 to no longer involve the GIC. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
div4_clks's bitmap of sh73a0 was wrong. This patch is based on v2.0 datasheet. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
This patch enabled TMU0 timer on r8a7740. But TMU1 timer is not supported yet Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Sachin Kamat 提交于
linux/dma-mapping.h was included twice. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 1月, 2013 3 次提交
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由 Rob Herring 提交于
Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
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由 Rob Herring 提交于
Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
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由 Rob Herring 提交于
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 11 1月, 2013 1 次提交
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由 Rob Herring 提交于
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
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- 25 12月, 2012 1 次提交
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由 Stephen Warren 提交于
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 12月, 2012 1 次提交
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由 Kuninori Morimoto 提交于
6e20a0a4 (gpio: pcf857x: enable gpio_to_irq() support) added gpio_to_irq() support on pcf857x driver, but it used pdata->irq. This patch modifies driver to use client->irq instead of it. It modifies kzm9g board platform settings, and device probe information too. This patch is tested on kzm9g board Reported-by: NChristian Engelmayer <christian.engelmayer@frequentis.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 11月, 2012 5 次提交
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由 Laurent Pinchart 提交于
Don't hook up brightness control in the display on/off operations, use the backlight API instead. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms@verge.net.au>
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms@verge.net.au>
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms@verge.net.au>
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms@verge.net.au>
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由 Laurent Pinchart 提交于
Reference the MIPI-DSI transceiver in the LCDC platform data and make sure it gets registered before the LCDC. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms@verge.net.au>
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- 20 11月, 2012 1 次提交
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由 Bastian Hecht 提交于
Since commit 3c7ea4ec (mtd: sh_flctl: Add support for error IRQ) the sh_flctl driver requires the error IRQ line to signal failed transactions between the flash controller and the NAND chip. This information is mandatory - else the driver refuses to start up. We provide it here for the board mackerel. Signed-off-by: NBastian Hecht <hechtb@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 13 11月, 2012 4 次提交
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由 Marek Szyprowski 提交于
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> CC: Paul Mundt <lethal@linux-sh.org> CC: Magnus Damm <magnus.damm@gmail.com>
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由 Simon Horman 提交于
This reverts commit cdc7594e. The code changes the flags of the wrong cpus - which breaks the whole bootup of secondary CPUs. Cc: Bastian Hecht <hechtb@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Simon Horman 提交于
This reverts commit e7212951. The code changes the flags of the wrong cpus - which breaks the whole bootup of secondary CPUs. Cc: Bastian Hecht <hechtb@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Simon Horman 提交于
This reverts commit 865d90f8. The code changes the flags of the wrong cpus - which breaks the whole bootup of secondary CPUs. Cc: Bastian Hecht <hechtb@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 08 11月, 2012 14 次提交
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由 Kuninori Morimoto 提交于
FSI's external clock is controled by FSI driver. Global sh7372_fsiXck_clk is no-longer needed now. But it needs to set external clock rate by platform, so, this patch supports clk_get() interface. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
fsidivx clock is no longer needed. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Current FSI driver can control audio clock without platform call-back functions This patch removed board-specific call-back/settings Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Current FSI driver can control audio clock without platform call-back functions This patch removed board-specific call-back/settings Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Current FSI driver can control audio clock without platform call-back functions This patch removed board-specific call-back/settings Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
This patch supports CN21/CN22 USB 1.x (port 0/1/2), and enable input event on defconfig Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
This patch supports CN21/CN22 USB 2.0 (port 0/1/2), and enable USB momery on defconfig Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
xcka/xckb were required from FSI driver Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
xcka/xckb were required from FSI driver Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Now, sh7372 can use sh_clk_fsidiv_register() for FSI-DIV clocks. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
Not only sh7372 but also many Renesas chip has FSI-DIV clock, and we can share its sh_clk_ops. To support common FSI-DIV clock, sh7372_fsidivX_clk becomes non-global by this patch. This is preparation for FSI DT support. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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- 07 11月, 2012 2 次提交
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由 Kuninori Morimoto 提交于
ohci-platform driver require these clocks Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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由 Kuninori Morimoto 提交于
ehci-platform driver require these clocks Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms@verge.net.au>
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