提交 b82ca578 编写于 作者: L Lars-Peter Clausen 提交者: Mark Brown

ASoC: ad193x: Use snd_soc_update_bits where appropriate

We can reduce the code size here a bit by using snd_soc_update_bits instead of
open-coding the read-modify-write cycle. The conversion done in this patch is
not completely straightforward and some minor code restructuring has been
incorporated to further reduce the code size.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
上级 0718fd27
master alk-4.19.24 alk-4.19.30 alk-4.19.34 alk-4.19.36 alk-4.19.43 alk-4.19.48 alk-4.19.57 ck-4.19.67 ck-4.19.81 ck-4.19.91 github/fork/deepanshu1422/fix-typo-in-comment github/fork/haosdent/fix-typo linux-next v4.19.91 v4.19.90 v4.19.89 v4.19.88 v4.19.87 v4.19.86 v4.19.85 v4.19.84 v4.19.83 v4.19.82 v4.19.81 v4.19.80 v4.19.79 v4.19.78 v4.19.77 v4.19.76 v4.19.75 v4.19.74 v4.19.73 v4.19.72 v4.19.71 v4.19.70 v4.19.69 v4.19.68 v4.19.67 v4.19.66 v4.19.65 v4.19.64 v4.19.63 v4.19.62 v4.19.61 v4.19.60 v4.19.59 v4.19.58 v4.19.57 v4.19.56 v4.19.55 v4.19.54 v4.19.53 v4.19.52 v4.19.51 v4.19.50 v4.19.49 v4.19.48 v4.19.47 v4.19.46 v4.19.45 v4.19.44 v4.19.43 v4.19.42 v4.19.41 v4.19.40 v4.19.39 v4.19.38 v4.19.37 v4.19.36 v4.19.35 v4.19.34 v4.19.33 v4.19.32 v4.19.31 v4.19.30 v4.19.29 v4.19.28 v4.19.27 v4.19.26 v4.19.25 v4.19.24 v4.19.23 v4.19.22 v4.19.21 v4.19.20 v4.19.19 v4.19.18 v4.19.17 v4.19.16 v4.19.15 v4.19.14 v4.19.13 v4.19.12 v4.19.11 v4.19.10 v4.19.9 v4.19.8 v4.19.7 v4.19.6 v4.19.5 v4.19.4 v4.19.3 v4.19.2 v4.19.1 v4.19 v4.19-rc8 v4.19-rc7 v4.19-rc6 v4.19-rc5 v4.19-rc4 v4.19-rc3 v4.19-rc2 v4.19-rc1 ck-release-21 ck-release-20 ck-release-19.2 ck-release-19.1 ck-release-19 ck-release-18 ck-release-17.2 ck-release-17.1 ck-release-17 ck-release-16 ck-release-15.1 ck-release-15 ck-release-14 ck-release-13.2 ck-release-13 ck-release-12 ck-release-11 ck-release-10 ck-release-9 ck-release-7 alk-release-15 alk-release-14 alk-release-13.2 alk-release-13 alk-release-12 alk-release-11 alk-release-10 alk-release-9 alk-release-7
无相关合并请求
......@@ -123,35 +123,29 @@ static int ad193x_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
unsigned int rx_mask, int slots, int width)
{
struct snd_soc_codec *codec = dai->codec;
int dac_reg = snd_soc_read(codec, AD193X_DAC_CTRL1);
int adc_reg = snd_soc_read(codec, AD193X_ADC_CTRL2);
dac_reg &= ~AD193X_DAC_CHAN_MASK;
adc_reg &= ~AD193X_ADC_CHAN_MASK;
unsigned int channels;
switch (slots) {
case 2:
dac_reg |= AD193X_DAC_2_CHANNELS << AD193X_DAC_CHAN_SHFT;
adc_reg |= AD193X_ADC_2_CHANNELS << AD193X_ADC_CHAN_SHFT;
channels = AD193X_2_CHANNELS;
break;
case 4:
dac_reg |= AD193X_DAC_4_CHANNELS << AD193X_DAC_CHAN_SHFT;
adc_reg |= AD193X_ADC_4_CHANNELS << AD193X_ADC_CHAN_SHFT;
channels = AD193X_4_CHANNELS;
break;
case 8:
dac_reg |= AD193X_DAC_8_CHANNELS << AD193X_DAC_CHAN_SHFT;
adc_reg |= AD193X_ADC_8_CHANNELS << AD193X_ADC_CHAN_SHFT;
channels = AD193X_8_CHANNELS;
break;
case 16:
dac_reg |= AD193X_DAC_16_CHANNELS << AD193X_DAC_CHAN_SHFT;
adc_reg |= AD193X_ADC_16_CHANNELS << AD193X_ADC_CHAN_SHFT;
channels = AD193X_16_CHANNELS;
break;
default:
return -EINVAL;
}
snd_soc_write(codec, AD193X_DAC_CTRL1, dac_reg);
snd_soc_write(codec, AD193X_ADC_CTRL2, adc_reg);
snd_soc_update_bits(codec, AD193X_DAC_CTRL1, AD193X_DAC_CHAN_MASK,
channels << AD193X_DAC_CHAN_SHFT);
snd_soc_update_bits(codec, AD193X_ADC_CTRL2, AD193X_ADC_CHAN_MASK,
channels << AD193X_ADC_CHAN_SHFT);
return 0;
}
......@@ -160,23 +154,19 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
int adc_reg1, adc_reg2, dac_reg;
adc_reg1 = snd_soc_read(codec, AD193X_ADC_CTRL1);
adc_reg2 = snd_soc_read(codec, AD193X_ADC_CTRL2);
dac_reg = snd_soc_read(codec, AD193X_DAC_CTRL1);
unsigned int adc_serfmt = 0;
unsigned int adc_fmt = 0;
unsigned int dac_fmt = 0;
/* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S
* with TDM) and ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A)
*/
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
adc_reg1 &= ~AD193X_ADC_SERFMT_MASK;
adc_reg1 |= AD193X_ADC_SERFMT_TDM;
adc_serfmt |= AD193X_ADC_SERFMT_TDM;
break;
case SND_SOC_DAIFMT_DSP_A:
adc_reg1 &= ~AD193X_ADC_SERFMT_MASK;
adc_reg1 |= AD193X_ADC_SERFMT_AUX;
adc_serfmt |= AD193X_ADC_SERFMT_AUX;
break;
default:
return -EINVAL;
......@@ -184,29 +174,20 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */
adc_reg2 &= ~AD193X_ADC_LEFT_HIGH;
adc_reg2 &= ~AD193X_ADC_BCLK_INV;
dac_reg &= ~AD193X_DAC_LEFT_HIGH;
dac_reg &= ~AD193X_DAC_BCLK_INV;
break;
case SND_SOC_DAIFMT_NB_IF: /* normal bclk + invert frm */
adc_reg2 |= AD193X_ADC_LEFT_HIGH;
adc_reg2 &= ~AD193X_ADC_BCLK_INV;
dac_reg |= AD193X_DAC_LEFT_HIGH;
dac_reg &= ~AD193X_DAC_BCLK_INV;
adc_fmt |= AD193X_ADC_LEFT_HIGH;
dac_fmt |= AD193X_DAC_LEFT_HIGH;
break;
case SND_SOC_DAIFMT_IB_NF: /* invert bclk + normal frm */
adc_reg2 &= ~AD193X_ADC_LEFT_HIGH;
adc_reg2 |= AD193X_ADC_BCLK_INV;
dac_reg &= ~AD193X_DAC_LEFT_HIGH;
dac_reg |= AD193X_DAC_BCLK_INV;
adc_fmt |= AD193X_ADC_BCLK_INV;
dac_fmt |= AD193X_DAC_BCLK_INV;
break;
case SND_SOC_DAIFMT_IB_IF: /* invert bclk + frm */
adc_reg2 |= AD193X_ADC_LEFT_HIGH;
adc_reg2 |= AD193X_ADC_BCLK_INV;
dac_reg |= AD193X_DAC_LEFT_HIGH;
dac_reg |= AD193X_DAC_BCLK_INV;
adc_fmt |= AD193X_ADC_LEFT_HIGH;
adc_fmt |= AD193X_ADC_BCLK_INV;
dac_fmt |= AD193X_DAC_LEFT_HIGH;
dac_fmt |= AD193X_DAC_BCLK_INV;
break;
default:
return -EINVAL;
......@@ -214,36 +195,31 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai,
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */
adc_reg2 |= AD193X_ADC_LCR_MASTER;
adc_reg2 |= AD193X_ADC_BCLK_MASTER;
dac_reg |= AD193X_DAC_LCR_MASTER;
dac_reg |= AD193X_DAC_BCLK_MASTER;
adc_fmt |= AD193X_ADC_LCR_MASTER;
adc_fmt |= AD193X_ADC_BCLK_MASTER;
dac_fmt |= AD193X_DAC_LCR_MASTER;
dac_fmt |= AD193X_DAC_BCLK_MASTER;
break;
case SND_SOC_DAIFMT_CBS_CFM: /* codec clk slave & frm master */
adc_reg2 |= AD193X_ADC_LCR_MASTER;
adc_reg2 &= ~AD193X_ADC_BCLK_MASTER;
dac_reg |= AD193X_DAC_LCR_MASTER;
dac_reg &= ~AD193X_DAC_BCLK_MASTER;
adc_fmt |= AD193X_ADC_LCR_MASTER;
dac_fmt |= AD193X_DAC_LCR_MASTER;
break;
case SND_SOC_DAIFMT_CBM_CFS: /* codec clk master & frame slave */
adc_reg2 &= ~AD193X_ADC_LCR_MASTER;
adc_reg2 |= AD193X_ADC_BCLK_MASTER;
dac_reg &= ~AD193X_DAC_LCR_MASTER;
dac_reg |= AD193X_DAC_BCLK_MASTER;
adc_fmt |= AD193X_ADC_BCLK_MASTER;
dac_fmt |= AD193X_DAC_BCLK_MASTER;
break;
case SND_SOC_DAIFMT_CBS_CFS: /* codec clk & frm slave */
adc_reg2 &= ~AD193X_ADC_LCR_MASTER;
adc_reg2 &= ~AD193X_ADC_BCLK_MASTER;
dac_reg &= ~AD193X_DAC_LCR_MASTER;
dac_reg &= ~AD193X_DAC_BCLK_MASTER;
break;
default:
return -EINVAL;
}
snd_soc_write(codec, AD193X_ADC_CTRL1, adc_reg1);
snd_soc_write(codec, AD193X_ADC_CTRL2, adc_reg2);
snd_soc_write(codec, AD193X_DAC_CTRL1, dac_reg);
snd_soc_update_bits(codec, AD193X_ADC_CTRL1, AD193X_ADC_SERFMT_MASK,
adc_serfmt);
snd_soc_update_bits(codec, AD193X_ADC_CTRL2, AD193X_ADC_FMT_MASK,
adc_fmt);
snd_soc_update_bits(codec, AD193X_DAC_CTRL1, AD193X_DAC_FMT_MASK,
dac_fmt);
return 0;
}
......
......@@ -23,16 +23,14 @@
#define AD193X_DAC_SERFMT_STEREO (0 << 6)
#define AD193X_DAC_SERFMT_TDM (1 << 6)
#define AD193X_DAC_CTRL1 0x03
#define AD193X_DAC_2_CHANNELS 0
#define AD193X_DAC_4_CHANNELS 1
#define AD193X_DAC_8_CHANNELS 2
#define AD193X_DAC_16_CHANNELS 3
#define AD193X_DAC_CHAN_SHFT 1
#define AD193X_DAC_CHAN_MASK (3 << AD193X_DAC_CHAN_SHFT)
#define AD193X_DAC_LCR_MASTER (1 << 4)
#define AD193X_DAC_BCLK_MASTER (1 << 5)
#define AD193X_DAC_LEFT_HIGH (1 << 3)
#define AD193X_DAC_BCLK_INV (1 << 7)
#define AD193X_DAC_FMT_MASK (AD193X_DAC_LCR_MASTER | \
AD193X_DAC_BCLK_MASTER | AD193X_DAC_LEFT_HIGH | AD193X_DAC_BCLK_INV)
#define AD193X_DAC_CTRL2 0x04
#define AD193X_DAC_WORD_LEN_SHFT 3
#define AD193X_DAC_WORD_LEN_MASK 0x18
......@@ -68,16 +66,19 @@
#define AD193X_ADC_SERFMT_AUX (2 << 5)
#define AD193X_ADC_WORD_LEN_MASK 0x3
#define AD193X_ADC_CTRL2 0x10
#define AD193X_ADC_2_CHANNELS 0
#define AD193X_ADC_4_CHANNELS 1
#define AD193X_ADC_8_CHANNELS 2
#define AD193X_ADC_16_CHANNELS 3
#define AD193X_ADC_CHAN_SHFT 4
#define AD193X_ADC_CHAN_MASK (3 << AD193X_ADC_CHAN_SHFT)
#define AD193X_ADC_LCR_MASTER (1 << 3)
#define AD193X_ADC_BCLK_MASTER (1 << 6)
#define AD193X_ADC_LEFT_HIGH (1 << 2)
#define AD193X_ADC_BCLK_INV (1 << 1)
#define AD193X_ADC_FMT_MASK (AD193X_ADC_LCR_MASTER | \
AD193X_ADC_BCLK_MASTER | AD193X_ADC_LEFT_HIGH | AD193X_ADC_BCLK_INV)
#define AD193X_2_CHANNELS 0
#define AD193X_4_CHANNELS 1
#define AD193X_8_CHANNELS 2
#define AD193X_16_CHANNELS 3
#define AD193X_NUM_REGS 17
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册
反馈
建议
客服 返回
顶部