提交 2995f0a1 编写于 作者: O Olof Johansson

Merge tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt for 4.4 (part 2)

- Add support for severals Armada-370-based Seagate NAS
- Fix Ready NAS device tree
- Modify SDHCI binding for A388-GP allowing using it on old and new
  version of the board

* tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: set SW polling as SDHCI card detection on A388-GP
  arm: mvebu: reorder nodes under internal-regs by address in RN2120 .dts file
  arm: mvebu: disable unused Armada RTC on ReadyNAS 102, 104 and 2120
  ARM: mvebu: add DT support for Seagate Personal Cloud
  ARM: mvebu: add DT support for Seagate NAS 2 and 4-Bay
Signed-off-by: NOlof Johansson <olof@lixom.net>
上级 64aa1fe1 6b61f249
master alk-4.19.24 alk-4.19.30 alk-4.19.34 alk-4.19.36 alk-4.19.43 alk-4.19.48 alk-4.19.57 ck-4.19.67 ck-4.19.81 ck-4.19.91 github/fork/deepanshu1422/fix-typo-in-comment github/fork/haosdent/fix-typo linux-next v4.19.91 v4.19.90 v4.19.89 v4.19.88 v4.19.87 v4.19.86 v4.19.85 v4.19.84 v4.19.83 v4.19.82 v4.19.81 v4.19.80 v4.19.79 v4.19.78 v4.19.77 v4.19.76 v4.19.75 v4.19.74 v4.19.73 v4.19.72 v4.19.71 v4.19.70 v4.19.69 v4.19.68 v4.19.67 v4.19.66 v4.19.65 v4.19.64 v4.19.63 v4.19.62 v4.19.61 v4.19.60 v4.19.59 v4.19.58 v4.19.57 v4.19.56 v4.19.55 v4.19.54 v4.19.53 v4.19.52 v4.19.51 v4.19.50 v4.19.49 v4.19.48 v4.19.47 v4.19.46 v4.19.45 v4.19.44 v4.19.43 v4.19.42 v4.19.41 v4.19.40 v4.19.39 v4.19.38 v4.19.37 v4.19.36 v4.19.35 v4.19.34 v4.19.33 v4.19.32 v4.19.31 v4.19.30 v4.19.29 v4.19.28 v4.19.27 v4.19.26 v4.19.25 v4.19.24 v4.19.23 v4.19.22 v4.19.21 v4.19.20 v4.19.19 v4.19.18 v4.19.17 v4.19.16 v4.19.15 v4.19.14 v4.19.13 v4.19.12 v4.19.11 v4.19.10 v4.19.9 v4.19.8 v4.19.7 v4.19.6 v4.19.5 v4.19.4 v4.19.3 v4.19.2 v4.19.1 v4.19 v4.19-rc8 v4.19-rc7 v4.19-rc6 v4.19-rc5 v4.19-rc4 v4.19-rc3 v4.19-rc2 v4.19-rc1 ck-release-21 ck-release-20 ck-release-19.2 ck-release-19.1 ck-release-19 ck-release-18 ck-release-17.2 ck-release-17.1 ck-release-17 ck-release-16 ck-release-15.1 ck-release-15 ck-release-14 ck-release-13.2 ck-release-13 ck-release-12 ck-release-11 ck-release-10 ck-release-9 ck-release-7 alk-release-15 alk-release-14 alk-release-13.2 alk-release-13 alk-release-12 alk-release-11 alk-release-10 alk-release-9 alk-release-7
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......@@ -723,6 +723,10 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
armada-370-rd.dtb \
armada-370-seagate-nas-2bay.dtb \
armada-370-seagate-nas-4bay.dtb \
armada-370-seagate-personal-cloud.dtb \
armada-370-seagate-personal-cloud-2bay.dtb \
armada-370-synology-ds213j.dtb
dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
......
......@@ -83,6 +83,12 @@
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
rtc@10300 {
status = "disabled";
};
serial@12000 {
status = "okay";
};
......
......@@ -83,6 +83,12 @@
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
rtc@10300 {
status = "disabled";
};
serial@12000 {
status = "okay";
};
......
/*
* Device Tree file for Seagate NAS 2-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate NAS 2-Bay
* Code name (board/PCB) : Dart 2-Bay
* Model name (case sticker) : SRPD20
* Material desc (product spec) : STCTxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-nas-xbay.dtsi"
/ {
model = "Seagate NAS 2-Bay (Dart, SRPD20)";
compatible = "seagate,dart-2", "marvell,armada370", "marvell,armada-370-xp";
gpio-fan {
gpio-fan,speed-map =
< 0 3
950 2
1400 1
1800 0>;
};
};
/*
* Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate NAS 4-Bay
* Code name (board/PCB) : Dart 4-Bay
* Model name (case sticker) : SRPD40
* Material desc (product spec) : STCUxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-nas-xbay.dtsi"
#include <dt-bindings/leds/leds-ns2.h>
/ {
model = "Seagate NAS 4-Bay (Dart, SRPD40)";
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
soc {
pcie-controller {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
i2c@11000 {
/* I2C GPIO expander (PCA9554A) */
pca9554: pca9554@21 {
compatible = "nxp,pca9554";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
};
};
};
};
regulators {
regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "SATA2 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>;
};
regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "SATA3 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
red-sata2 {
label = "dart:red:sata2";
gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
};
red-sata3 {
label = "dart:red:sata3";
gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
};
};
leds-ns2 {
compatible = "lacie,ns2-leds";
white-sata2 {
label = "dart:white:sata2";
cmd-gpio = <&pca9554 1 GPIO_ACTIVE_HIGH>;
slow-gpio = <&pca9554 2 GPIO_ACTIVE_HIGH>;
num-modes = <4>;
modes-map = <NS_V2_LED_SATA 0 0
NS_V2_LED_OFF 0 1
NS_V2_LED_ON 1 0
NS_V2_LED_ON 1 1>;
};
white-sata3 {
label = "dart:white:sata3";
cmd-gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
slow-gpio = <&pca9554 5 GPIO_ACTIVE_HIGH>;
num-modes = <4>;
modes-map = <NS_V2_LED_SATA 0 0
NS_V2_LED_OFF 0 1
NS_V2_LED_ON 1 0
NS_V2_LED_ON 1 1>;
};
};
gpio-fan {
gpio-fan,speed-map =
< 0 3
800 2
1050 1
1300 0>;
};
};
/*
* Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* TODO: add support for the white SATA LEDs associated with HDD 0 and 1.
*/
#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
};
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
i2c@11000 {
status = "okay";
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
/* RTC - NXP 8563T (second source) */
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
interrupts = <110>;
};
/* RTC - MCP7940NT */
rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
interrupts = <110>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0 0x300000>;
};
partition@300000 {
label = "device-tree";
reg = <0x300000 0x20000>;
};
partition@320000 {
label = "linux";
reg = <0x320000 0x2000000>;
};
partition@2320000 {
label = "rootfs";
reg = <0x2320000 0xdce0000>;
};
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA0 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
};
gpio-fan {
compatible = "gpio-fan";
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH
&gpio2 1 GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@2 {
label = "Backup button";
linux,code = <KEY_OPTION>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
};
gpio-leds {
compatible = "gpio-leds";
white-power {
label = "dart:white:power";
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
red-power {
label = "dart:red:power";
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
};
red-sata0 {
label = "dart:red:sata0";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
red-sata1 {
label = "dart:red:sata1";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
pinctrl-names = "default";
hdd0_led_sata_pin: hdd0-led-sata-pin {
marvell,pins = "mpp48";
marvell,function = "sata1";
};
hdd0_led_gpio_pin: hdd0-led-gpio-pin {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
hdd1_led_sata_pin: hdd1-led-sata-pin {
marvell,pins = "mpp57";
marvell,function = "sata0";
};
hdd1_led_gpio_pin: hdd1-led-gpio-pin {
marvell,pins = "mpp57";
marvell,function = "gpio";
};
};
/*
* Device Tree file for Seagate Personal Cloud NAS 2-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate Personal Cloud 2-Bay
* Code name (board/PCB) : Cumulus Max
* Model name (case sticker) : SRN22C
* Material desc (product spec) : STCSxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-personal-cloud.dtsi"
/ {
model = "Seagate Personal Cloud 2-Bay (Cumulus, SRN22C)";
compatible = "seagate,cumulus-max", "marvell,armada370", "marvell,armada-370-xp";
soc {
internal-regs {
sata@a0000 {
status = "okay";
nr-ports = <2>;
};
};
};
regulators {
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
};
};
/*
* Device Tree file for Seagate Personal Cloud NAS (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate Personal Cloud
* Code name (board/PCB) : Cumulus
* Model name (case sticker) : SRN21C
* Material desc (product spec) : STCRxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-personal-cloud.dtsi"
/ {
model = "Seagate Personal Cloud (Cumulus, SRN21C)";
compatible = "seagate,cumulus", "marvell,armada370", "marvell,armada-370-xp";
soc {
internal-regs {
sata@a0000 {
status = "okay";
nr-ports = <1>;
};
};
};
};
/*
* Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
* (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* TODO: add support for the white SATA LED.
*/
#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
coherency-fabric@20200 {
broken-idle;
};
serial@12000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
spi@10600 {
status = "okay";
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
/* MX25L8006E */
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
};
};
};
usb@50000 {
status = "okay";
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA0 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
debounce-interval = <100>;
};
button@2 {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
label = "USB VBUS error";
linux,code = <KEY_UNKNOWN>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
};
gpio-leds {
compatible = "gpio-leds";
red-sata0 {
label = "cumulus:red:sata0";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
};
};
&pinctrl {
pinctrl-0 = <&sata_led_pin>;
pinctrl-names = "default";
sata_led_pin: sata-led-pin {
marvell,pins = "mpp60";
marvell,function = "sata0";
};
gpio_led_pin: gpio-led-pin {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
};
......@@ -207,8 +207,21 @@
sdhci@d8000 {
pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>;
cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
no-1-8-v;
/*
* A388-GP board v1.5 and higher replace
* hitherto card detection method based on GPIO
* with the one using DAT3 pin. As they are
* incompatible, software-based polling is
* enabled with 'broken-cd' property. For boards
* older than v1.5 it can be replaced with:
* 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
* whereas for the newer ones following can be
* used instead:
* 'dat3-cd;'
* 'cd-inverted;'
*/
broken-cd;
wp-inverted;
bus-width = <8>;
status = "okay";
......
......@@ -90,41 +90,10 @@
};
internal-regs {
/* Two rear eSATA ports */
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
serial@12000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
/* Front USB 2.0 port */
usb@50000 {
status = "okay";
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
rtc@10300 {
status = "disabled";
};
i2c@11000 {
......@@ -132,12 +101,6 @@
clock-frequency = <400000>;
status = "okay";
isl12057: isl12057@68 {
compatible = "isil,isl12057";
reg = <0x68>;
isil,irq2-can-wakeup-machine;
};
/* Controller for rear fan #1 of 3 (Protechnic
* MGT4012XB-O20, 8000RPM) near eSATA port */
g762_fan1: g762@3e {
......@@ -174,6 +137,49 @@
compatible = "gmt,g751";
reg = <0x4c>;
};
isl12057: isl12057@68 {
compatible = "isil,isl12057";
reg = <0x68>;
isil,irq2-can-wakeup-machine;
};
};
serial@12000 {
status = "okay";
};
/* Front USB 2.0 port */
usb@50000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
/* Two rear eSATA ports */
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
nand@d0000 {
......
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