cx23885-dvb.c 50.1 KB
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/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
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 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
#include <linux/suspend.h>

#include "cx23885.h"
#include <media/v4l2-common.h>

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#include "dvb_ca_en50221.h"
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#include "s5h1409.h"
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#include "s5h1411.h"
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#include "mt2131.h"
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#include "tda8290.h"
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#include "tda18271.h"
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#include "lgdt330x.h"
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#include "xc4000.h"
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#include "xc5000.h"
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#include "max2165.h"
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#include "tda10048.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
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#include "dib0070.h"
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#include "dibx000_common.h"
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#include "zl10353.h"
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#include "stv0900.h"
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#include "stv0900_reg.h"
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#include "stv6110.h"
#include "lnbh24.h"
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#include "cx24116.h"
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#include "cx24117.h"
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#include "cimax2.h"
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#include "lgs8gxx.h"
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#include "netup-eeprom.h"
#include "netup-init.h"
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#include "lgdt3305.h"
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#include "atbm8830.h"
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#include "ts2020.h"
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#include "ds3000.h"
#include "cx23885-f300.h"
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#include "altera-ci.h"
#include "stv0367.h"
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#include "drxk.h"
#include "mt2063.h"
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#include "stv090x.h"
#include "stb6100.h"
#include "stb6100_cfg.h"
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#include "tda10071.h"
#include "a8293.h"
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#include "mb86a20s.h"
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#include "si2165.h"
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#include "si2168.h"
#include "si2157.h"
#include "m88ds3103.h"
#include "m88ts2022.h"
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static unsigned int debug;
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#define dprintk(level, fmt, arg...)\
	do { if (debug >= level)\
		printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
	} while (0)
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/* ------------------------------------------------------------------ */

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static unsigned int alt_tuner;
module_param(alt_tuner, int, 0644);
MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");

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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);

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/* ------------------------------------------------------------------ */

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static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
			   unsigned int *num_buffers, unsigned int *num_planes,
			   unsigned int sizes[], void *alloc_ctxs[])
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{
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	struct cx23885_tsport *port = q->drv_priv;
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	port->ts_packet_size  = 188 * 4;
	port->ts_packet_count = 32;
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	*num_planes = 1;
	sizes[0] = port->ts_packet_size * port->ts_packet_count;
	*num_buffers = 32;
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	return 0;
}

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static int buffer_prepare(struct vb2_buffer *vb)
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{
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	struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
	struct cx23885_buffer *buf =
		container_of(vb, struct cx23885_buffer, vb);

	return cx23885_buf_prepare(buf, port);
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}

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static void buffer_finish(struct vb2_buffer *vb)
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{
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	struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
	struct cx23885_dev *dev = port->dev;
	struct cx23885_buffer *buf = container_of(vb,
		struct cx23885_buffer, vb);
	struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);

	cx23885_free_buffer(dev, buf);

	dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
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}

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static void buffer_queue(struct vb2_buffer *vb)
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{
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	struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
	struct cx23885_buffer   *buf = container_of(vb,
		struct cx23885_buffer, vb);

	cx23885_buf_queue(port, buf);
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}

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static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
{
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	struct vb2_dvb_frontends *f;
	struct vb2_dvb_frontend *fe;
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	f = &port->frontends;

	if (f->gate <= 1) /* undefined or fe0 */
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		fe = vb2_dvb_get_frontend(f, 1);
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	else
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		fe = vb2_dvb_get_frontend(f, f->gate);
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	if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
		fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
}

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static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
{
	struct cx23885_tsport *port = q->drv_priv;
	struct cx23885_dmaqueue *dmaq = &port->mpegq;
	struct cx23885_buffer *buf = list_entry(dmaq->active.next,
			struct cx23885_buffer, queue);

	cx23885_start_dma(port, dmaq, buf);
	return 0;
}

static void cx23885_stop_streaming(struct vb2_queue *q)
{
	struct cx23885_tsport *port = q->drv_priv;

	cx23885_cancel_buffers(port);
}

static struct vb2_ops dvb_qops = {
	.queue_setup    = queue_setup,
	.buf_prepare  = buffer_prepare,
	.buf_finish = buffer_finish,
	.buf_queue    = buffer_queue,
	.wait_prepare = vb2_ops_wait_prepare,
	.wait_finish = vb2_ops_wait_finish,
	.start_streaming = cx23885_start_streaming,
	.stop_streaming = cx23885_stop_streaming,
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};

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static struct s5h1409_config hauppauge_generic_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct tda10048_config hauppauge_hvr1200_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
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	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3800,
	.dtv8_if_freq_khz = TDA10048_IF_4300,
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	.clk_freq_khz     = TDA10048_CLK_16000,
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};

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static struct tda10048_config hauppauge_hvr1210_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3500,
	.dtv8_if_freq_khz = TDA10048_IF_4000,
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	.clk_freq_khz     = TDA10048_CLK_16000,
};

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static struct s5h1409_config hauppauge_ezqam_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.qam_if        = 4000,
	.inversion     = S5H1409_INVERSION_ON,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1800lp_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1500_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct mt2131_config hauppauge_generic_tunerconfig = {
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	0x61
};

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static struct lgdt330x_config fusionhdtv_5_express = {
	.demod_address = 0x0e,
	.demod_chip = LGDT3303,
	.serial_mpeg = 0x40,
};

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static struct s5h1409_config hauppauge_hvr1500q_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config dvico_s5h1409_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config dvico_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_ON,
	.qam_if        = S5H1411_IF_44000,
	.vsb_if        = S5H1411_IF_44000,
	.inversion     = S5H1411_INVERSION_OFF,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config hcw_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_OFF,
	.vsb_if        = S5H1411_IF_44000,
	.qam_if        = S5H1411_IF_4000,
	.inversion     = S5H1411_INVERSION_ON,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
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	.i2c_address      = 0x61,
	.if_khz           = 5380,
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};

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static struct xc5000_config dvico_xc5000_tunerconfig = {
	.i2c_address      = 0x64,
	.if_khz           = 5380,
};

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static struct tda829x_config tda829x_no_probe = {
	.probe_tuner = TDA829X_DONT_PROBE,
};

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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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	.atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
		      .if_lvl = 6, .rfagc_top = 0x37 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
		      .if_lvl = 6, .rfagc_top = 0x37 },
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};

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static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
	.dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
		      .if_lvl = 1, .rfagc_top = 0x37, },
};

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static struct tda18271_config hauppauge_tda18271_config = {
	.std_map = &hauppauge_tda18271_std_map,
	.gate    = TDA18271_GATE_ANALOG,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_config hauppauge_hvr1200_tuner_config = {
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	.std_map = &hauppauge_hvr1200_tda18271_std_map,
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	.gate    = TDA18271_GATE_ANALOG,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_config hauppauge_hvr1210_tuner_config = {
	.gate    = TDA18271_GATE_DIGITAL,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_config hauppauge_hvr4400_tuner_config = {
	.gate    = TDA18271_GATE_DIGITAL,
	.output_opt = TDA18271_OUTPUT_LT_OFF,
};

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static struct tda18271_std_map hauppauge_hvr127x_std_map = {
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	.atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x58 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x58 },
};

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static struct tda18271_config hauppauge_hvr127x_config = {
	.std_map = &hauppauge_hvr127x_std_map,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct lgdt3305_config hauppauge_lgdt3305_config = {
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	.i2c_addr           = 0x0e,
	.mpeg_mode          = LGDT3305_MPEG_SERIAL,
	.tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
	.tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
	.deny_i2c_rptr      = 1,
	.spectral_inversion = 1,
	.qam_if_khz         = 4000,
	.vsb_if_khz         = 3250,
};

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static struct dibx000_agc_config xc3028_agc_config = {
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	BAND_VHF | BAND_UHF,	/* band_caps */

	/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
	 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
	 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
	 * P_agc_nb_est=2, P_agc_write=0
	 */
	(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
		(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */

	712,	/* inv_gain */
	21,	/* time_stabiliz */

	0,	/* alpha_level */
	118,	/* thlock */

	0,	/* wbd_inv */
	2867,	/* wbd_ref */
	0,	/* wbd_sel */
	2,	/* wbd_alpha */

	0,	/* agc1_max */
	0,	/* agc1_min */
	39718,	/* agc2_max */
	9930,	/* agc2_min */
	0,	/* agc1_pt1 */
	0,	/* agc1_pt2 */
	0,	/* agc1_pt3 */
	0,	/* agc1_slope1 */
	0,	/* agc1_slope2 */
	0,	/* agc2_pt1 */
	128,	/* agc2_pt2 */
	29,	/* agc2_slope1 */
	29,	/* agc2_slope2 */

	17,	/* alpha_mant */
	27,	/* alpha_exp */
	23,	/* beta_mant */
	51,	/* beta_exp */

	1,	/* perform_agc_softsplit */
};

/* PLL Configuration for COFDM BW_MHz = 8.000000
 * With external clock = 30.000000 */
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static struct dibx000_bandwidth_config xc3028_bw_config = {
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	60000,	/* internal */
	30000,	/* sampling */
	1,	/* pll_cfg: prediv */
	8,	/* pll_cfg: ratio */
	3,	/* pll_cfg: range */
	1,	/* pll_cfg: reset */
	0,	/* pll_cfg: bypass */
	0,	/* misc: refdiv */
	0,	/* misc: bypclk_div */
	1,	/* misc: IO_CLK_en_core */
	1,	/* misc: ADClkSrc */
	0,	/* misc: modulo */
	(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
	(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
	20452225, /* timf */
	30000000  /* xtal_hz */
};

static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
	.output_mpeg2_in_188_bytes = 1,
	.hostbus_diversity = 1,
	.tuner_is_baseband = 0,
	.update_lna  = NULL,

	.agc_config_count = 1,
	.agc = &xc3028_agc_config,
	.bw  = &xc3028_bw_config,

	.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,

	.pwm_freq_div = 0,
	.agc_control  = NULL,
	.spur_protect = 0,

	.output_mode = OUTMODE_MPEG2_SERIAL,
};

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static struct zl10353_config dvico_fusionhdtv_xc3028 = {
	.demod_address = 0x0f,
	.if2           = 45600,
	.no_tuner      = 1,
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	.disable_i2c_gate_ctrl = 1,
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};

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static struct stv0900_reg stv0900_ts_regs[] = {
	{ R0900_TSGENERAL, 0x00 },
	{ R0900_P1_TSSPEED, 0x40 },
	{ R0900_P2_TSSPEED, 0x40 },
	{ R0900_P1_TSCFGM, 0xc0 },
	{ R0900_P2_TSCFGM, 0xc0 },
	{ R0900_P1_TSCFGH, 0xe0 },
	{ R0900_P2_TSCFGH, 0xe0 },
	{ R0900_P1_TSCFGL, 0x20 },
	{ R0900_P2_TSCFGL, 0x20 },
	{ 0xffff, 0xff }, /* terminate */
};

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static struct stv0900_config netup_stv0900_config = {
	.demod_address = 0x68,
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	.demod_mode = 1, /* dual */
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	.xtal = 8000000,
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	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
	.diseqc_mode = 2,/* 2/3 PWM */
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	.ts_config_regs = stv0900_ts_regs,
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	.tun1_maddress = 0,/* 0x60 */
	.tun2_maddress = 3,/* 0x63 */
	.tun1_adc = 1,/* 1 Vpp */
	.tun2_adc = 1,/* 1 Vpp */
};

static struct stv6110_config netup_stv6110_tunerconfig_a = {
	.i2c_address = 0x60,
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	.mclk = 16000000,
	.clk_div = 1,
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	.gain = 8, /* +16 dB  - maximum gain */
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};

static struct stv6110_config netup_stv6110_tunerconfig_b = {
	.i2c_address = 0x63,
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	.mclk = 16000000,
	.clk_div = 1,
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	.gain = 8, /* +16 dB  - maximum gain */
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};

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static struct cx24116_config tbs_cx24116_config = {
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	.demod_address = 0x55,
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};

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static struct cx24117_config tbs_cx24117_config = {
	.demod_address = 0x55,
};

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static struct ds3000_config tevii_ds3000_config = {
	.demod_address = 0x68,
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};

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static struct ts2020_config tevii_ts2020_config  = {
	.tuner_address = 0x60,
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	.clk_out_div = 1,
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	.frequency_div = 1146000,
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};

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static struct cx24116_config dvbworld_cx24116_config = {
	.demod_address = 0x05,
};

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static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
	.prod = LGS8GXX_PROD_LGS8GL5,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 5380, /* 5.38 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 0,
	.if_neg_edge = 0,
};

static struct xc5000_config mygica_x8506_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 5380,
};

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static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
	.demod_address = 0x10,
};

static struct xc5000_config mygica_x8507_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 4000,
};

554
static struct stv090x_config prof_8000_stv090x_config = {
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	.device                 = STV0903,
	.demod_mode             = STV090x_SINGLE,
	.clk_mode               = STV090x_CLK_EXT,
	.xtal                   = 27000000,
	.address                = 0x6A,
	.ts1_mode               = STV090x_TSMODE_PARALLEL_PUNCTURED,
	.repeater_level         = STV090x_RPTLEVEL_64,
	.adc1_range             = STV090x_ADC_2Vpp,
	.diseqc_envelope_mode   = false,

	.tuner_get_frequency    = stb6100_get_frequency,
	.tuner_set_frequency    = stb6100_set_frequency,
	.tuner_set_bandwidth    = stb6100_set_bandwidth,
	.tuner_get_bandwidth    = stb6100_get_bandwidth,
569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589
};

static struct stb6100_config prof_8000_stb6100_config = {
	.tuner_address = 0x60,
	.refclock = 27000000,
};

static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
{
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	if (voltage == SEC_VOLTAGE_18)
		cx_write(MC417_RWD, 0x00001e00);
	else if (voltage == SEC_VOLTAGE_13)
		cx_write(MC417_RWD, 0x00001a00);
	else
		cx_write(MC417_RWD, 0x00001800);
	return 0;
}

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static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
					fe_sec_voltage_t voltage)
{
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);

	switch (voltage) {
	case SEC_VOLTAGE_13:
		cx23885_gpio_set(dev, GPIO_1);
		cx23885_gpio_clear(dev, GPIO_0);
		break;
	case SEC_VOLTAGE_18:
		cx23885_gpio_set(dev, GPIO_1);
		cx23885_gpio_set(dev, GPIO_0);
		break;
	case SEC_VOLTAGE_OFF:
		cx23885_gpio_clear(dev, GPIO_1);
		cx23885_gpio_clear(dev, GPIO_0);
		break;
	}

	/* call the frontend set_voltage function */
	port->fe_set_voltage(fe, voltage);

	return 0;
}

619
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
620
{
621
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
622 623 624 625 626
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
627
		switch (p->modulation) {
628 629 630 631 632 633 634 635 636 637
		case VSB_8:
			cx23885_gpio_clear(dev, GPIO_5);
			break;
		case QAM_64:
		case QAM_256:
		default:
			cx23885_gpio_set(dev, GPIO_5);
			break;
		}
		break;
638
	case CX23885_BOARD_MYGICA_X8506:
639
	case CX23885_BOARD_MYGICA_X8507:
640 641 642 643
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		/* Select Digital TV */
		cx23885_gpio_set(dev, GPIO_0);
		break;
644
	}
645 646 647 648 649

	/* Call the real set_frontend */
	if (port->set_frontend)
		return port->set_frontend(fe);

650
	return 0;
651 652
}

653 654 655 656 657 658 659
static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
				     struct dvb_frontend *fe)
{
	port->set_frontend = fe->ops.set_frontend;
	fe->ops.set_frontend = cx23885_dvb_set_frontend;
}

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static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
	.prod = LGS8GXX_PROD_LGS8G75,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 6500, /* 6.50 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 1,
	.adc_vpp = 2, /* 1.6 Vpp */
	.if_neg_edge = 1,
};

static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 6500,
};

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static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 0,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
689 690 691
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707
};

static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};

static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 1,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
708 709 710
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
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};

static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};
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static struct stv0367_config netup_stv0367_config[] = {
	{
		.demod_address = 0x1c,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	}, {
		.demod_address = 0x1d,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	},
};

static struct xc5000_config netup_xc5000_config[] = {
	{
		.i2c_address = 0x61,
		.if_khz = 4500,
	}, {
		.i2c_address = 0x64,
		.if_khz = 4500,
	},
};

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static struct drxk_config terratec_drxk_config[] = {
	{
		.adr = 0x29,
		.no_i2c_bridge = 1,
	}, {
		.adr = 0x2a,
		.no_i2c_bridge = 1,
	},
};

static struct mt2063_config terratec_mt2063_config[] = {
	{
		.tuner_address = 0x60,
	}, {
		.tuner_address = 0x67,
	},
};

763
static const struct tda10071_config hauppauge_tda10071_config = {
764
	.demod_i2c_addr = 0x05,
765 766 767 768 769 770 771 772 773 774 775 776
	.tuner_i2c_addr = 0x54,
	.i2c_wr_max = 64,
	.ts_mode = TDA10071_TS_SERIAL,
	.spec_inv = 0,
	.xtal = 40444000, /* 40.444 MHz */
	.pll_multiplier = 20,
};

static const struct a8293_config hauppauge_a8293_config = {
	.i2c_addr = 0x0b,
};

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static const struct si2165_config hauppauge_hvr4400_si2165_config = {
	.i2c_addr	= 0x64,
	.chip_mode	= SI2165_MODE_PLL_XTAL,
	.ref_freq_Hz	= 16000000,
};

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static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
	.i2c_addr = 0x68,
	.clock = 27000000,
	.i2c_wr_max = 33,
	.clock_out = 0,
	.ts_mode = M88DS3103_TS_PARALLEL,
	.ts_clk = 16000,
	.ts_clk_pol = 1,
	.lnb_en_pol = 1,
	.lnb_hv_pol = 0,
	.agc = 0x99,
};

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static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
797 798 799
{
	struct cx23885_dev *dev = (struct cx23885_dev *)device;
	unsigned long timeout = jiffies + msecs_to_jiffies(1);
800
	uint32_t mem = 0;
801

802
	mem = cx_read(MC417_RWD);
803 804 805 806 807 808 809 810 811
	if (read)
		cx_set(MC417_OEN, ALT_DATA);
	else {
		cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
		mem &= ~ALT_DATA;
		mem |= (data & ALT_DATA);
	}

	if (flag)
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		mem |= ALT_AD_RG;
813
	else
814
		mem &= ~ALT_AD_RG;
815

816
	mem &= ~ALT_CS;
817
	if (read)
818
		mem = (mem & ~ALT_RD) | ALT_WR;
819
	else
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		mem = (mem & ~ALT_WR) | ALT_RD;

	cx_write(MC417_RWD, mem);  /* start RW cycle */
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	for (;;) {
		mem = cx_read(MC417_RWD);
		if ((mem & ALT_RDY) == 0)
			break;
		if (time_after(jiffies, timeout))
			break;
		udelay(1);
	}

	cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
	if (read)
		return mem & ALT_DATA;

	return 0;
};
839

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static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
{
	struct dib7000p_ops *dib7000p_ops = fe->sec_priv;

	return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
}

static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
{
	return 0;
}

static struct dib0070_config dib7070p_dib0070_config = {
	.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
	.reset = dib7070_tuner_reset,
	.sleep = dib7070_tuner_sleep,
	.clock_khz = 12000,
	.freq_offset_khz_vhf = 550,
	/* .flip_chip = 1, */
};

/* DIB7070 generic */
static struct dibx000_agc_config dib7070_agc_config = {
	.band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,

	/*
	 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
	 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
	 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
	 */
	.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
		 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
	.inv_gain = 600,
	.time_stabiliz = 10,
	.alpha_level = 0,
	.thlock = 118,
	.wbd_inv = 0,
	.wbd_ref = 3530,
	.wbd_sel = 1,
	.wbd_alpha = 5,
	.agc1_max = 65535,
	.agc1_min = 0,
	.agc2_max = 65535,
	.agc2_min = 0,
	.agc1_pt1 = 0,
	.agc1_pt2 = 40,
	.agc1_pt3 = 183,
	.agc1_slope1 = 206,
	.agc1_slope2 = 255,
	.agc2_pt1 = 72,
	.agc2_pt2 = 152,
	.agc2_slope1 = 88,
	.agc2_slope2 = 90,
	.alpha_mant = 17,
	.alpha_exp = 27,
	.beta_mant = 23,
	.beta_exp = 51,
	.perform_agc_softsplit = 0,
};

static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
	.internal = 60000,
	.sampling = 15000,
	.pll_prediv = 1,
	.pll_ratio = 20,
	.pll_range = 3,
	.pll_reset = 1,
	.pll_bypass = 0,
	.enable_refdiv = 0,
	.bypclk_div = 0,
	.IO_CLK_en_core = 1,
	.ADClkSrc = 1,
	.modulo = 2,
	/* refsel, sel, freq_15k */
	.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
	.ifreq = (0 << 25) | 0,
	.timf = 20452225,
	.xtal_hz = 12000000,
};

static struct dib7000p_config dib7070p_dib7000p_config = {
	/* .output_mode = OUTMODE_MPEG2_FIFO, */
	.output_mode = OUTMODE_MPEG2_SERIAL,
	/* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
	.output_mpeg2_in_188_bytes = 1,

	.agc_config_count = 1,
	.agc = &dib7070_agc_config,
	.bw  = &dib7070_bw_config_12_mhz,
	.tuner_is_baseband = 1,
	.spur_protect = 1,

	.gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
	.gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
	.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,

	.hostbus_diversity = 1,
};

939 940
static int dvb_register(struct cx23885_tsport *port)
{
941
	struct dib7000p_ops dib7000p_ops;
942
	struct cx23885_dev *dev = port->dev;
943
	struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
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944
	struct vb2_dvb_frontend *fe0, *fe1 = NULL;
945 946 947 948 949 950 951
	struct si2168_config si2168_config;
	struct si2157_config si2157_config;
	struct m88ts2022_config m88ts2022_config;
	struct i2c_board_info info;
	struct i2c_adapter *adapter;
	struct i2c_client *client_demod;
	struct i2c_client *client_tuner;
952
	int mfe_shared = 0; /* bus not shared by default */
953
	int ret;
954

955
	/* Get the first frontend */
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956
	fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
957 958
	if (!fe0)
		return -EINVAL;
959

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960
	/* init struct vb2_dvb */
961
	fe0->dvb.name = dev->name;
962

963 964 965 966 967 968
	/* multi-frontend gate control is undefined or defaults to fe0 */
	port->frontends.gate = 0;

	/* Sets the gate control callback to be used by i2c command calls */
	port->gate_ctrl = cx23885_dvb_gate_ctrl;

969 970
	/* init frontend */
	switch (dev->board) {
971
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
972
		i2c_bus = &dev->i2c_bus[0];
973
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
974
						&hauppauge_generic_config,
975
						&i2c_bus->i2c_adap);
976 977
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
978
				   &i2c_bus->i2c_adap,
979
				   &hauppauge_generic_tunerconfig, 0);
980 981
		}
		break;
982
	case CX23885_BOARD_HAUPPAUGE_HVR1270:
983
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
984 985
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
986
					       &hauppauge_lgdt3305_config,
987 988 989 990
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
991
				   &hauppauge_hvr127x_config);
992
		}
993 994
		if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
			cx23885_set_frontend_hook(port, fe0->dvb.frontend);
995
		break;
996
	case CX23885_BOARD_HAUPPAUGE_HVR1255:
997
	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
998 999 1000 1001 1002 1003 1004 1005 1006
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
					       &hcw_s5h1411_config,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
				   &hauppauge_tda18271_config);
		}
1007 1008 1009 1010 1011

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

1012
		break;
1013 1014
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		i2c_bus = &dev->i2c_bus[0];
1015
		switch (alt_tuner) {
1016
		case 1:
1017
			fe0->dvb.frontend =
1018 1019 1020
				dvb_attach(s5h1409_attach,
					   &hauppauge_ezqam_config,
					   &i2c_bus->i2c_adap);
1021 1022
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(tda829x_attach, fe0->dvb.frontend,
1023
					   &dev->i2c_bus[1].i2c_adap, 0x42,
1024
					   &tda829x_no_probe);
1025
				dvb_attach(tda18271_attach, fe0->dvb.frontend,
1026
					   0x60, &dev->i2c_bus[1].i2c_adap,
1027
					   &hauppauge_tda18271_config);
1028 1029 1030 1031
			}
			break;
		case 0:
		default:
1032
			fe0->dvb.frontend =
1033 1034 1035
				dvb_attach(s5h1409_attach,
					   &hauppauge_generic_config,
					   &i2c_bus->i2c_adap);
1036 1037
			if (fe0->dvb.frontend != NULL)
				dvb_attach(mt2131_attach, fe0->dvb.frontend,
1038 1039 1040 1041 1042
					   &i2c_bus->i2c_adap,
					   &hauppauge_generic_tunerconfig, 0);
			break;
		}
		break;
1043
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1044
		i2c_bus = &dev->i2c_bus[0];
1045
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1046
						&hauppauge_hvr1800lp_config,
1047
						&i2c_bus->i2c_adap);
1048 1049
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
1050
				   &i2c_bus->i2c_adap,
1051 1052 1053
				   &hauppauge_generic_tunerconfig, 0);
		}
		break;
1054
	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1055
		i2c_bus = &dev->i2c_bus[0];
1056
		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1057
						&fusionhdtv_5_express,
1058
						&i2c_bus->i2c_adap);
1059 1060
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1061 1062
				   &i2c_bus->i2c_adap, 0x61,
				   TUNER_LG_TDVS_H06XF);
1063 1064
		}
		break;
1065 1066
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
		i2c_bus = &dev->i2c_bus[1];
1067
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1068 1069
						&hauppauge_hvr1500q_config,
						&dev->i2c_bus[0].i2c_adap);
1070 1071
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
1072 1073
				   &i2c_bus->i2c_adap,
				   &hauppauge_hvr1500q_tunerconfig);
1074
		break;
1075 1076
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
		i2c_bus = &dev->i2c_bus[1];
1077
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1078 1079
						&hauppauge_hvr1500_config,
						&dev->i2c_bus[0].i2c_adap);
1080
		if (fe0->dvb.frontend != NULL) {
1081 1082 1083 1084 1085 1086
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
1087
				.fname       = XC2028_DEFAULT_FIRMWARE,
1088
				.max_len     = 64,
1089
				.demod       = XC3028_FE_OREN538,
1090 1091 1092
			};

			fe = dvb_attach(xc2028_attach,
1093
					fe0->dvb.frontend, &cfg);
1094 1095 1096 1097
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
1098
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1099
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1100
		i2c_bus = &dev->i2c_bus[0];
1101
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
1102 1103
			&hauppauge_hvr1200_config,
			&i2c_bus->i2c_adap);
1104 1105
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda829x_attach, fe0->dvb.frontend,
1106 1107
				&dev->i2c_bus[1].i2c_adap, 0x42,
				&tda829x_no_probe);
1108
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
1109 1110
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1200_tuner_config);
1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121
		}
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1210:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
			&hauppauge_hvr1210_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1210_tuner_config);
1122 1123
		}
		break;
1124 1125
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		i2c_bus = &dev->i2c_bus[0];
1126 1127 1128 1129 1130

		if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
			return -ENODEV;

		fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
1131
			0x12, &hauppauge_hvr1400_dib7000_config);
1132
		if (fe0->dvb.frontend != NULL) {
1133 1134 1135 1136 1137 1138
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x64,
			};
			static struct xc2028_ctrl ctl = {
1139
				.fname   = XC3028L_DEFAULT_FIRMWARE,
1140
				.max_len = 64,
1141
				.demod   = XC3028_FE_DIBCOM52,
1142 1143
				/* This is true for all demods with
					v36 firmware? */
1144
				.type    = XC2028_D2633,
1145 1146 1147
			};

			fe = dvb_attach(xc2028_attach,
1148
					fe0->dvb.frontend, &cfg);
1149 1150 1151 1152
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
1153 1154 1155
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
		i2c_bus = &dev->i2c_bus[port->nr - 1];

1156
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1157 1158
						&dvico_s5h1409_config,
						&i2c_bus->i2c_adap);
1159 1160
		if (fe0->dvb.frontend == NULL)
			fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1161 1162
							&dvico_s5h1411_config,
							&i2c_bus->i2c_adap);
1163 1164
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
1165 1166
				   &i2c_bus->i2c_adap,
				   &dvico_xc5000_tunerconfig);
1167
		break;
1168 1169 1170
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
		i2c_bus = &dev->i2c_bus[port->nr - 1];

1171
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1172 1173
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
1174
		if (fe0->dvb.frontend != NULL) {
1175 1176 1177 1178 1179 1180
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
1181
				.fname       = XC2028_DEFAULT_FIRMWARE,
1182 1183 1184 1185
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

1186
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1187 1188 1189 1190 1191
					&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215
	}
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
		i2c_bus = &dev->i2c_bus[port->nr - 1];
		/* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
		/* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */

		if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
			return -ENODEV;

		if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
			printk(KERN_WARNING "Unable to enumerate dib7000p\n");
			return -ENODEV;
		}
		fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
		if (fe0->dvb.frontend != NULL) {
			struct i2c_adapter *tun_i2c;

			fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
			memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
			tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
			if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
				return -ENODEV;
		}
		break;
1216
	}
1217
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1218
	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1219
	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1220 1221
		i2c_bus = &dev->i2c_bus[0];

1222
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1223 1224
			&dvico_fusionhdtv_xc3028,
			&i2c_bus->i2c_adap);
1225
		if (fe0->dvb.frontend != NULL) {
1226 1227 1228 1229 1230 1231
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
1232
				.fname       = XC2028_DEFAULT_FIRMWARE,
1233 1234 1235 1236
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

1237
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1238 1239 1240 1241
				&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
1242
		break;
1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(zl10353_attach,
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			struct dvb_frontend	*fe;
			struct xc4000_config	cfg = {
				.i2c_address	  = 0x61,
				.default_pm	  = 0,
				.dvb_amplitude	  = 134,
				.set_smoothedcvbs = 1,
				.if_khz		  = 4560
			};

			fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
					&dev->i2c_bus[1].i2c_adap, &cfg);
1261 1262 1263 1264 1265
			if (!fe) {
				printk(KERN_ERR "%s/2: xc4000 attach failed\n",
				       dev->name);
				goto frontend_detach;
			}
1266 1267
		}
		break;
1268
	case CX23885_BOARD_TBS_6920:
1269
		i2c_bus = &dev->i2c_bus[1];
1270 1271

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1272 1273
					&tbs_cx24116_config,
					&i2c_bus->i2c_adap);
1274
		if (fe0->dvb.frontend != NULL)
1275
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1276

1277
		break;
1278 1279 1280 1281 1282 1283 1284 1285 1286
	case CX23885_BOARD_TBS_6980:
	case CX23885_BOARD_TBS_6981:
		i2c_bus = &dev->i2c_bus[1];

		switch (port->nr) {
		/* PORT B */
		case 1:
			fe0->dvb.frontend = dvb_attach(cx24117_attach,
					&tbs_cx24117_config,
1287
					&i2c_bus->i2c_adap);
1288 1289 1290 1291 1292
			break;
		/* PORT C */
		case 2:
			fe0->dvb.frontend = dvb_attach(cx24117_attach,
					&tbs_cx24117_config,
1293
					&i2c_bus->i2c_adap);
1294 1295 1296
			break;
		}
		break;
1297 1298 1299
	case CX23885_BOARD_TEVII_S470:
		i2c_bus = &dev->i2c_bus[1];

1300 1301 1302
		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
1303 1304 1305
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(ts2020_attach, fe0->dvb.frontend,
				&tevii_ts2020_config, &i2c_bus->i2c_adap);
1306
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1307
		}
1308

1309
		break;
1310 1311 1312 1313 1314 1315 1316
	case CX23885_BOARD_DVBWORLD_2005:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&dvbworld_cx24116_config,
			&i2c_bus->i2c_adap);
		break;
1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		i2c_bus = &dev->i2c_bus[0];
		switch (port->nr) {
		/* port B */
		case 1:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 0);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_a,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1333 1334
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x09))
1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		/* port C */
		case 2:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 1);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_b,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1354 1355
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x0a))
1356 1357 1358 1359 1360 1361 1362 1363
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		}
		break;
1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375
	case CX23885_BOARD_MYGICA_X8506:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&mygica_x8506_lgs8gl5_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&mygica_x8506_xc5000_config);
		}
1376
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1377
		break;
1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391
	case CX23885_BOARD_MYGICA_X8507:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
			&mygica_x8507_mb86a20s_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
			fe0->dvb.frontend,
			&i2c_bus2->i2c_adap,
			&mygica_x8507_xc5000_config);
		}
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
		break;
1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&magicpro_prohdtve2_lgs8g75_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&magicpro_prohdtve2_xc5000_config);
		}
1404
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1405
		break;
1406
	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

		break;
1421
	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1422 1423 1424 1425 1426 1427 1428 1429 1430
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);
		break;
1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460
	case CX23885_BOARD_MYGICA_X8558PRO:
		switch (port->nr) {
		/* port B */
		case 1:
			i2c_bus = &dev->i2c_bus[0];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg1,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg1);
			}
			break;
		/* port C */
		case 2:
			i2c_bus = &dev->i2c_bus[1];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg2,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg2);
			}
			break;
		}
		break;
1461 1462 1463 1464 1465 1466 1467 1468 1469
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		i2c_bus = &dev->i2c_bus[0];
		mfe_shared = 1;/* MFE */
		port->frontends.gate = 0;/* not clear for me yet */
		/* ports B, C */
		/* MFE frontend 1 DVB-T */
		fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
1470
		if (fe0->dvb.frontend != NULL) {
1471 1472 1473 1474 1475
			if (NULL == dvb_attach(xc5000_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
1476 1477 1478
			/* load xc5000 firmware */
			fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
		}
1479
		/* MFE frontend 2 */
H
Hans Verkuil 已提交
1480
		fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495
		if (fe1 == NULL)
			goto frontend_detach;
		/* DVB-C init */
		fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
		if (fe1->dvb.frontend != NULL) {
			fe1->dvb.frontend->id = 1;
			if (NULL == dvb_attach(xc5000_attach,
					fe1->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
		}
		break;
1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528
	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];

		switch (port->nr) {
		/* port b */
		case 1:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[0],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[0],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		/* port c */
		case 2:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[1],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[1],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		}
		break;
1529 1530 1531 1532 1533 1534
	case CX23885_BOARD_TEVII_S471:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
1535 1536 1537 1538
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(ts2020_attach, fe0->dvb.frontend,
				&tevii_ts2020_config, &i2c_bus->i2c_adap);
		}
1539
		break;
1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556
	case CX23885_BOARD_PROF_8000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(stv090x_attach,
						&prof_8000_stv090x_config,
						&i2c_bus->i2c_adap,
						STV090x_DEMODULATOR_0);
		if (fe0->dvb.frontend != NULL) {
			if (!dvb_attach(stb6100_attach,
					fe0->dvb.frontend,
					&prof_8000_stb6100_config,
					&i2c_bus->i2c_adap))
				goto frontend_detach;

			fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
		}
		break;
1557 1558
	case CX23885_BOARD_HAUPPAUGE_HVR4400:
		i2c_bus = &dev->i2c_bus[0];
1559 1560 1561 1562 1563
		i2c_bus2 = &dev->i2c_bus[1];
		switch (port->nr) {
		/* port b */
		case 1:
			fe0->dvb.frontend = dvb_attach(tda10071_attach,
1564 1565
						&hauppauge_tda10071_config,
						&i2c_bus->i2c_adap);
1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
						&i2c_bus->i2c_adap,
						&hauppauge_a8293_config))
					goto frontend_detach;
			}
			break;
		/* port c */
		case 2:
			fe0->dvb.frontend = dvb_attach(si2165_attach,
					&hauppauge_hvr4400_si2165_config,
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
1579
				fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1580 1581 1582 1583 1584 1585 1586
				if (!dvb_attach(tda18271_attach,
						fe0->dvb.frontend,
						0x60, &i2c_bus2->i2c_adap,
					  &hauppauge_hvr4400_tuner_config))
					goto frontend_detach;
			}
			break;
1587 1588
		}
		break;
1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679
	case CX23885_BOARD_DVBSKY_T9580:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		switch (port->nr) {
		/* port b - satellite */
		case 1:
			/* attach frontend */
			fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
					&dvbsky_t9580_m88ds3103_config,
					&i2c_bus2->i2c_adap, &adapter);
			if (fe0->dvb.frontend == NULL)
				break;

			/* attach tuner */
			m88ts2022_config.fe = fe0->dvb.frontend;
			m88ts2022_config.clock = 27000000;
			memset(&info, 0, sizeof(struct i2c_board_info));
			strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
			info.addr = 0x60;
			info.platform_data = &m88ts2022_config;
			request_module(info.type);
			client_tuner = i2c_new_device(adapter, &info);
			if (client_tuner == NULL ||
					client_tuner->dev.driver == NULL)
				goto frontend_detach;
			if (!try_module_get(client_tuner->dev.driver->owner)) {
				i2c_unregister_device(client_tuner);
				goto frontend_detach;
			}

			/* delegate signal strength measurement to tuner */
			fe0->dvb.frontend->ops.read_signal_strength =
				fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;

			/*
			 * for setting the voltage we need to set GPIOs on
			 * the card.
			 */
			port->fe_set_voltage =
				fe0->dvb.frontend->ops.set_voltage;
			fe0->dvb.frontend->ops.set_voltage =
				dvbsky_t9580_set_voltage;

			port->i2c_client_tuner = client_tuner;

			break;
		/* port c - terrestrial/cable */
		case 2:
			/* attach frontend */
			si2168_config.i2c_adapter = &adapter;
			si2168_config.fe = &fe0->dvb.frontend;
			si2168_config.ts_mode = SI2168_TS_SERIAL;
			memset(&info, 0, sizeof(struct i2c_board_info));
			strlcpy(info.type, "si2168", I2C_NAME_SIZE);
			info.addr = 0x64;
			info.platform_data = &si2168_config;
			request_module(info.type);
			client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
			if (client_demod == NULL ||
					client_demod->dev.driver == NULL)
				goto frontend_detach;
			if (!try_module_get(client_demod->dev.driver->owner)) {
				i2c_unregister_device(client_demod);
				goto frontend_detach;
			}
			port->i2c_client_demod = client_demod;

			/* attach tuner */
			si2157_config.fe = fe0->dvb.frontend;
			memset(&info, 0, sizeof(struct i2c_board_info));
			strlcpy(info.type, "si2157", I2C_NAME_SIZE);
			info.addr = 0x60;
			info.platform_data = &si2157_config;
			request_module(info.type);
			client_tuner = i2c_new_device(adapter, &info);
			if (client_tuner == NULL ||
					client_tuner->dev.driver == NULL) {
				module_put(client_demod->dev.driver->owner);
				i2c_unregister_device(client_demod);
				goto frontend_detach;
			}
			if (!try_module_get(client_tuner->dev.driver->owner)) {
				i2c_unregister_device(client_tuner);
				module_put(client_demod->dev.driver->owner);
				i2c_unregister_device(client_demod);
				goto frontend_detach;
			}
			port->i2c_client_tuner = client_tuner;
			break;
		}
		break;
1680
	default:
1681 1682
		printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
			" isn't supported yet\n",
1683 1684 1685
		       dev->name);
		break;
	}
1686 1687

	if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1688
		printk(KERN_ERR "%s: frontend initialization failed\n",
1689 1690
		       dev->name);
		goto frontend_detach;
1691
	}
1692

1693
	/* define general-purpose callback pointer */
1694
	fe0->dvb.frontend->callback = cx23885_tuner_callback;
1695 1696 1697 1698 1699 1700 1701 1702
	if (fe1)
		fe1->dvb.frontend->callback = cx23885_tuner_callback;
#if 0
	/* Ensure all frontends negotiate bus access */
	fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
	if (fe1)
		fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
#endif
1703 1704

	/* Put the analog decoder in standby to keep it quiet */
1705
	call_all(dev, core, s_power, 0);
1706

1707 1708
	if (fe0->dvb.frontend->ops.analog_ops.standby)
		fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1709

1710
	/* register everything */
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	ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1712
					&dev->pci->dev, adapter_nr, mfe_shared);
1713
	if (ret)
1714
		goto frontend_detach;
1715

1716 1717 1718 1719 1720 1721 1722 1723
	/* init CI & MAC */
	switch (dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
		static struct netup_card_info cinfo;

		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
		memcpy(port->frontends.adapter.proposed_mac,
				cinfo.port[port->nr - 1].mac, 6);
1724 1725
		printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
			port->nr, port->frontends.adapter.proposed_mac);
1726 1727 1728 1729

		netup_ci_init(port);
		break;
		}
1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
		struct altera_ci_config netup_ci_cfg = {
			.dev = dev,/* magic number to identify*/
			.adapter = &port->frontends.adapter,/* for CI */
			.demux = &fe0->dvb.demux,/* for hw pid filter */
			.fpga_rw = netup_altera_fpga_rw,
		};

		altera_ci_init(&netup_ci_cfg, port->nr);
		break;
		}
1741 1742 1743 1744 1745 1746 1747 1748 1749
	case CX23885_BOARD_TEVII_S470: {
		u8 eeprom[256]; /* 24C02 i2c eeprom */

		if (port->nr != 1)
			break;

		/* Read entire EEPROM */
		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
		tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1750
		printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1751 1752 1753
		memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
		break;
		}
1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769
	case CX23885_BOARD_DVBSKY_T9580: {
		u8 eeprom[256]; /* 24C02 i2c eeprom */

		if (port->nr > 2)
			break;

		/* Read entire EEPROM */
		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
		tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
				sizeof(eeprom));
		printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n",
			port->nr, eeprom + 0xc0 + (port->nr-1) * 8);
		memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
			(port->nr-1) * 8, 6);
		break;
		}
1770 1771 1772
	}

	return ret;
1773 1774 1775

frontend_detach:
	port->gate_ctrl = NULL;
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1776
	vb2_dvb_dealloc_frontends(&port->frontends);
1777
	return -EINVAL;
1778 1779 1780 1781
}

int cx23885_dvb_register(struct cx23885_tsport *port)
{
1782

H
Hans Verkuil 已提交
1783
	struct vb2_dvb_frontend *fe0;
1784
	struct cx23885_dev *dev = port->dev;
1785 1786 1787
	int err, i;

	/* Here we need to allocate the correct number of frontends,
1788
	 * as reflected in the cards struct. The reality is that currently
1789 1790 1791 1792 1793 1794 1795 1796 1797
	 * no cx23885 boards support this - yet. But, if we don't modify this
	 * code then the second frontend would never be allocated (later)
	 * and fail with error before the attach in dvb_register().
	 * Without these changes we risk an OOPS later. The changes here
	 * are for safety, and should provide a good foundation for the
	 * future addition of any multi-frontend cx23885 based boards.
	 */
	printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
		port->num_frontends);
1798

1799
	for (i = 1; i <= port->num_frontends; i++) {
H
Hans Verkuil 已提交
1800 1801 1802
		struct vb2_queue *q;

		if (vb2_dvb_alloc_frontend(
1803
			&port->frontends, i) == NULL) {
1804 1805 1806 1807
			printk(KERN_ERR "%s() failed to alloc\n", __func__);
			return -ENOMEM;
		}

H
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1808
		fe0 = vb2_dvb_get_frontend(&port->frontends, i);
1809 1810
		if (!fe0)
			err = -EINVAL;
1811

1812
		dprintk(1, "%s\n", __func__);
1813
		dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1814 1815 1816 1817
			dev->board,
			dev->name,
			dev->pci_bus,
			dev->pci_slot);
1818

1819
		err = -ENODEV;
1820

1821 1822
		/* dvb stuff */
		/* We have to init the queue for each frontend on a port. */
1823
		printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
H
Hans Verkuil 已提交
1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838
		q = &fe0->dvb.dvbq;
		q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
		q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
		q->gfp_flags = GFP_DMA32;
		q->min_buffers_needed = 2;
		q->drv_priv = port;
		q->buf_struct_size = sizeof(struct cx23885_buffer);
		q->ops = &dvb_qops;
		q->mem_ops = &vb2_dma_sg_memops;
		q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
		q->lock = &dev->lock;

		err = vb2_queue_init(q);
		if (err < 0)
			return err;
1839
	}
1840 1841
	err = dvb_register(port);
	if (err != 0)
1842 1843
		printk(KERN_ERR "%s() dvb_register failed err = %d\n",
			__func__, err);
1844 1845 1846 1847 1848 1849

	return err;
}

int cx23885_dvb_unregister(struct cx23885_tsport *port)
{
H
Hans Verkuil 已提交
1850
	struct vb2_dvb_frontend *fe0;
1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865
	struct i2c_client *client;

	/* remove I2C client for tuner */
	client = port->i2c_client_tuner;
	if (client) {
		module_put(client->dev.driver->owner);
		i2c_unregister_device(client);
	}

	/* remove I2C client for demodulator */
	client = port->i2c_client_demod;
	if (client) {
		module_put(client->dev.driver->owner);
		i2c_unregister_device(client);
	}
1866

H
Hans Verkuil 已提交
1867
	fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1868

1869
	if (fe0 && fe0->dvb.frontend)
H
Hans Verkuil 已提交
1870
		vb2_dvb_unregister_bus(&port->frontends);
1871

1872 1873 1874 1875
	switch (port->dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		netup_ci_exit(port);
		break;
1876 1877 1878
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		altera_ci_release(port->dev, port->nr);
		break;
1879
	}
1880

1881 1882
	port->gate_ctrl = NULL;

1883 1884
	return 0;
}