cx23885-dvb.c 38.6 KB
Newer Older
1 2 3
/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
4
 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
#include <linux/suspend.h>

#include "cx23885.h"
#include <media/v4l2-common.h>

33
#include "dvb_ca_en50221.h"
34
#include "s5h1409.h"
35
#include "s5h1411.h"
36
#include "mt2131.h"
37
#include "tda8290.h"
38
#include "tda18271.h"
39
#include "lgdt330x.h"
40
#include "xc4000.h"
41
#include "xc5000.h"
42
#include "max2165.h"
43
#include "tda10048.h"
44
#include "tuner-xc2028.h"
45
#include "tuner-simple.h"
46 47
#include "dib7000p.h"
#include "dibx000_common.h"
48
#include "zl10353.h"
49
#include "stv0900.h"
50
#include "stv0900_reg.h"
51 52
#include "stv6110.h"
#include "lnbh24.h"
53
#include "cx24116.h"
54
#include "cimax2.h"
55
#include "lgs8gxx.h"
56 57
#include "netup-eeprom.h"
#include "netup-init.h"
58
#include "lgdt3305.h"
59
#include "atbm8830.h"
60 61
#include "ds3000.h"
#include "cx23885-f300.h"
62 63
#include "altera-ci.h"
#include "stv0367.h"
64 65
#include "drxk.h"
#include "mt2063.h"
66 67 68
#include "stv090x.h"
#include "stb6100.h"
#include "stb6100_cfg.h"
69 70
#include "tda10071.h"
#include "a8293.h"
71

72
static unsigned int debug;
73

74 75 76 77
#define dprintk(level, fmt, arg...)\
	do { if (debug >= level)\
		printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
	} while (0)
78 79 80

/* ------------------------------------------------------------------ */

81 82 83 84
static unsigned int alt_tuner;
module_param(alt_tuner, int, 0644);
MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");

85 86
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);

87 88
/* ------------------------------------------------------------------ */

89 90 91 92 93 94 95 96 97 98 99 100 101
static int dvb_buf_setup(struct videobuf_queue *q,
			 unsigned int *count, unsigned int *size)
{
	struct cx23885_tsport *port = q->priv_data;

	port->ts_packet_size  = 188 * 4;
	port->ts_packet_count = 32;

	*size  = port->ts_packet_size * port->ts_packet_count;
	*count = 32;
	return 0;
}

102 103
static int dvb_buf_prepare(struct videobuf_queue *q,
			   struct videobuf_buffer *vb, enum v4l2_field field)
104 105
{
	struct cx23885_tsport *port = q->priv_data;
106
	return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
107 108 109 110 111
}

static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
	struct cx23885_tsport *port = q->priv_data;
112
	cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
113 114
}

115 116
static void dvb_buf_release(struct videobuf_queue *q,
			    struct videobuf_buffer *vb)
117
{
118
	cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
119 120
}

121 122
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe);

123 124 125 126 127 128 129 130 131 132 133 134 135 136
static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
{
	struct videobuf_dvb_frontends *f;
	struct videobuf_dvb_frontend *fe;

	f = &port->frontends;

	if (f->gate <= 1) /* undefined or fe0 */
		fe = videobuf_dvb_get_frontend(f, 1);
	else
		fe = videobuf_dvb_get_frontend(f, f->gate);

	if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
		fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
137 138 139 140 141 142

	/*
	 * FIXME: Improve this path to avoid calling the
	 * cx23885_dvb_set_frontend() every time it passes here.
	 */
	cx23885_dvb_set_frontend(fe->dvb.frontend);
143 144
}

145 146 147 148 149 150 151
static struct videobuf_queue_ops dvb_qops = {
	.buf_setup    = dvb_buf_setup,
	.buf_prepare  = dvb_buf_prepare,
	.buf_queue    = dvb_buf_queue,
	.buf_release  = dvb_buf_release,
};

152
static struct s5h1409_config hauppauge_generic_config = {
153 154 155
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
156
	.qam_if        = 44000,
157
	.inversion     = S5H1409_INVERSION_OFF,
158 159
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
160 161
};

162 163 164 165
static struct tda10048_config hauppauge_hvr1200_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
166
	.inversion        = TDA10048_INVERSION_ON,
167 168 169
	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3800,
	.dtv8_if_freq_khz = TDA10048_IF_4300,
170
	.clk_freq_khz     = TDA10048_CLK_16000,
171 172
};

173 174 175 176 177
static struct tda10048_config hauppauge_hvr1210_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
	.inversion        = TDA10048_INVERSION_ON,
178 179 180
	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3500,
	.dtv8_if_freq_khz = TDA10048_IF_4000,
181 182 183
	.clk_freq_khz     = TDA10048_CLK_16000,
};

184 185 186 187 188 189
static struct s5h1409_config hauppauge_ezqam_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.qam_if        = 4000,
	.inversion     = S5H1409_INVERSION_ON,
190 191
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
192 193
};

194
static struct s5h1409_config hauppauge_hvr1800lp_config = {
195 196 197
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
198
	.qam_if        = 44000,
199
	.inversion     = S5H1409_INVERSION_OFF,
200 201
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
202 203
};

204 205 206 207 208
static struct s5h1409_config hauppauge_hvr1500_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.inversion     = S5H1409_INVERSION_OFF,
209 210
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
211 212
};

213
static struct mt2131_config hauppauge_generic_tunerconfig = {
214 215 216
	0x61
};

217 218 219 220 221 222
static struct lgdt330x_config fusionhdtv_5_express = {
	.demod_address = 0x0e,
	.demod_chip = LGDT3303,
	.serial_mpeg = 0x40,
};

223 224 225 226 227 228
static struct s5h1409_config hauppauge_hvr1500q_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
229 230
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
231 232
};

233 234 235 236 237 238 239 240 241 242
static struct s5h1409_config dvico_s5h1409_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

243 244 245 246 247 248 249 250 251 252
static struct s5h1411_config dvico_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_ON,
	.qam_if        = S5H1411_IF_44000,
	.vsb_if        = S5H1411_IF_44000,
	.inversion     = S5H1411_INVERSION_OFF,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

253 254 255 256 257 258 259 260 261 262
static struct s5h1411_config hcw_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_OFF,
	.vsb_if        = S5H1411_IF_44000,
	.qam_if        = S5H1411_IF_4000,
	.inversion     = S5H1411_INVERSION_ON,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

263
static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
264 265
	.i2c_address      = 0x61,
	.if_khz           = 5380,
266 267
};

268 269 270 271 272
static struct xc5000_config dvico_xc5000_tunerconfig = {
	.i2c_address      = 0x64,
	.if_khz           = 5380,
};

273 274 275 276
static struct tda829x_config tda829x_no_probe = {
	.probe_tuner = TDA829X_DONT_PROBE,
};

277
static struct tda18271_std_map hauppauge_tda18271_std_map = {
278 279 280 281
	.atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
		      .if_lvl = 6, .rfagc_top = 0x37 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
		      .if_lvl = 6, .rfagc_top = 0x37 },
282 283
};

284 285 286 287 288 289 290 291 292
static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
	.dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
		      .if_lvl = 1, .rfagc_top = 0x37, },
};

293 294 295
static struct tda18271_config hauppauge_tda18271_config = {
	.std_map = &hauppauge_tda18271_std_map,
	.gate    = TDA18271_GATE_ANALOG,
296
	.output_opt = TDA18271_OUTPUT_LT_OFF,
297 298
};

299
static struct tda18271_config hauppauge_hvr1200_tuner_config = {
300
	.std_map = &hauppauge_hvr1200_tda18271_std_map,
301
	.gate    = TDA18271_GATE_ANALOG,
302
	.output_opt = TDA18271_OUTPUT_LT_OFF,
303 304
};

305 306
static struct tda18271_config hauppauge_hvr1210_tuner_config = {
	.gate    = TDA18271_GATE_DIGITAL,
307
	.output_opt = TDA18271_OUTPUT_LT_OFF,
308 309
};

310
static struct tda18271_std_map hauppauge_hvr127x_std_map = {
311 312 313 314 315 316
	.atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x58 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x58 },
};

317 318
static struct tda18271_config hauppauge_hvr127x_config = {
	.std_map = &hauppauge_hvr127x_std_map,
319
	.output_opt = TDA18271_OUTPUT_LT_OFF,
320 321
};

322
static struct lgdt3305_config hauppauge_lgdt3305_config = {
323 324 325 326 327 328 329 330 331 332
	.i2c_addr           = 0x0e,
	.mpeg_mode          = LGDT3305_MPEG_SERIAL,
	.tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
	.tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
	.deny_i2c_rptr      = 1,
	.spectral_inversion = 1,
	.qam_if_khz         = 4000,
	.vsb_if_khz         = 3250,
};

333
static struct dibx000_agc_config xc3028_agc_config = {
334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378
	BAND_VHF | BAND_UHF,	/* band_caps */

	/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
	 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
	 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
	 * P_agc_nb_est=2, P_agc_write=0
	 */
	(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
		(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */

	712,	/* inv_gain */
	21,	/* time_stabiliz */

	0,	/* alpha_level */
	118,	/* thlock */

	0,	/* wbd_inv */
	2867,	/* wbd_ref */
	0,	/* wbd_sel */
	2,	/* wbd_alpha */

	0,	/* agc1_max */
	0,	/* agc1_min */
	39718,	/* agc2_max */
	9930,	/* agc2_min */
	0,	/* agc1_pt1 */
	0,	/* agc1_pt2 */
	0,	/* agc1_pt3 */
	0,	/* agc1_slope1 */
	0,	/* agc1_slope2 */
	0,	/* agc2_pt1 */
	128,	/* agc2_pt2 */
	29,	/* agc2_slope1 */
	29,	/* agc2_slope2 */

	17,	/* alpha_mant */
	27,	/* alpha_exp */
	23,	/* beta_mant */
	51,	/* beta_exp */

	1,	/* perform_agc_softsplit */
};

/* PLL Configuration for COFDM BW_MHz = 8.000000
 * With external clock = 30.000000 */
379
static struct dibx000_bandwidth_config xc3028_bw_config = {
380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418
	60000,	/* internal */
	30000,	/* sampling */
	1,	/* pll_cfg: prediv */
	8,	/* pll_cfg: ratio */
	3,	/* pll_cfg: range */
	1,	/* pll_cfg: reset */
	0,	/* pll_cfg: bypass */
	0,	/* misc: refdiv */
	0,	/* misc: bypclk_div */
	1,	/* misc: IO_CLK_en_core */
	1,	/* misc: ADClkSrc */
	0,	/* misc: modulo */
	(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
	(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
	20452225, /* timf */
	30000000  /* xtal_hz */
};

static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
	.output_mpeg2_in_188_bytes = 1,
	.hostbus_diversity = 1,
	.tuner_is_baseband = 0,
	.update_lna  = NULL,

	.agc_config_count = 1,
	.agc = &xc3028_agc_config,
	.bw  = &xc3028_bw_config,

	.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,

	.pwm_freq_div = 0,
	.agc_control  = NULL,
	.spur_protect = 0,

	.output_mode = OUTMODE_MPEG2_SERIAL,
};

419 420 421 422
static struct zl10353_config dvico_fusionhdtv_xc3028 = {
	.demod_address = 0x0f,
	.if2           = 45600,
	.no_tuner      = 1,
423
	.disable_i2c_gate_ctrl = 1,
424 425
};

426 427 428 429 430 431 432 433 434 435 436 437 438
static struct stv0900_reg stv0900_ts_regs[] = {
	{ R0900_TSGENERAL, 0x00 },
	{ R0900_P1_TSSPEED, 0x40 },
	{ R0900_P2_TSSPEED, 0x40 },
	{ R0900_P1_TSCFGM, 0xc0 },
	{ R0900_P2_TSCFGM, 0xc0 },
	{ R0900_P1_TSCFGH, 0xe0 },
	{ R0900_P2_TSCFGH, 0xe0 },
	{ R0900_P1_TSCFGL, 0x20 },
	{ R0900_P2_TSCFGL, 0x20 },
	{ 0xffff, 0xff }, /* terminate */
};

439 440
static struct stv0900_config netup_stv0900_config = {
	.demod_address = 0x68,
441
	.demod_mode = 1, /* dual */
442
	.xtal = 8000000,
443 444
	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
	.diseqc_mode = 2,/* 2/3 PWM */
445
	.ts_config_regs = stv0900_ts_regs,
446 447 448 449 450 451 452 453
	.tun1_maddress = 0,/* 0x60 */
	.tun2_maddress = 3,/* 0x63 */
	.tun1_adc = 1,/* 1 Vpp */
	.tun2_adc = 1,/* 1 Vpp */
};

static struct stv6110_config netup_stv6110_tunerconfig_a = {
	.i2c_address = 0x60,
454 455
	.mclk = 16000000,
	.clk_div = 1,
456
	.gain = 8, /* +16 dB  - maximum gain */
457 458 459 460
};

static struct stv6110_config netup_stv6110_tunerconfig_b = {
	.i2c_address = 0x63,
461 462
	.mclk = 16000000,
	.clk_div = 1,
463
	.gain = 8, /* +16 dB  - maximum gain */
464 465
};

466
static struct cx24116_config tbs_cx24116_config = {
467
	.demod_address = 0x55,
468 469
};

470 471
static struct ds3000_config tevii_ds3000_config = {
	.demod_address = 0x68,
472 473
};

474 475 476 477
static struct cx24116_config dvbworld_cx24116_config = {
	.demod_address = 0x05,
};

478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496
static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
	.prod = LGS8GXX_PROD_LGS8GL5,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 5380, /* 5.38 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 0,
	.if_neg_edge = 0,
};

static struct xc5000_config mygica_x8506_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 5380,
};

497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532
static struct stv090x_config prof_8000_stv090x_config = {
        .device                 = STV0903,
        .demod_mode             = STV090x_SINGLE,
        .clk_mode               = STV090x_CLK_EXT,
        .xtal                   = 27000000,
        .address                = 0x6A,
        .ts1_mode               = STV090x_TSMODE_PARALLEL_PUNCTURED,
        .repeater_level         = STV090x_RPTLEVEL_64,
        .adc1_range             = STV090x_ADC_2Vpp,
        .diseqc_envelope_mode   = false,

        .tuner_get_frequency    = stb6100_get_frequency,
        .tuner_set_frequency    = stb6100_set_frequency,
        .tuner_set_bandwidth    = stb6100_set_bandwidth,
        .tuner_get_bandwidth    = stb6100_get_bandwidth,
};

static struct stb6100_config prof_8000_stb6100_config = {
	.tuner_address = 0x60,
	.refclock = 27000000,
};

static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
{
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	if (voltage == SEC_VOLTAGE_18)
		cx_write(MC417_RWD, 0x00001e00);
	else if (voltage == SEC_VOLTAGE_13)
		cx_write(MC417_RWD, 0x00001a00);
	else
		cx_write(MC417_RWD, 0x00001800);
	return 0;
}

533
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
534
{
535
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
536 537 538 539 540
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
541
		switch (p->modulation) {
542 543 544 545 546 547 548 549 550 551
		case VSB_8:
			cx23885_gpio_clear(dev, GPIO_5);
			break;
		case QAM_64:
		case QAM_256:
		default:
			cx23885_gpio_set(dev, GPIO_5);
			break;
		}
		break;
552 553 554 555 556
	case CX23885_BOARD_MYGICA_X8506:
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		/* Select Digital TV */
		cx23885_gpio_set(dev, GPIO_0);
		break;
557
	}
558
	return 0;
559 560
}

561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580
static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
	.prod = LGS8GXX_PROD_LGS8G75,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 6500, /* 6.50 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 1,
	.adc_vpp = 2, /* 1.6 Vpp */
	.if_neg_edge = 1,
};

static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 6500,
};

581 582 583 584 585 586 587 588 589
static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 0,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
590 591 592
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608
};

static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};

static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 1,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
609 610 611
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
612 613 614 615 616 617
};

static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};
618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645
static struct stv0367_config netup_stv0367_config[] = {
	{
		.demod_address = 0x1c,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	}, {
		.demod_address = 0x1d,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	},
};

static struct xc5000_config netup_xc5000_config[] = {
	{
		.i2c_address = 0x61,
		.if_khz = 4500,
	}, {
		.i2c_address = 0x64,
		.if_khz = 4500,
	},
};

646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663
static struct drxk_config terratec_drxk_config[] = {
	{
		.adr = 0x29,
		.no_i2c_bridge = 1,
	}, {
		.adr = 0x2a,
		.no_i2c_bridge = 1,
	},
};

static struct mt2063_config terratec_mt2063_config[] = {
	{
		.tuner_address = 0x60,
	}, {
		.tuner_address = 0x67,
	},
};

664 665 666 667 668 669 670 671 672 673 674 675 676 677
static const struct tda10071_config hauppauge_tda10071_config = {
	.i2c_address = 0x05,
	.tuner_i2c_addr = 0x54,
	.i2c_wr_max = 64,
	.ts_mode = TDA10071_TS_SERIAL,
	.spec_inv = 0,
	.xtal = 40444000, /* 40.444 MHz */
	.pll_multiplier = 20,
};

static const struct a8293_config hauppauge_a8293_config = {
	.i2c_addr = 0x0b,
};

678
static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
679 680 681
{
	struct cx23885_dev *dev = (struct cx23885_dev *)device;
	unsigned long timeout = jiffies + msecs_to_jiffies(1);
682
	uint32_t mem = 0;
683

684
	mem = cx_read(MC417_RWD);
685 686 687 688 689 690 691 692 693
	if (read)
		cx_set(MC417_OEN, ALT_DATA);
	else {
		cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
		mem &= ~ALT_DATA;
		mem |= (data & ALT_DATA);
	}

	if (flag)
694
		mem |= ALT_AD_RG;
695
	else
696
		mem &= ~ALT_AD_RG;
697

698
	mem &= ~ALT_CS;
699
	if (read)
700
		mem = (mem & ~ALT_RD) | ALT_WR;
701
	else
702 703 704
		mem = (mem & ~ALT_WR) | ALT_RD;

	cx_write(MC417_RWD, mem);  /* start RW cycle */
705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720

	for (;;) {
		mem = cx_read(MC417_RWD);
		if ((mem & ALT_RDY) == 0)
			break;
		if (time_after(jiffies, timeout))
			break;
		udelay(1);
	}

	cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
	if (read)
		return mem & ALT_DATA;

	return 0;
};
721

722 723 724
static int dvb_register(struct cx23885_tsport *port)
{
	struct cx23885_dev *dev = port->dev;
725
	struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
726 727
	struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
	int mfe_shared = 0; /* bus not shared by default */
728
	int ret;
729

730
	/* Get the first frontend */
731
	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
732 733
	if (!fe0)
		return -EINVAL;
734 735

	/* init struct videobuf_dvb */
736
	fe0->dvb.name = dev->name;
737

738 739 740 741 742 743
	/* multi-frontend gate control is undefined or defaults to fe0 */
	port->frontends.gate = 0;

	/* Sets the gate control callback to be used by i2c command calls */
	port->gate_ctrl = cx23885_dvb_gate_ctrl;

744 745
	/* init frontend */
	switch (dev->board) {
746
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
747
		i2c_bus = &dev->i2c_bus[0];
748
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
749
						&hauppauge_generic_config,
750
						&i2c_bus->i2c_adap);
751 752
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
753
				   &i2c_bus->i2c_adap,
754
				   &hauppauge_generic_tunerconfig, 0);
755 756
		}
		break;
757
	case CX23885_BOARD_HAUPPAUGE_HVR1270:
758
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
759 760
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
761
					       &hauppauge_lgdt3305_config,
762 763 764 765
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
766
				   &hauppauge_hvr127x_config);
767 768
		}
		break;
769
	case CX23885_BOARD_HAUPPAUGE_HVR1255:
770
	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
771 772 773 774 775 776 777 778 779
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
					       &hcw_s5h1411_config,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
				   &hauppauge_tda18271_config);
		}
780 781 782 783 784

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

785
		break;
786 787
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		i2c_bus = &dev->i2c_bus[0];
788
		switch (alt_tuner) {
789
		case 1:
790
			fe0->dvb.frontend =
791 792 793
				dvb_attach(s5h1409_attach,
					   &hauppauge_ezqam_config,
					   &i2c_bus->i2c_adap);
794 795
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(tda829x_attach, fe0->dvb.frontend,
796
					   &dev->i2c_bus[1].i2c_adap, 0x42,
797
					   &tda829x_no_probe);
798
				dvb_attach(tda18271_attach, fe0->dvb.frontend,
799
					   0x60, &dev->i2c_bus[1].i2c_adap,
800
					   &hauppauge_tda18271_config);
801 802 803 804
			}
			break;
		case 0:
		default:
805
			fe0->dvb.frontend =
806 807 808
				dvb_attach(s5h1409_attach,
					   &hauppauge_generic_config,
					   &i2c_bus->i2c_adap);
809 810
			if (fe0->dvb.frontend != NULL)
				dvb_attach(mt2131_attach, fe0->dvb.frontend,
811 812 813 814 815
					   &i2c_bus->i2c_adap,
					   &hauppauge_generic_tunerconfig, 0);
			break;
		}
		break;
816
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
817
		i2c_bus = &dev->i2c_bus[0];
818
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
819
						&hauppauge_hvr1800lp_config,
820
						&i2c_bus->i2c_adap);
821 822
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
823
				   &i2c_bus->i2c_adap,
824 825 826
				   &hauppauge_generic_tunerconfig, 0);
		}
		break;
827
	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
828
		i2c_bus = &dev->i2c_bus[0];
829
		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
830
						&fusionhdtv_5_express,
831
						&i2c_bus->i2c_adap);
832 833
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
834 835
				   &i2c_bus->i2c_adap, 0x61,
				   TUNER_LG_TDVS_H06XF);
836 837
		}
		break;
838 839
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
		i2c_bus = &dev->i2c_bus[1];
840
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
841 842
						&hauppauge_hvr1500q_config,
						&dev->i2c_bus[0].i2c_adap);
843 844
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
845 846
				   &i2c_bus->i2c_adap,
				   &hauppauge_hvr1500q_tunerconfig);
847
		break;
848 849
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
		i2c_bus = &dev->i2c_bus[1];
850
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
851 852
						&hauppauge_hvr1500_config,
						&dev->i2c_bus[0].i2c_adap);
853
		if (fe0->dvb.frontend != NULL) {
854 855 856 857 858 859
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
860
				.fname       = XC2028_DEFAULT_FIRMWARE,
861
				.max_len     = 64,
862
				.demod       = XC3028_FE_OREN538,
863 864 865
			};

			fe = dvb_attach(xc2028_attach,
866
					fe0->dvb.frontend, &cfg);
867 868 869 870
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
871
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
872
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
873
		i2c_bus = &dev->i2c_bus[0];
874
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
875 876
			&hauppauge_hvr1200_config,
			&i2c_bus->i2c_adap);
877 878
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda829x_attach, fe0->dvb.frontend,
879 880
				&dev->i2c_bus[1].i2c_adap, 0x42,
				&tda829x_no_probe);
881
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
882 883
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1200_tuner_config);
884 885 886 887 888 889 890 891 892 893 894
		}
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1210:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
			&hauppauge_hvr1210_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1210_tuner_config);
895 896
		}
		break;
897 898
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		i2c_bus = &dev->i2c_bus[0];
899
		fe0->dvb.frontend = dvb_attach(dib7000p_attach,
900 901
			&i2c_bus->i2c_adap,
			0x12, &hauppauge_hvr1400_dib7000_config);
902
		if (fe0->dvb.frontend != NULL) {
903 904 905 906 907 908
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x64,
			};
			static struct xc2028_ctrl ctl = {
909
				.fname   = XC3028L_DEFAULT_FIRMWARE,
910
				.max_len = 64,
911
				.demod   = XC3028_FE_DIBCOM52,
912 913
				/* This is true for all demods with
					v36 firmware? */
914
				.type    = XC2028_D2633,
915 916 917
			};

			fe = dvb_attach(xc2028_attach,
918
					fe0->dvb.frontend, &cfg);
919 920 921 922
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
923 924 925
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
		i2c_bus = &dev->i2c_bus[port->nr - 1];

926
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
927 928
						&dvico_s5h1409_config,
						&i2c_bus->i2c_adap);
929 930
		if (fe0->dvb.frontend == NULL)
			fe0->dvb.frontend = dvb_attach(s5h1411_attach,
931 932
							&dvico_s5h1411_config,
							&i2c_bus->i2c_adap);
933 934
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
935 936
				   &i2c_bus->i2c_adap,
				   &dvico_xc5000_tunerconfig);
937
		break;
938 939 940
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
		i2c_bus = &dev->i2c_bus[port->nr - 1];

941
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
942 943
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
944
		if (fe0->dvb.frontend != NULL) {
945 946 947 948 949 950
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
951
				.fname       = XC2028_DEFAULT_FIRMWARE,
952 953 954 955
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

956
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
957 958 959 960 961 962
					&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
	}
963
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
964
	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
965
	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
966 967
		i2c_bus = &dev->i2c_bus[0];

968
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
969 970
			&dvico_fusionhdtv_xc3028,
			&i2c_bus->i2c_adap);
971
		if (fe0->dvb.frontend != NULL) {
972 973 974 975 976 977
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
978
				.fname       = XC2028_DEFAULT_FIRMWARE,
979 980 981 982
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

983
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
984 985 986 987
				&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
988
		break;
989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(zl10353_attach,
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			struct dvb_frontend	*fe;
			struct xc4000_config	cfg = {
				.i2c_address	  = 0x61,
				.default_pm	  = 0,
				.dvb_amplitude	  = 134,
				.set_smoothedcvbs = 1,
				.if_khz		  = 4560
			};

			fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
					&dev->i2c_bus[1].i2c_adap, &cfg);
1007 1008 1009 1010 1011
			if (!fe) {
				printk(KERN_ERR "%s/2: xc4000 attach failed\n",
				       dev->name);
				goto frontend_detach;
			}
1012 1013
		}
		break;
1014
	case CX23885_BOARD_TBS_6920:
1015
		i2c_bus = &dev->i2c_bus[1];
1016 1017

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1018 1019
					&tbs_cx24116_config,
					&i2c_bus->i2c_adap);
1020
		if (fe0->dvb.frontend != NULL)
1021
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1022

1023 1024 1025 1026
		break;
	case CX23885_BOARD_TEVII_S470:
		i2c_bus = &dev->i2c_bus[1];

1027 1028 1029
		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
1030
		if (fe0->dvb.frontend != NULL)
1031
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1032

1033
		break;
1034 1035 1036 1037 1038 1039 1040
	case CX23885_BOARD_DVBWORLD_2005:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&dvbworld_cx24116_config,
			&i2c_bus->i2c_adap);
		break;
1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		i2c_bus = &dev->i2c_bus[0];
		switch (port->nr) {
		/* port B */
		case 1:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 0);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_a,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1057 1058
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x09))
1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		/* port C */
		case 2:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 1);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_b,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1078 1079
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x0a))
1080 1081 1082 1083 1084 1085 1086 1087
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		}
		break;
1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100
	case CX23885_BOARD_MYGICA_X8506:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&mygica_x8506_lgs8gl5_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&mygica_x8506_xc5000_config);
		}
		break;
1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&magicpro_prohdtve2_lgs8g75_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&magicpro_prohdtve2_xc5000_config);
		}
		break;
1114
	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

		break;
1129
	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1130 1131 1132 1133 1134 1135 1136 1137 1138
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);
		break;
1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168
	case CX23885_BOARD_MYGICA_X8558PRO:
		switch (port->nr) {
		/* port B */
		case 1:
			i2c_bus = &dev->i2c_bus[0];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg1,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg1);
			}
			break;
		/* port C */
		case 2:
			i2c_bus = &dev->i2c_bus[1];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg2,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg2);
			}
			break;
		}
		break;
1169 1170 1171 1172 1173 1174 1175 1176 1177
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		i2c_bus = &dev->i2c_bus[0];
		mfe_shared = 1;/* MFE */
		port->frontends.gate = 0;/* not clear for me yet */
		/* ports B, C */
		/* MFE frontend 1 DVB-T */
		fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
1178
		if (fe0->dvb.frontend != NULL) {
1179 1180 1181 1182 1183
			if (NULL == dvb_attach(xc5000_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
1184 1185 1186
			/* load xc5000 firmware */
			fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
		}
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203
		/* MFE frontend 2 */
		fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
		if (fe1 == NULL)
			goto frontend_detach;
		/* DVB-C init */
		fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
		if (fe1->dvb.frontend != NULL) {
			fe1->dvb.frontend->id = 1;
			if (NULL == dvb_attach(xc5000_attach,
					fe1->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
		}
		break;
1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236
	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];

		switch (port->nr) {
		/* port b */
		case 1:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[0],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[0],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		/* port c */
		case 2:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[1],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[1],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		}
		break;
1237 1238 1239 1240 1241 1242 1243
	case CX23885_BOARD_TEVII_S471:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
		break;
1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260
	case CX23885_BOARD_PROF_8000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(stv090x_attach,
						&prof_8000_stv090x_config,
						&i2c_bus->i2c_adap,
						STV090x_DEMODULATOR_0);
		if (fe0->dvb.frontend != NULL) {
			if (!dvb_attach(stb6100_attach,
					fe0->dvb.frontend,
					&prof_8000_stb6100_config,
					&i2c_bus->i2c_adap))
				goto frontend_detach;

			fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
		}
		break;
1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271
	case CX23885_BOARD_HAUPPAUGE_HVR4400:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10071_attach,
						&hauppauge_tda10071_config,
						&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(a8293_attach, fe0->dvb.frontend,
				   &i2c_bus->i2c_adap,
				   &hauppauge_a8293_config);
		}
		break;
1272
	default:
1273 1274
		printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
			" isn't supported yet\n",
1275 1276 1277
		       dev->name);
		break;
	}
1278 1279

	if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1280
		printk(KERN_ERR "%s: frontend initialization failed\n",
1281 1282
		       dev->name);
		goto frontend_detach;
1283
	}
1284

1285
	/* define general-purpose callback pointer */
1286
	fe0->dvb.frontend->callback = cx23885_tuner_callback;
1287 1288 1289 1290 1291 1292 1293 1294
	if (fe1)
		fe1->dvb.frontend->callback = cx23885_tuner_callback;
#if 0
	/* Ensure all frontends negotiate bus access */
	fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
	if (fe1)
		fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
#endif
1295 1296

	/* Put the analog decoder in standby to keep it quiet */
1297
	call_all(dev, core, s_power, 0);
1298

1299 1300
	if (fe0->dvb.frontend->ops.analog_ops.standby)
		fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1301

1302
	/* register everything */
1303
	ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1304
					&dev->pci->dev, adapter_nr, mfe_shared);
1305
	if (ret)
1306
		goto frontend_detach;
1307

1308 1309 1310 1311 1312 1313 1314 1315
	/* init CI & MAC */
	switch (dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
		static struct netup_card_info cinfo;

		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
		memcpy(port->frontends.adapter.proposed_mac,
				cinfo.port[port->nr - 1].mac, 6);
1316 1317
		printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
			port->nr, port->frontends.adapter.proposed_mac);
1318 1319 1320 1321

		netup_ci_init(port);
		break;
		}
1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
		struct altera_ci_config netup_ci_cfg = {
			.dev = dev,/* magic number to identify*/
			.adapter = &port->frontends.adapter,/* for CI */
			.demux = &fe0->dvb.demux,/* for hw pid filter */
			.fpga_rw = netup_altera_fpga_rw,
		};

		altera_ci_init(&netup_ci_cfg, port->nr);
		break;
		}
1333 1334 1335 1336 1337 1338 1339 1340 1341
	case CX23885_BOARD_TEVII_S470: {
		u8 eeprom[256]; /* 24C02 i2c eeprom */

		if (port->nr != 1)
			break;

		/* Read entire EEPROM */
		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
		tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1342
		printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1343 1344 1345
		memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
		break;
		}
1346 1347 1348
	}

	return ret;
1349 1350 1351 1352 1353

frontend_detach:
	port->gate_ctrl = NULL;
	videobuf_dvb_dealloc_frontends(&port->frontends);
	return -EINVAL;
1354 1355 1356 1357
}

int cx23885_dvb_register(struct cx23885_tsport *port)
{
1358 1359

	struct videobuf_dvb_frontend *fe0;
1360
	struct cx23885_dev *dev = port->dev;
1361 1362 1363
	int err, i;

	/* Here we need to allocate the correct number of frontends,
1364
	 * as reflected in the cards struct. The reality is that currently
1365 1366 1367 1368 1369 1370 1371 1372 1373
	 * no cx23885 boards support this - yet. But, if we don't modify this
	 * code then the second frontend would never be allocated (later)
	 * and fail with error before the attach in dvb_register().
	 * Without these changes we risk an OOPS later. The changes here
	 * are for safety, and should provide a good foundation for the
	 * future addition of any multi-frontend cx23885 based boards.
	 */
	printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
		port->num_frontends);
1374

1375
	for (i = 1; i <= port->num_frontends; i++) {
1376
		if (videobuf_dvb_alloc_frontend(
1377
			&port->frontends, i) == NULL) {
1378 1379 1380 1381 1382 1383 1384
			printk(KERN_ERR "%s() failed to alloc\n", __func__);
			return -ENOMEM;
		}

		fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
		if (!fe0)
			err = -EINVAL;
1385

1386
		dprintk(1, "%s\n", __func__);
1387
		dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1388 1389 1390 1391
			dev->board,
			dev->name,
			dev->pci_bus,
			dev->pci_slot);
1392

1393
		err = -ENODEV;
1394

1395 1396
		/* dvb stuff */
		/* We have to init the queue for each frontend on a port. */
1397 1398 1399
		printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
		videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
			    &dev->pci->dev, &port->slock,
1400
			    V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1401
			    sizeof(struct cx23885_buffer), port, NULL);
1402
	}
1403 1404
	err = dvb_register(port);
	if (err != 0)
1405 1406
		printk(KERN_ERR "%s() dvb_register failed err = %d\n",
			__func__, err);
1407 1408 1409 1410 1411 1412

	return err;
}

int cx23885_dvb_unregister(struct cx23885_tsport *port)
{
1413 1414
	struct videobuf_dvb_frontend *fe0;

1415 1416 1417 1418 1419 1420 1421
	/* FIXME: in an error condition where the we have
	 * an expected number of frontends (attach problem)
	 * then this might not clean up correctly, if 1
	 * is invalid.
	 * This comment only applies to future boards IF they
	 * implement MFE support.
	 */
1422
	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1423
	if (fe0 && fe0->dvb.frontend)
1424
		videobuf_dvb_unregister_bus(&port->frontends);
1425

1426 1427 1428 1429
	switch (port->dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		netup_ci_exit(port);
		break;
1430 1431 1432
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		altera_ci_release(port->dev, port->nr);
		break;
1433
	}
1434

1435 1436
	port->gate_ctrl = NULL;

1437 1438
	return 0;
}
1439