cx23885-dvb.c 40.5 KB
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/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
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 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/kthread.h>
#include <linux/file.h>
#include <linux/suspend.h>

#include "cx23885.h"
#include <media/v4l2-common.h>

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#include "dvb_ca_en50221.h"
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#include "s5h1409.h"
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#include "s5h1411.h"
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#include "mt2131.h"
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#include "tda8290.h"
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#include "tda18271.h"
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#include "lgdt330x.h"
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#include "xc4000.h"
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#include "xc5000.h"
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#include "max2165.h"
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#include "tda10048.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
#include "dibx000_common.h"
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#include "zl10353.h"
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#include "stv0900.h"
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#include "stv0900_reg.h"
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#include "stv6110.h"
#include "lnbh24.h"
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#include "cx24116.h"
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#include "cx24117.h"
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#include "cimax2.h"
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#include "lgs8gxx.h"
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#include "netup-eeprom.h"
#include "netup-init.h"
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#include "lgdt3305.h"
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#include "atbm8830.h"
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#include "ts2020.h"
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#include "ds3000.h"
#include "cx23885-f300.h"
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#include "altera-ci.h"
#include "stv0367.h"
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#include "drxk.h"
#include "mt2063.h"
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#include "stv090x.h"
#include "stb6100.h"
#include "stb6100_cfg.h"
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#include "tda10071.h"
#include "a8293.h"
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#include "mb86a20s.h"
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static unsigned int debug;
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#define dprintk(level, fmt, arg...)\
	do { if (debug >= level)\
		printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
	} while (0)
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/* ------------------------------------------------------------------ */

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static unsigned int alt_tuner;
module_param(alt_tuner, int, 0644);
MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");

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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);

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/* ------------------------------------------------------------------ */

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static int dvb_buf_setup(struct videobuf_queue *q,
			 unsigned int *count, unsigned int *size)
{
	struct cx23885_tsport *port = q->priv_data;

	port->ts_packet_size  = 188 * 4;
	port->ts_packet_count = 32;

	*size  = port->ts_packet_size * port->ts_packet_count;
	*count = 32;
	return 0;
}

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static int dvb_buf_prepare(struct videobuf_queue *q,
			   struct videobuf_buffer *vb, enum v4l2_field field)
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{
	struct cx23885_tsport *port = q->priv_data;
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	return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
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}

static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
	struct cx23885_tsport *port = q->priv_data;
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	cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
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}

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static void dvb_buf_release(struct videobuf_queue *q,
			    struct videobuf_buffer *vb)
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{
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	cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
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}

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static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
{
	struct videobuf_dvb_frontends *f;
	struct videobuf_dvb_frontend *fe;

	f = &port->frontends;

	if (f->gate <= 1) /* undefined or fe0 */
		fe = videobuf_dvb_get_frontend(f, 1);
	else
		fe = videobuf_dvb_get_frontend(f, f->gate);

	if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
		fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
}

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static struct videobuf_queue_ops dvb_qops = {
	.buf_setup    = dvb_buf_setup,
	.buf_prepare  = dvb_buf_prepare,
	.buf_queue    = dvb_buf_queue,
	.buf_release  = dvb_buf_release,
};

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static struct s5h1409_config hauppauge_generic_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct tda10048_config hauppauge_hvr1200_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
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	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3800,
	.dtv8_if_freq_khz = TDA10048_IF_4300,
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	.clk_freq_khz     = TDA10048_CLK_16000,
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};

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static struct tda10048_config hauppauge_hvr1210_config = {
	.demod_address    = 0x10 >> 1,
	.output_mode      = TDA10048_SERIAL_OUTPUT,
	.fwbulkwritelen   = TDA10048_BULKWRITE_200,
	.inversion        = TDA10048_INVERSION_ON,
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	.dtv6_if_freq_khz = TDA10048_IF_3300,
	.dtv7_if_freq_khz = TDA10048_IF_3500,
	.dtv8_if_freq_khz = TDA10048_IF_4000,
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	.clk_freq_khz     = TDA10048_CLK_16000,
};

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static struct s5h1409_config hauppauge_ezqam_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.qam_if        = 4000,
	.inversion     = S5H1409_INVERSION_ON,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1800lp_config = {
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	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
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	.qam_if        = 44000,
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	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config hauppauge_hvr1500_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_OFF,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct mt2131_config hauppauge_generic_tunerconfig = {
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	0x61
};

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static struct lgdt330x_config fusionhdtv_5_express = {
	.demod_address = 0x0e,
	.demod_chip = LGDT3303,
	.serial_mpeg = 0x40,
};

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static struct s5h1409_config hauppauge_hvr1500q_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
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	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};

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static struct s5h1409_config dvico_s5h1409_config = {
	.demod_address = 0x32 >> 1,
	.output_mode   = S5H1409_SERIAL_OUTPUT,
	.gpio          = S5H1409_GPIO_ON,
	.qam_if        = 44000,
	.inversion     = S5H1409_INVERSION_OFF,
	.status_mode   = S5H1409_DEMODLOCKING,
	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config dvico_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_ON,
	.qam_if        = S5H1411_IF_44000,
	.vsb_if        = S5H1411_IF_44000,
	.inversion     = S5H1411_INVERSION_OFF,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct s5h1411_config hcw_s5h1411_config = {
	.output_mode   = S5H1411_SERIAL_OUTPUT,
	.gpio          = S5H1411_GPIO_OFF,
	.vsb_if        = S5H1411_IF_44000,
	.qam_if        = S5H1411_IF_4000,
	.inversion     = S5H1411_INVERSION_ON,
	.status_mode   = S5H1411_DEMODLOCKING,
	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
};

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static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
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	.i2c_address      = 0x61,
	.if_khz           = 5380,
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};

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static struct xc5000_config dvico_xc5000_tunerconfig = {
	.i2c_address      = 0x64,
	.if_khz           = 5380,
};

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static struct tda829x_config tda829x_no_probe = {
	.probe_tuner = TDA829X_DONT_PROBE,
};

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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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	.atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
		      .if_lvl = 6, .rfagc_top = 0x37 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
		      .if_lvl = 6, .rfagc_top = 0x37 },
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};

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static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
	.dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x37, },
	.dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
		      .if_lvl = 1, .rfagc_top = 0x37, },
};

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static struct tda18271_config hauppauge_tda18271_config = {
	.std_map = &hauppauge_tda18271_std_map,
	.gate    = TDA18271_GATE_ANALOG,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_config hauppauge_hvr1200_tuner_config = {
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	.std_map = &hauppauge_hvr1200_tda18271_std_map,
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	.gate    = TDA18271_GATE_ANALOG,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_config hauppauge_hvr1210_tuner_config = {
	.gate    = TDA18271_GATE_DIGITAL,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct tda18271_std_map hauppauge_hvr127x_std_map = {
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	.atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
		      .if_lvl = 1, .rfagc_top = 0x58 },
	.qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
		      .if_lvl = 1, .rfagc_top = 0x58 },
};

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static struct tda18271_config hauppauge_hvr127x_config = {
	.std_map = &hauppauge_hvr127x_std_map,
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	.output_opt = TDA18271_OUTPUT_LT_OFF,
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};

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static struct lgdt3305_config hauppauge_lgdt3305_config = {
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	.i2c_addr           = 0x0e,
	.mpeg_mode          = LGDT3305_MPEG_SERIAL,
	.tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
	.tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
	.deny_i2c_rptr      = 1,
	.spectral_inversion = 1,
	.qam_if_khz         = 4000,
	.vsb_if_khz         = 3250,
};

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static struct dibx000_agc_config xc3028_agc_config = {
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	BAND_VHF | BAND_UHF,	/* band_caps */

	/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
	 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
	 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
	 * P_agc_nb_est=2, P_agc_write=0
	 */
	(0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
		(3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */

	712,	/* inv_gain */
	21,	/* time_stabiliz */

	0,	/* alpha_level */
	118,	/* thlock */

	0,	/* wbd_inv */
	2867,	/* wbd_ref */
	0,	/* wbd_sel */
	2,	/* wbd_alpha */

	0,	/* agc1_max */
	0,	/* agc1_min */
	39718,	/* agc2_max */
	9930,	/* agc2_min */
	0,	/* agc1_pt1 */
	0,	/* agc1_pt2 */
	0,	/* agc1_pt3 */
	0,	/* agc1_slope1 */
	0,	/* agc1_slope2 */
	0,	/* agc2_pt1 */
	128,	/* agc2_pt2 */
	29,	/* agc2_slope1 */
	29,	/* agc2_slope2 */

	17,	/* alpha_mant */
	27,	/* alpha_exp */
	23,	/* beta_mant */
	51,	/* beta_exp */

	1,	/* perform_agc_softsplit */
};

/* PLL Configuration for COFDM BW_MHz = 8.000000
 * With external clock = 30.000000 */
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static struct dibx000_bandwidth_config xc3028_bw_config = {
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	60000,	/* internal */
	30000,	/* sampling */
	1,	/* pll_cfg: prediv */
	8,	/* pll_cfg: ratio */
	3,	/* pll_cfg: range */
	1,	/* pll_cfg: reset */
	0,	/* pll_cfg: bypass */
	0,	/* misc: refdiv */
	0,	/* misc: bypclk_div */
	1,	/* misc: IO_CLK_en_core */
	1,	/* misc: ADClkSrc */
	0,	/* misc: modulo */
	(3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
	(1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
	20452225, /* timf */
	30000000  /* xtal_hz */
};

static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
	.output_mpeg2_in_188_bytes = 1,
	.hostbus_diversity = 1,
	.tuner_is_baseband = 0,
	.update_lna  = NULL,

	.agc_config_count = 1,
	.agc = &xc3028_agc_config,
	.bw  = &xc3028_bw_config,

	.gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,

	.pwm_freq_div = 0,
	.agc_control  = NULL,
	.spur_protect = 0,

	.output_mode = OUTMODE_MPEG2_SERIAL,
};

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static struct zl10353_config dvico_fusionhdtv_xc3028 = {
	.demod_address = 0x0f,
	.if2           = 45600,
	.no_tuner      = 1,
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	.disable_i2c_gate_ctrl = 1,
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};

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static struct stv0900_reg stv0900_ts_regs[] = {
	{ R0900_TSGENERAL, 0x00 },
	{ R0900_P1_TSSPEED, 0x40 },
	{ R0900_P2_TSSPEED, 0x40 },
	{ R0900_P1_TSCFGM, 0xc0 },
	{ R0900_P2_TSCFGM, 0xc0 },
	{ R0900_P1_TSCFGH, 0xe0 },
	{ R0900_P2_TSCFGH, 0xe0 },
	{ R0900_P1_TSCFGL, 0x20 },
	{ R0900_P2_TSCFGL, 0x20 },
	{ 0xffff, 0xff }, /* terminate */
};

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static struct stv0900_config netup_stv0900_config = {
	.demod_address = 0x68,
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	.demod_mode = 1, /* dual */
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	.xtal = 8000000,
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	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
	.diseqc_mode = 2,/* 2/3 PWM */
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	.ts_config_regs = stv0900_ts_regs,
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	.tun1_maddress = 0,/* 0x60 */
	.tun2_maddress = 3,/* 0x63 */
	.tun1_adc = 1,/* 1 Vpp */
	.tun2_adc = 1,/* 1 Vpp */
};

static struct stv6110_config netup_stv6110_tunerconfig_a = {
	.i2c_address = 0x60,
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	.mclk = 16000000,
	.clk_div = 1,
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	.gain = 8, /* +16 dB  - maximum gain */
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};

static struct stv6110_config netup_stv6110_tunerconfig_b = {
	.i2c_address = 0x63,
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	.mclk = 16000000,
	.clk_div = 1,
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	.gain = 8, /* +16 dB  - maximum gain */
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};

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static struct cx24116_config tbs_cx24116_config = {
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	.demod_address = 0x55,
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};

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static struct cx24117_config tbs_cx24117_config = {
	.demod_address = 0x55,
};

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static struct ds3000_config tevii_ds3000_config = {
	.demod_address = 0x68,
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};

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static struct ts2020_config tevii_ts2020_config  = {
	.tuner_address = 0x60,
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	.clk_out_div = 1,
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};

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static struct cx24116_config dvbworld_cx24116_config = {
	.demod_address = 0x05,
};

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static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
	.prod = LGS8GXX_PROD_LGS8GL5,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 5380, /* 5.38 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 0,
	.if_neg_edge = 0,
};

static struct xc5000_config mygica_x8506_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 5380,
};

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static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
	.demod_address = 0x10,
};

static struct xc5000_config mygica_x8507_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 4000,
};

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static struct stv090x_config prof_8000_stv090x_config = {
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	.device                 = STV0903,
	.demod_mode             = STV090x_SINGLE,
	.clk_mode               = STV090x_CLK_EXT,
	.xtal                   = 27000000,
	.address                = 0x6A,
	.ts1_mode               = STV090x_TSMODE_PARALLEL_PUNCTURED,
	.repeater_level         = STV090x_RPTLEVEL_64,
	.adc1_range             = STV090x_ADC_2Vpp,
	.diseqc_envelope_mode   = false,

	.tuner_get_frequency    = stb6100_get_frequency,
	.tuner_set_frequency    = stb6100_set_frequency,
	.tuner_set_bandwidth    = stb6100_set_bandwidth,
	.tuner_get_bandwidth    = stb6100_get_bandwidth,
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};

static struct stb6100_config prof_8000_stb6100_config = {
	.tuner_address = 0x60,
	.refclock = 27000000,
};

static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
{
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	if (voltage == SEC_VOLTAGE_18)
		cx_write(MC417_RWD, 0x00001e00);
	else if (voltage == SEC_VOLTAGE_13)
		cx_write(MC417_RWD, 0x00001a00);
	else
		cx_write(MC417_RWD, 0x00001800);
	return 0;
}

546
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
547
{
548
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
549 550 551 552 553
	struct cx23885_tsport *port = fe->dvb->priv;
	struct cx23885_dev *dev = port->dev;

	switch (dev->board) {
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
554
		switch (p->modulation) {
555 556 557 558 559 560 561 562 563 564
		case VSB_8:
			cx23885_gpio_clear(dev, GPIO_5);
			break;
		case QAM_64:
		case QAM_256:
		default:
			cx23885_gpio_set(dev, GPIO_5);
			break;
		}
		break;
565
	case CX23885_BOARD_MYGICA_X8506:
566
	case CX23885_BOARD_MYGICA_X8507:
567 568 569 570
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		/* Select Digital TV */
		cx23885_gpio_set(dev, GPIO_0);
		break;
571
	}
572 573 574 575 576

	/* Call the real set_frontend */
	if (port->set_frontend)
		return port->set_frontend(fe);

577
	return 0;
578 579
}

580 581 582 583 584 585 586
static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
				     struct dvb_frontend *fe)
{
	port->set_frontend = fe->ops.set_frontend;
	fe->ops.set_frontend = cx23885_dvb_set_frontend;
}

587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606
static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
	.prod = LGS8GXX_PROD_LGS8G75,
	.demod_address = 0x19,
	.serial_ts = 0,
	.ts_clk_pol = 1,
	.ts_clk_gated = 1,
	.if_clk_freq = 30400, /* 30.4 MHz */
	.if_freq = 6500, /* 6.50 MHz */
	.if_neg_center = 1,
	.ext_adc = 0,
	.adc_signed = 1,
	.adc_vpp = 2, /* 1.6 Vpp */
	.if_neg_edge = 1,
};

static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
	.i2c_address = 0x61,
	.if_khz = 6500,
};

607 608 609 610 611 612 613 614 615
static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 0,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
616 617 618
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634
};

static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};

static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
	.prod = ATBM8830_PROD_8830,
	.demod_address = 0x44,
	.serial_ts = 1,
	.ts_sampling_edge = 1,
	.ts_clk_gated = 0,
	.osc_clk_freq = 30400, /* in kHz */
	.if_freq = 0, /* zero IF */
	.zif_swap_iq = 1,
635 636 637
	.agc_min = 0x2E,
	.agc_max = 0xFF,
	.agc_hold_loop = 0,
638 639 640 641 642 643
};

static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
	.i2c_address = 0x60,
	.osc_clk = 20
};
644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671
static struct stv0367_config netup_stv0367_config[] = {
	{
		.demod_address = 0x1c,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	}, {
		.demod_address = 0x1d,
		.xtal = 27000000,
		.if_khz = 4500,
		.if_iq_mode = 0,
		.ts_mode = 1,
		.clk_pol = 0,
	},
};

static struct xc5000_config netup_xc5000_config[] = {
	{
		.i2c_address = 0x61,
		.if_khz = 4500,
	}, {
		.i2c_address = 0x64,
		.if_khz = 4500,
	},
};

672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689
static struct drxk_config terratec_drxk_config[] = {
	{
		.adr = 0x29,
		.no_i2c_bridge = 1,
	}, {
		.adr = 0x2a,
		.no_i2c_bridge = 1,
	},
};

static struct mt2063_config terratec_mt2063_config[] = {
	{
		.tuner_address = 0x60,
	}, {
		.tuner_address = 0x67,
	},
};

690
static const struct tda10071_config hauppauge_tda10071_config = {
691
	.demod_i2c_addr = 0x05,
692 693 694 695 696 697 698 699 700 701 702 703
	.tuner_i2c_addr = 0x54,
	.i2c_wr_max = 64,
	.ts_mode = TDA10071_TS_SERIAL,
	.spec_inv = 0,
	.xtal = 40444000, /* 40.444 MHz */
	.pll_multiplier = 20,
};

static const struct a8293_config hauppauge_a8293_config = {
	.i2c_addr = 0x0b,
};

704
static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
705 706 707
{
	struct cx23885_dev *dev = (struct cx23885_dev *)device;
	unsigned long timeout = jiffies + msecs_to_jiffies(1);
708
	uint32_t mem = 0;
709

710
	mem = cx_read(MC417_RWD);
711 712 713 714 715 716 717 718 719
	if (read)
		cx_set(MC417_OEN, ALT_DATA);
	else {
		cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
		mem &= ~ALT_DATA;
		mem |= (data & ALT_DATA);
	}

	if (flag)
720
		mem |= ALT_AD_RG;
721
	else
722
		mem &= ~ALT_AD_RG;
723

724
	mem &= ~ALT_CS;
725
	if (read)
726
		mem = (mem & ~ALT_RD) | ALT_WR;
727
	else
728 729 730
		mem = (mem & ~ALT_WR) | ALT_RD;

	cx_write(MC417_RWD, mem);  /* start RW cycle */
731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746

	for (;;) {
		mem = cx_read(MC417_RWD);
		if ((mem & ALT_RDY) == 0)
			break;
		if (time_after(jiffies, timeout))
			break;
		udelay(1);
	}

	cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
	if (read)
		return mem & ALT_DATA;

	return 0;
};
747

748 749 750
static int dvb_register(struct cx23885_tsport *port)
{
	struct cx23885_dev *dev = port->dev;
751
	struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
752 753
	struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
	int mfe_shared = 0; /* bus not shared by default */
754
	int ret;
755

756
	/* Get the first frontend */
757
	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
758 759
	if (!fe0)
		return -EINVAL;
760 761

	/* init struct videobuf_dvb */
762
	fe0->dvb.name = dev->name;
763

764 765 766 767 768 769
	/* multi-frontend gate control is undefined or defaults to fe0 */
	port->frontends.gate = 0;

	/* Sets the gate control callback to be used by i2c command calls */
	port->gate_ctrl = cx23885_dvb_gate_ctrl;

770 771
	/* init frontend */
	switch (dev->board) {
772
	case CX23885_BOARD_HAUPPAUGE_HVR1250:
773
		i2c_bus = &dev->i2c_bus[0];
774
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
775
						&hauppauge_generic_config,
776
						&i2c_bus->i2c_adap);
777 778
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
779
				   &i2c_bus->i2c_adap,
780
				   &hauppauge_generic_tunerconfig, 0);
781 782
		}
		break;
783
	case CX23885_BOARD_HAUPPAUGE_HVR1270:
784
	case CX23885_BOARD_HAUPPAUGE_HVR1275:
785 786
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
787
					       &hauppauge_lgdt3305_config,
788 789 790 791
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
792
				   &hauppauge_hvr127x_config);
793
		}
794 795
		if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
			cx23885_set_frontend_hook(port, fe0->dvb.frontend);
796
		break;
797
	case CX23885_BOARD_HAUPPAUGE_HVR1255:
798
	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
799 800 801 802 803 804 805 806 807
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
					       &hcw_s5h1411_config,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				   0x60, &dev->i2c_bus[1].i2c_adap,
				   &hauppauge_tda18271_config);
		}
808 809 810 811 812

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

813
		break;
814 815
	case CX23885_BOARD_HAUPPAUGE_HVR1800:
		i2c_bus = &dev->i2c_bus[0];
816
		switch (alt_tuner) {
817
		case 1:
818
			fe0->dvb.frontend =
819 820 821
				dvb_attach(s5h1409_attach,
					   &hauppauge_ezqam_config,
					   &i2c_bus->i2c_adap);
822 823
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(tda829x_attach, fe0->dvb.frontend,
824
					   &dev->i2c_bus[1].i2c_adap, 0x42,
825
					   &tda829x_no_probe);
826
				dvb_attach(tda18271_attach, fe0->dvb.frontend,
827
					   0x60, &dev->i2c_bus[1].i2c_adap,
828
					   &hauppauge_tda18271_config);
829 830 831 832
			}
			break;
		case 0:
		default:
833
			fe0->dvb.frontend =
834 835 836
				dvb_attach(s5h1409_attach,
					   &hauppauge_generic_config,
					   &i2c_bus->i2c_adap);
837 838
			if (fe0->dvb.frontend != NULL)
				dvb_attach(mt2131_attach, fe0->dvb.frontend,
839 840 841 842 843
					   &i2c_bus->i2c_adap,
					   &hauppauge_generic_tunerconfig, 0);
			break;
		}
		break;
844
	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
845
		i2c_bus = &dev->i2c_bus[0];
846
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
847
						&hauppauge_hvr1800lp_config,
848
						&i2c_bus->i2c_adap);
849 850
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(mt2131_attach, fe0->dvb.frontend,
851
				   &i2c_bus->i2c_adap,
852 853 854
				   &hauppauge_generic_tunerconfig, 0);
		}
		break;
855
	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
856
		i2c_bus = &dev->i2c_bus[0];
857
		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
858
						&fusionhdtv_5_express,
859
						&i2c_bus->i2c_adap);
860 861
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
862 863
				   &i2c_bus->i2c_adap, 0x61,
				   TUNER_LG_TDVS_H06XF);
864 865
		}
		break;
866 867
	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
		i2c_bus = &dev->i2c_bus[1];
868
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
869 870
						&hauppauge_hvr1500q_config,
						&dev->i2c_bus[0].i2c_adap);
871 872
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
873 874
				   &i2c_bus->i2c_adap,
				   &hauppauge_hvr1500q_tunerconfig);
875
		break;
876 877
	case CX23885_BOARD_HAUPPAUGE_HVR1500:
		i2c_bus = &dev->i2c_bus[1];
878
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
879 880
						&hauppauge_hvr1500_config,
						&dev->i2c_bus[0].i2c_adap);
881
		if (fe0->dvb.frontend != NULL) {
882 883 884 885 886 887
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
888
				.fname       = XC2028_DEFAULT_FIRMWARE,
889
				.max_len     = 64,
890
				.demod       = XC3028_FE_OREN538,
891 892 893
			};

			fe = dvb_attach(xc2028_attach,
894
					fe0->dvb.frontend, &cfg);
895 896 897 898
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
899
	case CX23885_BOARD_HAUPPAUGE_HVR1200:
900
	case CX23885_BOARD_HAUPPAUGE_HVR1700:
901
		i2c_bus = &dev->i2c_bus[0];
902
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
903 904
			&hauppauge_hvr1200_config,
			&i2c_bus->i2c_adap);
905 906
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda829x_attach, fe0->dvb.frontend,
907 908
				&dev->i2c_bus[1].i2c_adap, 0x42,
				&tda829x_no_probe);
909
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
910 911
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1200_tuner_config);
912 913 914 915 916 917 918 919 920 921 922
		}
		break;
	case CX23885_BOARD_HAUPPAUGE_HVR1210:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10048_attach,
			&hauppauge_hvr1210_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[1].i2c_adap,
				&hauppauge_hvr1210_tuner_config);
923 924
		}
		break;
925 926
	case CX23885_BOARD_HAUPPAUGE_HVR1400:
		i2c_bus = &dev->i2c_bus[0];
927
		fe0->dvb.frontend = dvb_attach(dib7000p_attach,
928 929
			&i2c_bus->i2c_adap,
			0x12, &hauppauge_hvr1400_dib7000_config);
930
		if (fe0->dvb.frontend != NULL) {
931 932 933 934 935 936
			struct dvb_frontend *fe;
			struct xc2028_config cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x64,
			};
			static struct xc2028_ctrl ctl = {
937
				.fname   = XC3028L_DEFAULT_FIRMWARE,
938
				.max_len = 64,
939
				.demod   = XC3028_FE_DIBCOM52,
940 941
				/* This is true for all demods with
					v36 firmware? */
942
				.type    = XC2028_D2633,
943 944 945
			};

			fe = dvb_attach(xc2028_attach,
946
					fe0->dvb.frontend, &cfg);
947 948 949 950
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
951 952 953
	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
		i2c_bus = &dev->i2c_bus[port->nr - 1];

954
		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
955 956
						&dvico_s5h1409_config,
						&i2c_bus->i2c_adap);
957 958
		if (fe0->dvb.frontend == NULL)
			fe0->dvb.frontend = dvb_attach(s5h1411_attach,
959 960
							&dvico_s5h1411_config,
							&i2c_bus->i2c_adap);
961 962
		if (fe0->dvb.frontend != NULL)
			dvb_attach(xc5000_attach, fe0->dvb.frontend,
963 964
				   &i2c_bus->i2c_adap,
				   &dvico_xc5000_tunerconfig);
965
		break;
966 967 968
	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
		i2c_bus = &dev->i2c_bus[port->nr - 1];

969
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
970 971
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
972
		if (fe0->dvb.frontend != NULL) {
973 974 975 976 977 978
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &i2c_bus->i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
979
				.fname       = XC2028_DEFAULT_FIRMWARE,
980 981 982 983
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

984
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
985 986 987 988 989 990
					&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
		break;
	}
991
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
992
	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
993
	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
994 995
		i2c_bus = &dev->i2c_bus[0];

996
		fe0->dvb.frontend = dvb_attach(zl10353_attach,
997 998
			&dvico_fusionhdtv_xc3028,
			&i2c_bus->i2c_adap);
999
		if (fe0->dvb.frontend != NULL) {
1000 1001 1002 1003 1004 1005
			struct dvb_frontend      *fe;
			struct xc2028_config	  cfg = {
				.i2c_adap  = &dev->i2c_bus[1].i2c_adap,
				.i2c_addr  = 0x61,
			};
			static struct xc2028_ctrl ctl = {
1006
				.fname       = XC2028_DEFAULT_FIRMWARE,
1007 1008 1009 1010
				.max_len     = 64,
				.demod       = XC3028_FE_ZARLINK456,
			};

1011
			fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1012 1013 1014 1015
				&cfg);
			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
				fe->ops.tuner_ops.set_config(fe, &ctl);
		}
1016
		break;
1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034
	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(zl10353_attach,
					       &dvico_fusionhdtv_xc3028,
					       &i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			struct dvb_frontend	*fe;
			struct xc4000_config	cfg = {
				.i2c_address	  = 0x61,
				.default_pm	  = 0,
				.dvb_amplitude	  = 134,
				.set_smoothedcvbs = 1,
				.if_khz		  = 4560
			};

			fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
					&dev->i2c_bus[1].i2c_adap, &cfg);
1035 1036 1037 1038 1039
			if (!fe) {
				printk(KERN_ERR "%s/2: xc4000 attach failed\n",
				       dev->name);
				goto frontend_detach;
			}
1040 1041
		}
		break;
1042
	case CX23885_BOARD_TBS_6920:
1043
		i2c_bus = &dev->i2c_bus[1];
1044 1045

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1046 1047
					&tbs_cx24116_config,
					&i2c_bus->i2c_adap);
1048
		if (fe0->dvb.frontend != NULL)
1049
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1050

1051
		break;
1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
	case CX23885_BOARD_TBS_6980:
	case CX23885_BOARD_TBS_6981:
		i2c_bus = &dev->i2c_bus[1];

		switch (port->nr) {
		/* PORT B */
		case 1:
			fe0->dvb.frontend = dvb_attach(cx24117_attach,
					&tbs_cx24117_config,
					&i2c_bus->i2c_adap, NULL);
			break;
		/* PORT C */
		case 2:
			/* use fe1 pointer as temporary holder */
			/* for the first frontend */
			fe1 = videobuf_dvb_get_frontend(
				&port->dev->ts1.frontends, 1);

			fe0->dvb.frontend = dvb_attach(cx24117_attach,
					&tbs_cx24117_config,
					&i2c_bus->i2c_adap, fe1->dvb.frontend);
			/* we're done, so clear fe1 pointer */
			fe1 = NULL;
			break;
		}
		break;
1078 1079 1080
	case CX23885_BOARD_TEVII_S470:
		i2c_bus = &dev->i2c_bus[1];

1081 1082 1083
		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
1084 1085 1086
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(ts2020_attach, fe0->dvb.frontend,
				&tevii_ts2020_config, &i2c_bus->i2c_adap);
1087
			fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1088
		}
1089

1090
		break;
1091 1092 1093 1094 1095 1096 1097
	case CX23885_BOARD_DVBWORLD_2005:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(cx24116_attach,
			&dvbworld_cx24116_config,
			&i2c_bus->i2c_adap);
		break;
1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		i2c_bus = &dev->i2c_bus[0];
		switch (port->nr) {
		/* port B */
		case 1:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 0);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_a,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1114 1115
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x09))
1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		/* port C */
		case 2:
			fe0->dvb.frontend = dvb_attach(stv0900_attach,
							&netup_stv0900_config,
							&i2c_bus->i2c_adap, 1);
			if (fe0->dvb.frontend != NULL) {
				if (dvb_attach(stv6110_attach,
						fe0->dvb.frontend,
						&netup_stv6110_tunerconfig_b,
						&i2c_bus->i2c_adap)) {
					if (!dvb_attach(lnbh24_attach,
							fe0->dvb.frontend,
							&i2c_bus->i2c_adap,
1135 1136
							LNBH24_PCL | LNBH24_TTX,
							LNBH24_TEN, 0x0a))
1137 1138 1139 1140 1141 1142 1143 1144
						printk(KERN_ERR
							"No LNBH24 found!\n");

				}
			}
			break;
		}
		break;
1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156
	case CX23885_BOARD_MYGICA_X8506:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&mygica_x8506_lgs8gl5_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&mygica_x8506_xc5000_config);
		}
1157
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1158
		break;
1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172
	case CX23885_BOARD_MYGICA_X8507:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
			&mygica_x8507_mb86a20s_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
			fe0->dvb.frontend,
			&i2c_bus2->i2c_adap,
			&mygica_x8507_xc5000_config);
		}
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
		break;
1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184
	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];
		fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
			&magicpro_prohdtve2_lgs8g75_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(xc5000_attach,
				fe0->dvb.frontend,
				&i2c_bus2->i2c_adap,
				&magicpro_prohdtve2_xc5000_config);
		}
1185
		cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1186
		break;
1187
	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);

		tda18271_attach(&dev->ts1.analog_fe,
			0x60, &dev->i2c_bus[1].i2c_adap,
			&hauppauge_tda18271_config);

		break;
1202
	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1203 1204 1205 1206 1207 1208 1209 1210 1211
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
			&hcw_s5h1411_config,
			&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL)
			dvb_attach(tda18271_attach, fe0->dvb.frontend,
				0x60, &dev->i2c_bus[0].i2c_adap,
				&hauppauge_tda18271_config);
		break;
1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241
	case CX23885_BOARD_MYGICA_X8558PRO:
		switch (port->nr) {
		/* port B */
		case 1:
			i2c_bus = &dev->i2c_bus[0];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg1,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg1);
			}
			break;
		/* port C */
		case 2:
			i2c_bus = &dev->i2c_bus[1];
			fe0->dvb.frontend = dvb_attach(atbm8830_attach,
				&mygica_x8558pro_atbm8830_cfg2,
				&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				dvb_attach(max2165_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&mygic_x8558pro_max2165_cfg2);
			}
			break;
		}
		break;
1242 1243 1244 1245 1246 1247 1248 1249 1250
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		i2c_bus = &dev->i2c_bus[0];
		mfe_shared = 1;/* MFE */
		port->frontends.gate = 0;/* not clear for me yet */
		/* ports B, C */
		/* MFE frontend 1 DVB-T */
		fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
1251
		if (fe0->dvb.frontend != NULL) {
1252 1253 1254 1255 1256
			if (NULL == dvb_attach(xc5000_attach,
					fe0->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
1257 1258 1259
			/* load xc5000 firmware */
			fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
		}
1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276
		/* MFE frontend 2 */
		fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
		if (fe1 == NULL)
			goto frontend_detach;
		/* DVB-C init */
		fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
					&netup_stv0367_config[port->nr - 1],
					&i2c_bus->i2c_adap);
		if (fe1->dvb.frontend != NULL) {
			fe1->dvb.frontend->id = 1;
			if (NULL == dvb_attach(xc5000_attach,
					fe1->dvb.frontend,
					&i2c_bus->i2c_adap,
					&netup_xc5000_config[port->nr - 1]))
				goto frontend_detach;
		}
		break;
1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
		i2c_bus = &dev->i2c_bus[0];
		i2c_bus2 = &dev->i2c_bus[1];

		switch (port->nr) {
		/* port b */
		case 1:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[0],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[0],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		/* port c */
		case 2:
			fe0->dvb.frontend = dvb_attach(drxk_attach,
					&terratec_drxk_config[1],
					&i2c_bus->i2c_adap);
			if (fe0->dvb.frontend != NULL) {
				if (!dvb_attach(mt2063_attach,
						fe0->dvb.frontend,
						&terratec_mt2063_config[1],
						&i2c_bus2->i2c_adap))
					goto frontend_detach;
			}
			break;
		}
		break;
1310 1311 1312 1313 1314 1315
	case CX23885_BOARD_TEVII_S471:
		i2c_bus = &dev->i2c_bus[1];

		fe0->dvb.frontend = dvb_attach(ds3000_attach,
					&tevii_ds3000_config,
					&i2c_bus->i2c_adap);
1316 1317 1318 1319
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(ts2020_attach, fe0->dvb.frontend,
				&tevii_ts2020_config, &i2c_bus->i2c_adap);
		}
1320
		break;
1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337
	case CX23885_BOARD_PROF_8000:
		i2c_bus = &dev->i2c_bus[0];

		fe0->dvb.frontend = dvb_attach(stv090x_attach,
						&prof_8000_stv090x_config,
						&i2c_bus->i2c_adap,
						STV090x_DEMODULATOR_0);
		if (fe0->dvb.frontend != NULL) {
			if (!dvb_attach(stb6100_attach,
					fe0->dvb.frontend,
					&prof_8000_stb6100_config,
					&i2c_bus->i2c_adap))
				goto frontend_detach;

			fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
		}
		break;
1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348
	case CX23885_BOARD_HAUPPAUGE_HVR4400:
		i2c_bus = &dev->i2c_bus[0];
		fe0->dvb.frontend = dvb_attach(tda10071_attach,
						&hauppauge_tda10071_config,
						&i2c_bus->i2c_adap);
		if (fe0->dvb.frontend != NULL) {
			dvb_attach(a8293_attach, fe0->dvb.frontend,
				   &i2c_bus->i2c_adap,
				   &hauppauge_a8293_config);
		}
		break;
1349
	default:
1350 1351
		printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
			" isn't supported yet\n",
1352 1353 1354
		       dev->name);
		break;
	}
1355 1356

	if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1357
		printk(KERN_ERR "%s: frontend initialization failed\n",
1358 1359
		       dev->name);
		goto frontend_detach;
1360
	}
1361

1362
	/* define general-purpose callback pointer */
1363
	fe0->dvb.frontend->callback = cx23885_tuner_callback;
1364 1365 1366 1367 1368 1369 1370 1371
	if (fe1)
		fe1->dvb.frontend->callback = cx23885_tuner_callback;
#if 0
	/* Ensure all frontends negotiate bus access */
	fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
	if (fe1)
		fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
#endif
1372 1373

	/* Put the analog decoder in standby to keep it quiet */
1374
	call_all(dev, core, s_power, 0);
1375

1376 1377
	if (fe0->dvb.frontend->ops.analog_ops.standby)
		fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1378

1379
	/* register everything */
1380
	ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1381
					&dev->pci->dev, adapter_nr, mfe_shared);
1382
	if (ret)
1383
		goto frontend_detach;
1384

1385 1386 1387 1388 1389 1390 1391 1392
	/* init CI & MAC */
	switch (dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
		static struct netup_card_info cinfo;

		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
		memcpy(port->frontends.adapter.proposed_mac,
				cinfo.port[port->nr - 1].mac, 6);
1393 1394
		printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
			port->nr, port->frontends.adapter.proposed_mac);
1395 1396 1397 1398

		netup_ci_init(port);
		break;
		}
1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
		struct altera_ci_config netup_ci_cfg = {
			.dev = dev,/* magic number to identify*/
			.adapter = &port->frontends.adapter,/* for CI */
			.demux = &fe0->dvb.demux,/* for hw pid filter */
			.fpga_rw = netup_altera_fpga_rw,
		};

		altera_ci_init(&netup_ci_cfg, port->nr);
		break;
		}
1410 1411 1412 1413 1414 1415 1416 1417 1418
	case CX23885_BOARD_TEVII_S470: {
		u8 eeprom[256]; /* 24C02 i2c eeprom */

		if (port->nr != 1)
			break;

		/* Read entire EEPROM */
		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
		tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1419
		printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1420 1421 1422
		memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
		break;
		}
1423 1424 1425
	}

	return ret;
1426 1427 1428 1429 1430

frontend_detach:
	port->gate_ctrl = NULL;
	videobuf_dvb_dealloc_frontends(&port->frontends);
	return -EINVAL;
1431 1432 1433 1434
}

int cx23885_dvb_register(struct cx23885_tsport *port)
{
1435 1436

	struct videobuf_dvb_frontend *fe0;
1437
	struct cx23885_dev *dev = port->dev;
1438 1439 1440
	int err, i;

	/* Here we need to allocate the correct number of frontends,
1441
	 * as reflected in the cards struct. The reality is that currently
1442 1443 1444 1445 1446 1447 1448 1449 1450
	 * no cx23885 boards support this - yet. But, if we don't modify this
	 * code then the second frontend would never be allocated (later)
	 * and fail with error before the attach in dvb_register().
	 * Without these changes we risk an OOPS later. The changes here
	 * are for safety, and should provide a good foundation for the
	 * future addition of any multi-frontend cx23885 based boards.
	 */
	printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
		port->num_frontends);
1451

1452
	for (i = 1; i <= port->num_frontends; i++) {
1453
		if (videobuf_dvb_alloc_frontend(
1454
			&port->frontends, i) == NULL) {
1455 1456 1457 1458 1459 1460 1461
			printk(KERN_ERR "%s() failed to alloc\n", __func__);
			return -ENOMEM;
		}

		fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
		if (!fe0)
			err = -EINVAL;
1462

1463
		dprintk(1, "%s\n", __func__);
1464
		dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1465 1466 1467 1468
			dev->board,
			dev->name,
			dev->pci_bus,
			dev->pci_slot);
1469

1470
		err = -ENODEV;
1471

1472 1473
		/* dvb stuff */
		/* We have to init the queue for each frontend on a port. */
1474 1475 1476
		printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
		videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
			    &dev->pci->dev, &port->slock,
1477
			    V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1478
			    sizeof(struct cx23885_buffer), port, NULL);
1479
	}
1480 1481
	err = dvb_register(port);
	if (err != 0)
1482 1483
		printk(KERN_ERR "%s() dvb_register failed err = %d\n",
			__func__, err);
1484 1485 1486 1487 1488 1489

	return err;
}

int cx23885_dvb_unregister(struct cx23885_tsport *port)
{
1490 1491
	struct videobuf_dvb_frontend *fe0;

1492 1493 1494 1495 1496 1497 1498
	/* FIXME: in an error condition where the we have
	 * an expected number of frontends (attach problem)
	 * then this might not clean up correctly, if 1
	 * is invalid.
	 * This comment only applies to future boards IF they
	 * implement MFE support.
	 */
1499
	fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1500
	if (fe0 && fe0->dvb.frontend)
1501
		videobuf_dvb_unregister_bus(&port->frontends);
1502

1503 1504 1505 1506
	switch (port->dev->board) {
	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
		netup_ci_exit(port);
		break;
1507 1508 1509
	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
		altera_ci_release(port->dev, port->nr);
		break;
1510
	}
1511

1512 1513
	port->gate_ctrl = NULL;

1514 1515
	return 0;
}
1516