amd.c 21.7 KB
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/*
 *  AMD CPU Microcode Update Driver for Linux
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 *
 *  This driver allows to upgrade microcode on F10h AMD
 *  CPUs and later.
 *
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 *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
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 *	          2013-2016 Borislav Petkov <bp@alien8.de>
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 *
 *  Author: Peter Oruba <peter.oruba@amd.com>
 *
 *  Based on work by:
 *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
 *
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 *  early loader:
 *  Copyright (C) 2013 Advanced Micro Devices, Inc.
 *
 *  Author: Jacob Shin <jacob.shin@amd.com>
 *  Fixes: Borislav Petkov <bp@suse.de>
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 *
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 *  Licensed under the terms of the GNU General Public
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 *  License version 2. See file COPYING for details.
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 */
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#define pr_fmt(fmt) "microcode: " fmt
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#include <linux/earlycpio.h>
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#include <linux/firmware.h>
#include <linux/uaccess.h>
#include <linux/vmalloc.h>
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#include <linux/initrd.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>

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#include <asm/microcode_amd.h>
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#include <asm/microcode.h>
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#include <asm/processor.h>
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#include <asm/setup.h>
#include <asm/cpu.h>
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#include <asm/msr.h>
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static struct equiv_cpu_entry *equiv_cpu_table;
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/*
 * This points to the current valid container of microcode patches which we will
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 * save from the initrd/builtin before jettisoning its contents.
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 */
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struct container {
	u8 *data;
	size_t size;
} cont;
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static u32 ucode_new_rev;
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static u8 amd_ucode_patch[PATCH_MAX_SIZE];
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static u16 this_equiv_id;

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/*
 * Microcode patch container file is prepended to the initrd in cpio
 * format. See Documentation/x86/early-microcode.txt
 */
static const char
ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
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static size_t compute_container_size(u8 *data, u32 total_size)
{
	size_t size = 0;
	u32 *header = (u32 *)data;

	if (header[0] != UCODE_MAGIC ||
	    header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
	    header[2] == 0)                            /* size */
		return size;

	size = header[2] + CONTAINER_HDR_SZ;
	total_size -= size;
	data += size;

	while (total_size) {
		u16 patch_size;

		header = (u32 *)data;

		if (header[0] != UCODE_UCODE_TYPE)
			break;

		/*
		 * Sanity-check patch size.
		 */
		patch_size = header[1];
		if (patch_size > PATCH_MAX_SIZE)
			break;

		size	   += patch_size + SECTION_HDR_SIZE;
		data	   += patch_size + SECTION_HDR_SIZE;
		total_size -= patch_size + SECTION_HDR_SIZE;
	}

	return size;
}

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static inline u16 find_equiv_id(struct equiv_cpu_entry *equiv_cpu_table,
				unsigned int sig)
{
	int i = 0;

	if (!equiv_cpu_table)
		return 0;

	while (equiv_cpu_table[i].installed_cpu != 0) {
		if (sig == equiv_cpu_table[i].installed_cpu)
			return equiv_cpu_table[i].equiv_cpu;

		i++;
	}
	return 0;
}

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/*
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 * This scans the ucode blob for the proper container as we can have multiple
 * containers glued together.
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 */
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static struct container
find_proper_container(u8 *ucode, size_t size, u16 *ret_id)
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{
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	struct container ret = { NULL, 0 };
	u32 eax, ebx, ecx, edx;
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	struct equiv_cpu_entry *eq;
	int offset, left;
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	u16 eq_id = 0;
	u32 *header;
	u8 *data;
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	data   = ucode;
	left   = size;
	header = (u32 *)data;

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	/* find equiv cpu table */
	if (header[0] != UCODE_MAGIC ||
	    header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
	    header[2] == 0)                            /* size */
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		return ret;
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	eax = 0x00000001;
	ecx = 0;
	native_cpuid(&eax, &ebx, &ecx, &edx);

	while (left > 0) {
		eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);

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		ret.data = data;
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		/* Advance past the container header */
		offset = header[2] + CONTAINER_HDR_SZ;
		data  += offset;
		left  -= offset;

		eq_id = find_equiv_id(eq, eax);
		if (eq_id) {
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			ret.size = compute_container_size(ret.data, left + offset);
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			/*
			 * truncate how much we need to iterate over in the
			 * ucode update loop below
			 */
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			left = ret.size - offset;
			*ret_id = eq_id;
			return ret;
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		}

		/*
		 * support multiple container files appended together. if this
		 * one does not have a matching equivalent cpu entry, we fast
		 * forward to the next container file.
		 */
		while (left > 0) {
			header = (u32 *)data;
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			if (header[0] == UCODE_MAGIC &&
			    header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
				break;

			offset = header[1] + SECTION_HDR_SIZE;
			data  += offset;
			left  -= offset;
		}

		/* mark where the next microcode container file starts */
		offset    = data - (u8 *)ucode;
		ucode     = data;
	}

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	return ret;
}

static int __apply_microcode_amd(struct microcode_amd *mc_amd)
{
	u32 rev, dummy;

	native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);

	/* verify patch application was successful */
	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
	if (rev != mc_amd->hdr.patch_id)
		return -1;

	return 0;
}

/*
 * Early load occurs before we can vmalloc(). So we look for the microcode
 * patch container file in initrd, traverse equivalent cpu table, look for a
 * matching microcode patch, and update, all in initrd memory in place.
 * When vmalloc() is available for use later -- on 64-bit during first AP load,
 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
 * load_microcode_amd() to save equivalent cpu table and microcode patches in
 * kernel heap memory.
 */
static struct container
apply_microcode_early_amd(void *ucode, size_t size, bool save_patch)
{
	struct container ret = { NULL, 0 };
	u8 (*patch)[PATCH_MAX_SIZE];
	int offset, left;
	u32 rev, *header;
	u8  *data;
	u16 eq_id = 0;
	u32 *new_rev;

#ifdef CONFIG_X86_32
	new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
	patch	= (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
#else
	new_rev = &ucode_new_rev;
	patch	= &amd_ucode_patch;
#endif
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	if (check_current_patch_level(&rev, true))
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		return (struct container){ NULL, 0 };

	ret = find_proper_container(ucode, size, &eq_id);
	if (!eq_id)
		return (struct container){ NULL, 0 };

	this_equiv_id = eq_id;
	header = (u32 *)ret.data;

	/* We're pointing to an equiv table, skip over it. */
	data = ret.data +  header[2] + CONTAINER_HDR_SZ;
	left = ret.size - (header[2] + CONTAINER_HDR_SZ);
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	while (left > 0) {
		struct microcode_amd *mc;

		header = (u32 *)data;
		if (header[0] != UCODE_UCODE_TYPE || /* type */
		    header[1] == 0)                  /* size */
			break;

		mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);

		if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) {

			if (!__apply_microcode_amd(mc)) {
				rev = mc->hdr.patch_id;
				*new_rev = rev;

				if (save_patch)
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					memcpy(patch, mc, min_t(u32, header[1], PATCH_MAX_SIZE));
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			}
		}

		offset  = header[1] + SECTION_HDR_SIZE;
		data   += offset;
		left   -= offset;
	}
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	return ret;
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}

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static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
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{
#ifdef CONFIG_X86_64
	char fw_name[36] = "amd-ucode/microcode_amd.bin";

	if (family >= 0x15)
		snprintf(fw_name, sizeof(fw_name),
			 "amd-ucode/microcode_amd_fam%.2xh.bin", family);

	return get_builtin_firmware(cp, fw_name);
#else
	return false;
#endif
}

void __init load_ucode_amd_bsp(unsigned int family)
{
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	struct ucode_cpu_info *uci;
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	struct cpio_data cp;
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	const char *path;
	bool use_pa;
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	if (IS_ENABLED(CONFIG_X86_32)) {
		uci	= (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info);
		path	= (const char *)__pa_nodebug(ucode_path);
		use_pa	= true;
	} else {
		uci     = ucode_cpu_info;
		path	= ucode_path;
		use_pa	= false;
	}
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	if (!get_builtin_microcode(&cp, family))
		cp = find_microcode_in_initrd(path, use_pa);
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	if (!(cp.data && cp.size))
		return;
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	/* Get BSP's CPUID.EAX(1), needed in load_microcode_amd() */
	uci->cpu_sig.sig = cpuid_eax(1);
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	apply_microcode_early_amd(cp.data, cp.size, true);
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}

#ifdef CONFIG_X86_32
/*
 * On 32-bit, since AP's early load occurs before paging is turned on, we
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 * cannot traverse cpu_equiv_table and microcode_cache in kernel heap memory.
 * So during cold boot, AP will apply_ucode_in_initrd() just like the BSP.
 * In save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch,
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 * which is used upon resume from suspend.
 */
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void load_ucode_amd_ap(unsigned int family)
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{
	struct microcode_amd *mc;
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	struct cpio_data cp;
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	mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
	if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
		__apply_microcode_amd(mc);
		return;
	}

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	if (!get_builtin_microcode(&cp, family))
		cp = find_microcode_in_initrd((const char *)__pa_nodebug(ucode_path), true);
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	if (!(cp.data && cp.size))
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		return;

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	/*
	 * This would set amd_ucode_patch above so that the following APs can
	 * use it directly instead of going down this path again.
	 */
	apply_microcode_early_amd(cp.data, cp.size, true);
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}
#else
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void load_ucode_amd_ap(unsigned int family)
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{
	struct equiv_cpu_entry *eq;
	struct microcode_amd *mc;
	u32 rev, eax;
	u16 eq_id;

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	/* 64-bit runs with paging enabled, thus early==false. */
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	if (check_current_patch_level(&rev, false))
		return;

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	/* First AP hasn't cached it yet, go through the blob. */
	if (!cont.data) {
		struct cpio_data cp = { NULL, 0, "" };

		if (cont.size == -1)
			return;

reget:
		if (!get_builtin_microcode(&cp, family)) {
#ifdef CONFIG_BLK_DEV_INITRD
			cp = find_cpio_data(ucode_path, (void *)initrd_start,
					    initrd_end - initrd_start, NULL);
#endif
			if (!(cp.data && cp.size)) {
				/*
				 * Mark it so that other APs do not scan again
				 * for no real reason and slow down boot
				 * needlessly.
				 */
				cont.size = -1;
				return;
			}
		}

		cont = apply_microcode_early_amd(cp.data, cp.size, false);
		if (!(cont.data && cont.size)) {
			cont.size = -1;
			return;
		}
	}
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	eax = cpuid_eax(0x00000001);
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	eq  = (struct equiv_cpu_entry *)(cont.data + CONTAINER_HDR_SZ);
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	eq_id = find_equiv_id(eq, eax);
	if (!eq_id)
		return;

	if (eq_id == this_equiv_id) {
		mc = (struct microcode_amd *)amd_ucode_patch;

		if (mc && rev < mc->hdr.patch_id) {
			if (!__apply_microcode_amd(mc))
				ucode_new_rev = mc->hdr.patch_id;
		}

	} else {

		/*
		 * AP has a different equivalence ID than BSP, looks like
		 * mixed-steppings silicon so go through the ucode blob anew.
		 */
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		goto reget;
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	}
}
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#endif /* CONFIG_X86_32 */
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static enum ucode_state
load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size);

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int __init save_microcode_in_initrd_amd(unsigned int fam)
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{
	enum ucode_state ret;
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	int retval = 0;
	u16 eq_id;
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	if (!cont.data) {
		if (IS_ENABLED(CONFIG_X86_32) && (cont.size != -1)) {
			struct cpio_data cp = { NULL, 0, "" };
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#ifdef CONFIG_BLK_DEV_INITRD
			cp = find_cpio_data(ucode_path, (void *)initrd_start,
					    initrd_end - initrd_start, NULL);
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#endif

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			if (!(cp.data && cp.size)) {
				cont.size = -1;
				return -EINVAL;
			}
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			cont = find_proper_container(cp.data, cp.size, &eq_id);
			if (!eq_id) {
				cont.size = -1;
				return -EINVAL;
			}
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		} else
			return -EINVAL;
	}
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	ret = load_microcode_amd(smp_processor_id(), fam, cont.data, cont.size);
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	if (ret != UCODE_OK)
		retval = -EINVAL;

	/*
	 * This will be freed any msec now, stash patches for the current
	 * family and switch to patch cache for cpu hotplug, etc later.
	 */
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	cont.data = NULL;
	cont.size = 0;
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	return retval;
}

void reload_ucode_amd(void)
{
	struct microcode_amd *mc;
	u32 rev;

	/*
	 * early==false because this is a syscore ->resume path and by
	 * that time paging is long enabled.
	 */
	if (check_current_patch_level(&rev, false))
		return;

	mc = (struct microcode_amd *)amd_ucode_patch;
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	if (!mc)
		return;
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	if (rev < mc->hdr.patch_id) {
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		if (!__apply_microcode_amd(mc)) {
			ucode_new_rev = mc->hdr.patch_id;
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			pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
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		}
	}
}
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static u16 __find_equiv_id(unsigned int cpu)
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{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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	return find_equiv_id(equiv_cpu_table, uci->cpu_sig.sig);
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}

static u32 find_cpu_family_by_equiv_cpu(u16 equiv_cpu)
{
	int i = 0;

	BUG_ON(!equiv_cpu_table);

	while (equiv_cpu_table[i].equiv_cpu != 0) {
		if (equiv_cpu == equiv_cpu_table[i].equiv_cpu)
			return equiv_cpu_table[i].installed_cpu;
		i++;
	}
	return 0;
}

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/*
 * a small, trivial cache of per-family ucode patches
 */
static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
{
	struct ucode_patch *p;

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	list_for_each_entry(p, &microcode_cache, plist)
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		if (p->equiv_cpu == equiv_cpu)
			return p;
	return NULL;
}

static void update_cache(struct ucode_patch *new_patch)
{
	struct ucode_patch *p;

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	list_for_each_entry(p, &microcode_cache, plist) {
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		if (p->equiv_cpu == new_patch->equiv_cpu) {
			if (p->patch_id >= new_patch->patch_id)
				/* we already have the latest patch */
				return;

			list_replace(&p->plist, &new_patch->plist);
			kfree(p->data);
			kfree(p);
			return;
		}
	}
	/* no patch found, add it */
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	list_add_tail(&new_patch->plist, &microcode_cache);
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}

static void free_cache(void)
{
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	struct ucode_patch *p, *tmp;
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	list_for_each_entry_safe(p, tmp, &microcode_cache, plist) {
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		__list_del(p->plist.prev, p->plist.next);
		kfree(p->data);
		kfree(p);
	}
}

static struct ucode_patch *find_patch(unsigned int cpu)
{
	u16 equiv_id;

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	equiv_id = __find_equiv_id(cpu);
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	if (!equiv_id)
		return NULL;

	return cache_find_patch(equiv_id);
}

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static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
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{
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	struct cpuinfo_x86 *c = &cpu_data(cpu);
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	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
	struct ucode_patch *p;
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	csig->sig = cpuid_eax(0x00000001);
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	csig->rev = c->microcode;
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	/*
	 * a patch could have been loaded early, set uci->mc so that
	 * mc_bp_resume() can call apply_microcode()
	 */
	p = find_patch(cpu);
	if (p && (p->patch_id == csig->rev))
		uci->mc = p->data;

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	pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);

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	return 0;
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}

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static unsigned int verify_patch_size(u8 family, u32 patch_size,
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				      unsigned int size)
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{
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	u32 max_size;

#define F1XH_MPB_MAX_SIZE 2048
#define F14H_MPB_MAX_SIZE 1824
#define F15H_MPB_MAX_SIZE 4096
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#define F16H_MPB_MAX_SIZE 3458
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	switch (family) {
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	case 0x14:
		max_size = F14H_MPB_MAX_SIZE;
		break;
	case 0x15:
		max_size = F15H_MPB_MAX_SIZE;
		break;
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	case 0x16:
		max_size = F16H_MPB_MAX_SIZE;
		break;
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	default:
		max_size = F1XH_MPB_MAX_SIZE;
		break;
	}

	if (patch_size > min_t(u32, size, max_size)) {
		pr_err("patch size mismatch\n");
		return 0;
	}

	return patch_size;
}

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/*
 * Those patch levels cannot be updated to newer ones and thus should be final.
 */
static u32 final_levels[] = {
	0x01000098,
	0x0100009f,
	0x010000af,
	0, /* T-101 terminator */
};

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/*
 * Check the current patch level on this CPU.
 *
 * @rev: Use it to return the patch level. It is set to 0 in the case of
 * error.
 *
 * Returns:
 *  - true: if update should stop
 *  - false: otherwise
 */
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bool check_current_patch_level(u32 *rev, bool early)
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{
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	u32 lvl, dummy, i;
	bool ret = false;
	u32 *levels;

	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);

	if (IS_ENABLED(CONFIG_X86_32) && early)
		levels = (u32 *)__pa_nodebug(&final_levels);
	else
		levels = final_levels;

	for (i = 0; levels[i]; i++) {
		if (lvl == levels[i]) {
			lvl = 0;
			ret = true;
			break;
		}
	}
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	if (rev)
		*rev = lvl;
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	return ret;
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}

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static int apply_microcode_amd(int cpu)
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{
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	struct cpuinfo_x86 *c = &cpu_data(cpu);
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	struct microcode_amd *mc_amd;
	struct ucode_cpu_info *uci;
	struct ucode_patch *p;
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	u32 rev;
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	BUG_ON(raw_smp_processor_id() != cpu);
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	uci = ucode_cpu_info + cpu;
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	p = find_patch(cpu);
	if (!p)
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		return 0;
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	mc_amd  = p->data;
	uci->mc = p->data;

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	if (check_current_patch_level(&rev, false))
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		return -1;
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	/* need to apply patch? */
	if (rev >= mc_amd->hdr.patch_id) {
		c->microcode = rev;
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		uci->cpu_sig.rev = rev;
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		return 0;
	}

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	if (__apply_microcode_amd(mc_amd)) {
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		pr_err("CPU%d: update failed for patch_level=0x%08x\n",
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			cpu, mc_amd->hdr.patch_id);
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		return -1;
	}
	pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
		mc_amd->hdr.patch_id);
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	uci->cpu_sig.rev = mc_amd->hdr.patch_id;
	c->microcode = mc_amd->hdr.patch_id;
709 710

	return 0;
711 712
}

713
static int install_equiv_cpu_table(const u8 *buf)
714
{
715 716 717
	unsigned int *ibuf = (unsigned int *)buf;
	unsigned int type = ibuf[1];
	unsigned int size = ibuf[2];
718

719
	if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
720 721
		pr_err("empty section/"
		       "invalid type field in container file section header\n");
722
		return -EINVAL;
723 724
	}

725
	equiv_cpu_table = vmalloc(size);
726
	if (!equiv_cpu_table) {
727
		pr_err("failed to allocate equivalent CPU table\n");
728
		return -ENOMEM;
729 730
	}

731
	memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
732

733 734
	/* add header length */
	return size + CONTAINER_HDR_SZ;
735 736
}

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Dmitry Adamushko 已提交
737
static void free_equiv_cpu_table(void)
738
{
739 740
	vfree(equiv_cpu_table);
	equiv_cpu_table = NULL;
D
Dmitry Adamushko 已提交
741
}
742

743
static void cleanup(void)
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Dmitry Adamushko 已提交
744
{
745 746 747 748 749 750 751 752 753 754 755
	free_equiv_cpu_table();
	free_cache();
}

/*
 * We return the current size even if some of the checks failed so that
 * we can skip over the next patch. If we return a negative value, we
 * signal a grave error like a memory allocation has failed and the
 * driver cannot continue functioning normally. In such cases, we tear
 * down everything we've used up so far and exit.
 */
756
static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover)
757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776
{
	struct microcode_header_amd *mc_hdr;
	struct ucode_patch *patch;
	unsigned int patch_size, crnt_size, ret;
	u32 proc_fam;
	u16 proc_id;

	patch_size  = *(u32 *)(fw + 4);
	crnt_size   = patch_size + SECTION_HDR_SIZE;
	mc_hdr	    = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
	proc_id	    = mc_hdr->processor_rev_id;

	proc_fam = find_cpu_family_by_equiv_cpu(proc_id);
	if (!proc_fam) {
		pr_err("No patch family for equiv ID: 0x%04x\n", proc_id);
		return crnt_size;
	}

	/* check if patch is for the current family */
	proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff);
777
	if (proc_fam != family)
778 779 780 781 782 783 784 785
		return crnt_size;

	if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
		pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
			mc_hdr->patch_id);
		return crnt_size;
	}

786
	ret = verify_patch_size(family, patch_size, leftover);
787 788 789 790 791 792 793 794 795 796 797
	if (!ret) {
		pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id);
		return crnt_size;
	}

	patch = kzalloc(sizeof(*patch), GFP_KERNEL);
	if (!patch) {
		pr_err("Patch allocation failure.\n");
		return -EINVAL;
	}

798
	patch->data = kmemdup(fw + SECTION_HDR_SIZE, patch_size, GFP_KERNEL);
799 800 801 802 803 804 805 806 807 808
	if (!patch->data) {
		pr_err("Patch data allocation failure.\n");
		kfree(patch);
		return -EINVAL;
	}

	INIT_LIST_HEAD(&patch->plist);
	patch->patch_id  = mc_hdr->patch_id;
	patch->equiv_cpu = proc_id;

809 810 811
	pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
		 __func__, patch->patch_id, proc_id);

812 813 814 815 816 817
	/* ... and add to cache. */
	update_cache(patch);

	return crnt_size;
}

818 819
static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
					     size_t size)
820 821 822 823 824
{
	enum ucode_state ret = UCODE_ERROR;
	unsigned int leftover;
	u8 *fw = (u8 *)data;
	int crnt_size = 0;
825
	int offset;
826

827
	offset = install_equiv_cpu_table(data);
828
	if (offset < 0) {
829
		pr_err("failed to create equivalent cpu table\n");
830
		return ret;
831
	}
832
	fw += offset;
D
Dmitry Adamushko 已提交
833 834
	leftover = size - offset;

835
	if (*(u32 *)fw != UCODE_UCODE_TYPE) {
836
		pr_err("invalid type field in container file section header\n");
837 838
		free_equiv_cpu_table();
		return ret;
839
	}
D
Dmitry Adamushko 已提交
840

841
	while (leftover) {
842
		crnt_size = verify_and_add_patch(family, fw, leftover);
843 844
		if (crnt_size < 0)
			return ret;
845

846 847
		fw	 += crnt_size;
		leftover -= crnt_size;
848
	}
D
Dmitry Adamushko 已提交
849

850
	return UCODE_OK;
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Dmitry Adamushko 已提交
851 852
}

853 854
static enum ucode_state
load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size)
855 856 857 858 859 860
{
	enum ucode_state ret;

	/* free old equiv table */
	free_equiv_cpu_table();

861
	ret = __load_microcode_amd(family, data, size);
862 863 864 865

	if (ret != UCODE_OK)
		cleanup();

866
#ifdef CONFIG_X86_32
867
	/* save BSP's matching patch for early load */
868 869
	if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
		struct ucode_patch *p = find_patch(cpu);
870
		if (p) {
871 872 873
			memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
			memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
							       PATCH_MAX_SIZE));
874 875 876
		}
	}
#endif
877 878 879
	return ret;
}

880 881 882 883 884 885 886 887
/*
 * AMD microcode firmware naming convention, up to family 15h they are in
 * the legacy file:
 *
 *    amd-ucode/microcode_amd.bin
 *
 * This legacy file is always smaller than 2K in size.
 *
888
 * Beginning with family 15h, they are in family-specific firmware files:
889 890 891 892 893 894 895
 *
 *    amd-ucode/microcode_amd_fam15h.bin
 *    amd-ucode/microcode_amd_fam16h.bin
 *    ...
 *
 * These might be larger than 2K.
 */
896 897
static enum ucode_state request_microcode_amd(int cpu, struct device *device,
					      bool refresh_fw)
D
Dmitry Adamushko 已提交
898
{
899 900
	char fw_name[36] = "amd-ucode/microcode_amd.bin";
	struct cpuinfo_x86 *c = &cpu_data(cpu);
901 902 903 904 905 906
	enum ucode_state ret = UCODE_NFOUND;
	const struct firmware *fw;

	/* reload ucode container only on the boot cpu */
	if (!refresh_fw || c->cpu_index != boot_cpu_data.cpu_index)
		return UCODE_OK;
907 908 909

	if (c->x86 >= 0x15)
		snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
D
Dmitry Adamushko 已提交
910

911
	if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
912
		pr_debug("failed to load file %s\n", fw_name);
913
		goto out;
914
	}
D
Dmitry Adamushko 已提交
915

916 917
	ret = UCODE_ERROR;
	if (*(u32 *)fw->data != UCODE_MAGIC) {
918
		pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
919
		goto fw_release;
920 921
	}

922
	ret = load_microcode_amd(cpu, c->x86, fw->data, fw->size);
D
Dmitry Adamushko 已提交
923

924
 fw_release:
925
	release_firmware(fw);
926

927
 out:
D
Dmitry Adamushko 已提交
928 929 930
	return ret;
}

931 932
static enum ucode_state
request_microcode_user(int cpu, const void __user *buf, size_t size)
D
Dmitry Adamushko 已提交
933
{
934
	return UCODE_ERROR;
935 936 937 938 939 940
}

static void microcode_fini_cpu_amd(int cpu)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;

941
	uci->mc = NULL;
942 943 944
}

static struct microcode_ops microcode_amd_ops = {
D
Dmitry Adamushko 已提交
945
	.request_microcode_user           = request_microcode_user,
946
	.request_microcode_fw             = request_microcode_amd,
947 948 949 950 951
	.collect_cpu_info                 = collect_cpu_info_amd,
	.apply_microcode                  = apply_microcode_amd,
	.microcode_fini_cpu               = microcode_fini_cpu_amd,
};

952
struct microcode_ops * __init init_amd_microcode(void)
953
{
954
	struct cpuinfo_x86 *c = &boot_cpu_data;
955 956

	if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
957
		pr_warn("AMD CPU family 0x%x not supported\n", c->x86);
958 959 960
		return NULL;
	}

961 962 963 964
	if (ucode_new_rev)
		pr_info_once("microcode updated early to new patch_level=0x%08x\n",
			     ucode_new_rev);

965
	return &microcode_amd_ops;
966
}
967 968 969

void __exit exit_amd_microcode(void)
{
970
	cleanup();
971
}