qla_os.c 171.9 KB
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/*
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2014 QLogic Corporation
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 *
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"

#include <linux/moduleparam.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
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#include <linux/kthread.h>
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#include <linux/mutex.h>
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#include <linux/kobject.h>
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#include <linux/slab.h>
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#include <linux/blk-mq-pci.h>
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#include <scsi/scsi_tcq.h>
#include <scsi/scsicam.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_transport_fc.h>

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#include "qla_target.h"

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/*
 * Driver version
 */
char qla2x00_version_str[40];

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static int apidev_major;

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/*
 * SRB allocation cache
 */
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struct kmem_cache *srb_cachep;
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/*
 * CT6 CTX allocation cache
 */
static struct kmem_cache *ctx_cachep;
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/*
 * error level for logging
 */
int ql_errlev = ql_log_all;
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static int ql2xenableclass2;
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module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
MODULE_PARM_DESC(ql2xenableclass2,
		"Specify if Class 2 operations are supported from the very "
		"beginning. Default is 0 - class 2 not supported.");

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int ql2xlogintimeout = 20;
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module_param(ql2xlogintimeout, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xlogintimeout,
		"Login timeout value in seconds.");

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int qlport_down_retry;
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module_param(qlport_down_retry, int, S_IRUGO);
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MODULE_PARM_DESC(qlport_down_retry,
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		"Maximum number of command retries to a port that returns "
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		"a PORT-DOWN status.");

int ql2xplogiabsentdevice;
module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xplogiabsentdevice,
		"Option to enable PLOGI to devices that are not present after "
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		"a Fabric scan.  This is needed for several broken switches. "
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		"Default is 0 - no PLOGI. 1 - perfom PLOGI.");

int ql2xloginretrycount = 0;
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module_param(ql2xloginretrycount, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xloginretrycount,
		"Specify an alternate value for the NVRAM login retry count.");

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int ql2xallocfwdump = 1;
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module_param(ql2xallocfwdump, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xallocfwdump,
		"Option to enable allocation of memory for a firmware dump "
		"during HBA initialization.  Memory allocation requirements "
		"vary by ISP type.  Default is 1 - allocate memory.");

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int ql2xextended_error_logging;
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module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
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module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xextended_error_logging,
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		"Option to enable extended error logging,\n"
		"\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
		"\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
		"\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
		"\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
		"\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
		"\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
		"\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
		"\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
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		"\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
		"\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
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		"\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
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		"\t\t0x1e400000 - Preferred value for capturing essential "
		"debug information (equivalent to old "
		"ql2xextended_error_logging=1).\n"
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		"\t\tDo LOGICAL OR of the value to enable more than one level");
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int ql2xshiftctondsd = 6;
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module_param(ql2xshiftctondsd, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xshiftctondsd,
		"Set to control shifting of command type processing "
		"based on total number of SG elements.");

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int ql2xfdmienable=1;
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module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
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module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xfdmienable,
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		"Enables FDMI registrations. "
		"0 - no FDMI. Default is 1 - perform FDMI.");
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#define MAX_Q_DEPTH	32
static int ql2xmaxqdepth = MAX_Q_DEPTH;
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module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xmaxqdepth,
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		"Maximum queue depth to set for each LUN. "
		"Default is 32.");
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int ql2xenabledif = 2;
module_param(ql2xenabledif, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xenabledif,
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		" Enable T10-CRC-DIF:\n"
		" Default is 2.\n"
		"  0 -- No DIF Support\n"
		"  1 -- Enable DIF for all types\n"
		"  2 -- Enable DIF for all types, except Type 0.\n");
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int ql2xenablehba_err_chk = 2;
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module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xenablehba_err_chk,
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		" Enable T10-CRC-DIF Error isolation by HBA:\n"
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		" Default is 2.\n"
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		"  0 -- Error isolation disabled\n"
		"  1 -- Error isolation enabled only for DIX Type 0\n"
		"  2 -- Error isolation enabled for all Types\n");
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int ql2xiidmaenable=1;
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module_param(ql2xiidmaenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xiidmaenable,
		"Enables iIDMA settings "
		"Default is 1 - perform iIDMA. 0 - no iIDMA.");

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int ql2xmqsupport = 1;
module_param(ql2xmqsupport, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmqsupport,
		"Enable on demand multiple queue pairs support "
		"Default is 1 for supported. "
		"Set it to 0 to turn off mq qpair support.");
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int ql2xfwloadbin;
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module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
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module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xfwloadbin,
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		"Option to specify location from which to load ISP firmware:.\n"
		" 2 -- load firmware via the request_firmware() (hotplug).\n"
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		"      interface.\n"
		" 1 -- load firmware from flash.\n"
		" 0 -- use default semantics.\n");

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int ql2xetsenable;
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module_param(ql2xetsenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xetsenable,
		"Enables firmware ETS burst."
		"Default is 0 - skip ETS enablement.");

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int ql2xdbwr = 1;
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module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdbwr,
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		"Option to specify scheme for request queue posting.\n"
		" 0 -- Regular doorbell.\n"
		" 1 -- CAMRAM doorbell (faster).\n");
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int ql2xtargetreset = 1;
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module_param(ql2xtargetreset, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xtargetreset,
		 "Enable target reset."
		 "Default is 1 - use hw defaults.");

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int ql2xgffidenable;
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module_param(ql2xgffidenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xgffidenable,
		"Enables GFF_ID checks of port type. "
		"Default is 0 - Do not use GFF_ID information.");
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int ql2xasynctmfenable;
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module_param(ql2xasynctmfenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xasynctmfenable,
		"Enables issue of TM IOCBs asynchronously via IOCB mechanism"
		"Default is 0 - Issue TM IOCBs via mailbox mechanism.");
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int ql2xdontresethba;
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module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdontresethba,
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		"Option to specify reset behaviour.\n"
		" 0 (Default) -- Reset on failure.\n"
		" 1 -- Do not reset on failure.\n");
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uint64_t ql2xmaxlun = MAX_LUNS;
module_param(ql2xmaxlun, ullong, S_IRUGO);
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MODULE_PARM_DESC(ql2xmaxlun,
		"Defines the maximum LU number to register with the SCSI "
		"midlayer. Default is 65535.");

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int ql2xmdcapmask = 0x1F;
module_param(ql2xmdcapmask, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdcapmask,
		"Set the Minidump driver capture mask level. "
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		"Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
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int ql2xmdenable = 1;
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module_param(ql2xmdenable, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdenable,
		"Enable/disable MiniDump. "
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		"0 - MiniDump disabled. "
		"1 (Default) - MiniDump enabled.");
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int ql2xexlogins = 0;
module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xexlogins,
		 "Number of extended Logins. "
		 "0 (Default)- Disabled.");

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int ql2xexchoffld = 0;
module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xexchoffld,
		 "Number of exchanges to offload. "
		 "0 (Default)- Disabled.");

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int ql2xfwholdabts = 0;
module_param(ql2xfwholdabts, int, S_IRUGO);
MODULE_PARM_DESC(ql2xfwholdabts,
		"Allow FW to hold status IOCB until ABTS rsp received. "
		"0 (Default) Do not set fw option. "
		"1 - Set fw option to hold ABTS.");

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/*
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 * SCSI host template entry points
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 */
static int qla2xxx_slave_configure(struct scsi_device * device);
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static int qla2xxx_slave_alloc(struct scsi_device *);
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static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
static void qla2xxx_scan_start(struct Scsi_Host *);
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static void qla2xxx_slave_destroy(struct scsi_device *);
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static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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static int qla2xxx_eh_abort(struct scsi_cmnd *);
static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
static int qla2xxx_eh_host_reset(struct scsi_cmnd *);

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static void qla2x00_clear_drv_active(struct qla_hw_data *);
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static void qla2x00_free_device(scsi_qla_host_t *);
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static void qla83xx_disable_laser(scsi_qla_host_t *vha);
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static int qla2xxx_map_queues(struct Scsi_Host *shost);
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struct scsi_host_template qla2xxx_driver_template = {
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	.module			= THIS_MODULE,
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	.name			= QLA2XXX_DRIVER_NAME,
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	.queuecommand		= qla2xxx_queuecommand,
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	.eh_timed_out		= fc_eh_timed_out,
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	.eh_abort_handler	= qla2xxx_eh_abort,
	.eh_device_reset_handler = qla2xxx_eh_device_reset,
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	.eh_target_reset_handler = qla2xxx_eh_target_reset,
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	.eh_bus_reset_handler	= qla2xxx_eh_bus_reset,
	.eh_host_reset_handler	= qla2xxx_eh_host_reset,

	.slave_configure	= qla2xxx_slave_configure,

	.slave_alloc		= qla2xxx_slave_alloc,
	.slave_destroy		= qla2xxx_slave_destroy,
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	.scan_finished		= qla2xxx_scan_finished,
	.scan_start		= qla2xxx_scan_start,
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	.change_queue_depth	= scsi_change_queue_depth,
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	.map_queues             = qla2xxx_map_queues,
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	.this_id		= -1,
	.cmd_per_lun		= 3,
	.use_clustering		= ENABLE_CLUSTERING,
	.sg_tablesize		= SG_ALL,

	.max_sectors		= 0xFFFF,
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	.shost_attrs		= qla2x00_host_attrs,
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	.supported_mode		= MODE_INITIATOR,
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	.track_queue_depth	= 1,
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};

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static struct scsi_transport_template *qla2xxx_transport_template = NULL;
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struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
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/* TODO Convert to inlines
 *
 * Timer routines
 */

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__inline__ void
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qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
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{
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	init_timer(&vha->timer);
	vha->timer.expires = jiffies + interval * HZ;
	vha->timer.data = (unsigned long)vha;
	vha->timer.function = (void (*)(unsigned long))func;
	add_timer(&vha->timer);
	vha->timer_active = 1;
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}

static inline void
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qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
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{
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	/* Currently used for 82XX only. */
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	if (vha->device_flags & DFLG_DEV_FAILED) {
		ql_dbg(ql_dbg_timer, vha, 0x600d,
		    "Device in a failed state, returning.\n");
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		return;
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	}
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	mod_timer(&vha->timer, jiffies + interval * HZ);
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}

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static __inline__ void
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qla2x00_stop_timer(scsi_qla_host_t *vha)
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{
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	del_timer_sync(&vha->timer);
	vha->timer_active = 0;
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}

static int qla2x00_do_dpc(void *data);

static void qla2x00_rst_aen(scsi_qla_host_t *);

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static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
	struct req_que **, struct rsp_que **);
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static void qla2x00_free_fw_dump(struct qla_hw_data *);
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static void qla2x00_mem_free(struct qla_hw_data *);
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int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
	struct qla_qpair *qpair);
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/* -------------------------------------------------------------------------- */
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static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
				struct rsp_que *rsp)
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{
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	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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	ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
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				GFP_KERNEL);
	if (!ha->req_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003b,
		    "Unable to allocate memory for request queue ptrs.\n");
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		goto fail_req_map;
	}

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	ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
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				GFP_KERNEL);
	if (!ha->rsp_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003c,
		    "Unable to allocate memory for response queue ptrs.\n");
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		goto fail_rsp_map;
	}
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	if (ql2xmqsupport && ha->max_qpairs) {
		ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
			GFP_KERNEL);
		if (!ha->queue_pair_map) {
			ql_log(ql_log_fatal, vha, 0x0180,
			    "Unable to allocate memory for queue pair ptrs.\n");
			goto fail_qpair_map;
		}
		ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
		if (ha->base_qpair == NULL) {
			ql_log(ql_log_warn, vha, 0x0182,
			    "Failed to allocate base queue pair memory.\n");
			goto fail_base_qpair;
		}
		ha->base_qpair->req = req;
		ha->base_qpair->rsp = rsp;
	}

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	/*
	 * Make sure we record at least the request and response queue zero in
	 * case we need to free them if part of the probe fails.
	 */
	ha->rsp_q_map[0] = rsp;
	ha->req_q_map[0] = req;
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	set_bit(0, ha->rsp_qid_map);
	set_bit(0, ha->req_qid_map);
	return 1;

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fail_base_qpair:
	kfree(ha->queue_pair_map);
fail_qpair_map:
	kfree(ha->rsp_q_map);
	ha->rsp_q_map = NULL;
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fail_rsp_map:
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
fail_req_map:
	return -ENOMEM;
}

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static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
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{
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	if (IS_QLAFX00(ha)) {
		if (req && req->ring_fx00)
			dma_free_coherent(&ha->pdev->dev,
			    (req->length_fx00 + 1) * sizeof(request_t),
			    req->ring_fx00, req->dma_fx00);
	} else if (req && req->ring)
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		dma_free_coherent(&ha->pdev->dev,
		(req->length + 1) * sizeof(request_t),
		req->ring, req->dma);

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	if (req)
		kfree(req->outstanding_cmds);

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	kfree(req);
	req = NULL;
}

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static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
{
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	if (IS_QLAFX00(ha)) {
		if (rsp && rsp->ring)
			dma_free_coherent(&ha->pdev->dev,
			    (rsp->length_fx00 + 1) * sizeof(request_t),
			    rsp->ring_fx00, rsp->dma_fx00);
	} else if (rsp && rsp->ring) {
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		dma_free_coherent(&ha->pdev->dev,
		(rsp->length + 1) * sizeof(response_t),
		rsp->ring, rsp->dma);
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	}
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	kfree(rsp);
	rsp = NULL;
}

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static void qla2x00_free_queues(struct qla_hw_data *ha)
{
	struct req_que *req;
	struct rsp_que *rsp;
	int cnt;
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	unsigned long flags;
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	spin_lock_irqsave(&ha->hardware_lock, flags);
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	for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
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		if (!test_bit(cnt, ha->req_qid_map))
			continue;

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		req = ha->req_q_map[cnt];
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		clear_bit(cnt, ha->req_qid_map);
		ha->req_q_map[cnt] = NULL;

		spin_unlock_irqrestore(&ha->hardware_lock, flags);
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		qla2x00_free_req_que(ha, req);
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		spin_lock_irqsave(&ha->hardware_lock, flags);
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	}
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	spin_unlock_irqrestore(&ha->hardware_lock, flags);

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	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
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	spin_lock_irqsave(&ha->hardware_lock, flags);
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	for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
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		if (!test_bit(cnt, ha->rsp_qid_map))
			continue;

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		rsp = ha->rsp_q_map[cnt];
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		clear_bit(cnt, ha->rsp_qid_map);
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		ha->rsp_q_map[cnt] =  NULL;
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
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		qla2x00_free_rsp_que(ha, rsp);
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		spin_lock_irqsave(&ha->hardware_lock, flags);
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	}
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	spin_unlock_irqrestore(&ha->hardware_lock, flags);

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	kfree(ha->rsp_q_map);
	ha->rsp_q_map = NULL;
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}

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static char *
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qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
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{
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	struct qla_hw_data *ha = vha->hw;
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	static char *pci_bus_modes[] = {
		"33", "66", "100", "133",
	};
	uint16_t pci_bus;

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
	if (pci_bus) {
		strcat(str, "-X (");
		strcat(str, pci_bus_modes[pci_bus]);
	} else {
		pci_bus = (ha->pci_attr & BIT_8) >> 8;
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus]);
	}
	strcat(str, " MHz)");

	return (str);
}

506
static char *
507
qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
508 509
{
	static char *pci_bus_modes[] = { "33", "66", "100", "133", };
510
	struct qla_hw_data *ha = vha->hw;
511 512
	uint32_t pci_bus;

513
	if (pci_is_pcie(ha->pdev)) {
514
		char lwstr[6];
515
		uint32_t lstat, lspeed, lwidth;
516

517 518 519
		pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
		lspeed = lstat & PCI_EXP_LNKCAP_SLS;
		lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
520 521

		strcpy(str, "PCIe (");
522 523
		switch (lspeed) {
		case 1:
524
			strcat(str, "2.5GT/s ");
525 526
			break;
		case 2:
527
			strcat(str, "5.0GT/s ");
528 529 530 531 532
			break;
		case 3:
			strcat(str, "8.0GT/s ");
			break;
		default:
533
			strcat(str, "<unknown> ");
534 535
			break;
		}
536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560
		snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
		strcat(str, lwstr);

		return str;
	}

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
	if (pci_bus == 0 || pci_bus == 8) {
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus >> 3]);
	} else {
		strcat(str, "-X ");
		if (pci_bus & BIT_2)
			strcat(str, "Mode 2");
		else
			strcat(str, "Mode 1");
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
	}
	strcat(str, " MHz)");

	return str;
}

561
static char *
562
qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
L
Linus Torvalds 已提交
563 564
{
	char un_str[10];
565
	struct qla_hw_data *ha = vha->hw;
A
Andrew Vasquez 已提交
566

567 568
	snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
	    ha->fw_minor_version, ha->fw_subminor_version);
L
Linus Torvalds 已提交
569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598

	if (ha->fw_attributes & BIT_9) {
		strcat(str, "FLX");
		return (str);
	}

	switch (ha->fw_attributes & 0xFF) {
	case 0x7:
		strcat(str, "EF");
		break;
	case 0x17:
		strcat(str, "TP");
		break;
	case 0x37:
		strcat(str, "IP");
		break;
	case 0x77:
		strcat(str, "VI");
		break;
	default:
		sprintf(un_str, "(%x)", ha->fw_attributes);
		strcat(str, un_str);
		break;
	}
	if (ha->fw_attributes & 0x100)
		strcat(str, "X");

	return (str);
}

599
static char *
600
qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
601
{
602
	struct qla_hw_data *ha = vha->hw;
603

604
	snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
605
	    ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
606 607 608
	return str;
}

609 610
void
qla2x00_sp_free_dma(void *vha, void *ptr)
611
{
612 613 614 615
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
	struct qla_hw_data *ha = sp->fcport->vha->hw;
	void *ctx = GET_CMD_CTX_SP(sp);
616

617 618 619
	if (sp->flags & SRB_DMA_VALID) {
		scsi_dma_unmap(cmd);
		sp->flags &= ~SRB_DMA_VALID;
620
	}
621

622 623 624 625 626 627 628 629
	if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
		dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
		    scsi_prot_sg_count(cmd), cmd->sc_data_direction);
		sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
		/* List assured to be having elements */
630
		qla2x00_clean_dsd_pool(ha, sp, NULL);
631 632 633 634 635 636 637 638 639 640 641
		sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
		dma_pool_free(ha->dl_dma_pool, ctx,
		    ((struct crc_context *)ctx)->crc_ctx_dma);
		sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
	}

	if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
		struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
642

643 644 645 646 647 648 649 650 651 652
		dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
			ctx1->fcp_cmnd_dma);
		list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
		ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
		ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
		mempool_free(ctx1, ha->ctx_mempool);
		ctx1 = NULL;
	}

	CMD_SP(cmd) = NULL;
653
	qla2x00_rel_sp(sp->fcport->vha, sp);
654 655
}

656
void
657 658 659 660 661 662 663 664 665 666 667 668 669
qla2x00_sp_compl(void *data, void *ptr, int res)
{
	struct qla_hw_data *ha = (struct qla_hw_data *)data;
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);

	cmd->result = res;

	if (atomic_read(&sp->ref_count) == 0) {
		ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
		    "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
		    sp, GET_CMD_SP(sp));
		if (ql2xextended_error_logging & ql_dbg_io)
670
			WARN_ON(atomic_read(&sp->ref_count) == 0);
671 672 673 674 675 676 677
		return;
	}
	if (!atomic_dec_and_test(&sp->ref_count))
		return;

	qla2x00_sp_free_dma(ha, sp);
	cmd->scsi_done(cmd);
678 679
}

680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748
void
qla2xxx_qpair_sp_free_dma(void *vha, void *ptr)
{
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
	struct qla_hw_data *ha = sp->fcport->vha->hw;
	void *ctx = GET_CMD_CTX_SP(sp);

	if (sp->flags & SRB_DMA_VALID) {
		scsi_dma_unmap(cmd);
		sp->flags &= ~SRB_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
		dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
		    scsi_prot_sg_count(cmd), cmd->sc_data_direction);
		sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
		/* List assured to be having elements */
		qla2x00_clean_dsd_pool(ha, sp, NULL);
		sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
		dma_pool_free(ha->dl_dma_pool, ctx,
		    ((struct crc_context *)ctx)->crc_ctx_dma);
		sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
	}

	if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
		struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;

		dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
		    ctx1->fcp_cmnd_dma);
		list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
		ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
		ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
		mempool_free(ctx1, ha->ctx_mempool);
	}

	CMD_SP(cmd) = NULL;
	qla2xxx_rel_qpair_sp(sp->qpair, sp);
}

void
qla2xxx_qpair_sp_compl(void *data, void *ptr, int res)
{
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);

	cmd->result = res;

	if (atomic_read(&sp->ref_count) == 0) {
		ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
		    "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
		    sp, GET_CMD_SP(sp));
		if (ql2xextended_error_logging & ql_dbg_io)
			WARN_ON(atomic_read(&sp->ref_count) == 0);
		return;
	}
	if (!atomic_dec_and_test(&sp->ref_count))
		return;

	qla2xxx_qpair_sp_free_dma(sp->fcport->vha, sp);
	cmd->scsi_done(cmd);
}

749 750 751
/* If we are SP1 here, we need to still take and release the host_lock as SP1
 * does not have the changes necessary to avoid taking host->host_lock.
 */
L
Linus Torvalds 已提交
752
static int
753
qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
754
{
755
	scsi_qla_host_t *vha = shost_priv(host);
756
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
757
	struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
758 759
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
760 761
	srb_t *sp;
	int rval;
762 763 764
	struct qla_qpair *qpair = NULL;
	uint32_t tag;
	uint16_t hwq;
765

766 767 768 769 770
	if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

771 772 773 774 775 776 777 778 779 780 781
	if (ha->mqenable) {
		if (shost_use_blk_mq(vha->host)) {
			tag = blk_mq_unique_tag(cmd->request);
			hwq = blk_mq_unique_tag_to_hwq(tag);
			qpair = ha->queue_pair_map[hwq];
		} else if (vha->vp_idx && vha->qpair) {
			qpair = vha->qpair;
		}

		if (qpair)
			return qla2xxx_mqueuecommand(host, cmd, qpair);
782 783
	}

784
	if (ha->flags.eeh_busy) {
785
		if (ha->flags.pci_channel_io_perm_failure) {
786
			ql_dbg(ql_dbg_aer, vha, 0x9010,
787 788
			    "PCI Channel IO permanent failure, exiting "
			    "cmd=%p.\n", cmd);
789
			cmd->result = DID_NO_CONNECT << 16;
790
		} else {
791
			ql_dbg(ql_dbg_aer, vha, 0x9011,
792
			    "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
793
			cmd->result = DID_REQUEUE << 16;
794
		}
795 796 797
		goto qc24_fail_command;
	}

798 799 800
	rval = fc_remote_port_chkready(rport);
	if (rval) {
		cmd->result = rval;
801
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
802 803
		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
		    cmd, rval);
804 805 806
		goto qc24_fail_command;
	}

807 808
	if (!vha->flags.difdix_supported &&
		scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
809 810 811
			ql_dbg(ql_dbg_io, vha, 0x3004,
			    "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
			    cmd);
812 813 814
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
	}
815 816 817 818 819 820

	if (!fcport) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

821 822
	if (atomic_read(&fcport->state) != FCS_ONLINE) {
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
823
			atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
824 825 826 827
			ql_dbg(ql_dbg_io, vha, 0x3005,
			    "Returning DNC, fcport_state=%d loop_state=%d.\n",
			    atomic_read(&fcport->state),
			    atomic_read(&base_vha->loop_state));
828 829 830
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
		}
831
		goto qc24_target_busy;
832 833
	}

834 835 836 837
	/*
	 * Return target busy if we've received a non-zero retry_delay_timer
	 * in a FCP_RSP.
	 */
838 839 840
	if (fcport->retry_delay_timestamp == 0) {
		/* retry delay not set */
	} else if (time_after(jiffies, fcport->retry_delay_timestamp))
841 842 843 844
		fcport->retry_delay_timestamp = 0;
	else
		goto qc24_target_busy;

845
	sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
846
	if (!sp)
847
		goto qc24_host_busy;
848

849 850 851 852 853 854 855
	sp->u.scmd.cmd = cmd;
	sp->type = SRB_SCSI_CMD;
	atomic_set(&sp->ref_count, 1);
	CMD_SP(cmd) = (void *)sp;
	sp->free = qla2x00_sp_free_dma;
	sp->done = qla2x00_sp_compl;

856
	rval = ha->isp_ops->start_scsi(sp);
857
	if (rval != QLA_SUCCESS) {
858
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
859
		    "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
860
		goto qc24_host_busy_free_sp;
861
	}
862 863 864 865

	return 0;

qc24_host_busy_free_sp:
866
	qla2x00_sp_free_dma(ha, sp);
867

868
qc24_host_busy:
869 870
	return SCSI_MLQUEUE_HOST_BUSY;

871 872 873
qc24_target_busy:
	return SCSI_MLQUEUE_TARGET_BUSY;

874
qc24_fail_command:
875
	cmd->scsi_done(cmd);
876 877 878 879

	return 0;
}

880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968
/* For MQ supported I/O */
int
qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
    struct qla_qpair *qpair)
{
	scsi_qla_host_t *vha = shost_priv(host);
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
	struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
	srb_t *sp;
	int rval;

	rval = fc_remote_port_chkready(rport);
	if (rval) {
		cmd->result = rval;
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
		    cmd, rval);
		goto qc24_fail_command;
	}

	if (!fcport) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

	if (atomic_read(&fcport->state) != FCS_ONLINE) {
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
			atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
			ql_dbg(ql_dbg_io, vha, 0x3077,
			    "Returning DNC, fcport_state=%d loop_state=%d.\n",
			    atomic_read(&fcport->state),
			    atomic_read(&base_vha->loop_state));
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
		}
		goto qc24_target_busy;
	}

	/*
	 * Return target busy if we've received a non-zero retry_delay_timer
	 * in a FCP_RSP.
	 */
	if (fcport->retry_delay_timestamp == 0) {
		/* retry delay not set */
	} else if (time_after(jiffies, fcport->retry_delay_timestamp))
		fcport->retry_delay_timestamp = 0;
	else
		goto qc24_target_busy;

	sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
	if (!sp)
		goto qc24_host_busy;

	sp->u.scmd.cmd = cmd;
	sp->type = SRB_SCSI_CMD;
	atomic_set(&sp->ref_count, 1);
	CMD_SP(cmd) = (void *)sp;
	sp->free = qla2xxx_qpair_sp_free_dma;
	sp->done = qla2xxx_qpair_sp_compl;
	sp->qpair = qpair;

	rval = ha->isp_ops->start_scsi_mq(sp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
		    "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
		if (rval == QLA_INTERFACE_ERROR)
			goto qc24_fail_command;
		goto qc24_host_busy_free_sp;
	}

	return 0;

qc24_host_busy_free_sp:
	qla2xxx_qpair_sp_free_dma(vha, sp);

qc24_host_busy:
	return SCSI_MLQUEUE_HOST_BUSY;

qc24_target_busy:
	return SCSI_MLQUEUE_TARGET_BUSY;

qc24_fail_command:
	cmd->scsi_done(cmd);

	return 0;
}

L
Linus Torvalds 已提交
969 970 971 972 973 974 975 976 977 978 979 980 981
/*
 * qla2x00_eh_wait_on_command
 *    Waits for the command to be returned by the Firmware for some
 *    max time.
 *
 * Input:
 *    cmd = Scsi Command to wait on.
 *
 * Return:
 *    Not Found : 0
 *    Found : 1
 */
static int
982
qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
983
{
984
#define ABORT_POLLING_PERIOD	1000
985
#define ABORT_WAIT_ITER		((2 * 1000) / (ABORT_POLLING_PERIOD))
已提交
986
	unsigned long wait_iter = ABORT_WAIT_ITER;
987 988
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
已提交
989
	int ret = QLA_SUCCESS;
L
Linus Torvalds 已提交
990

991
	if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
992 993
		ql_dbg(ql_dbg_taskm, vha, 0x8005,
		    "Return:eh_wait.\n");
994 995 996
		return ret;
	}

997
	while (CMD_SP(cmd) && wait_iter--) {
998
		msleep(ABORT_POLLING_PERIOD);
已提交
999 1000 1001
	}
	if (CMD_SP(cmd))
		ret = QLA_FUNCTION_FAILED;
L
Linus Torvalds 已提交
1002

已提交
1003
	return ret;
L
Linus Torvalds 已提交
1004 1005 1006 1007
}

/*
 * qla2x00_wait_for_hba_online
A
Andrew Vasquez 已提交
1008
 *    Wait till the HBA is online after going through
L
Linus Torvalds 已提交
1009 1010 1011 1012 1013
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline
 *
 * Input:
 *     ha - pointer to host adapter structure
A
Andrew Vasquez 已提交
1014 1015
 *
 * Note:
L
Linus Torvalds 已提交
1016 1017 1018 1019 1020 1021 1022
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online) : 0
 *    Failed  (Adapter is offline/disabled) : 1
 */
1023
int
1024
qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
1025
{
1026 1027
	int		return_status;
	unsigned long	wait_online;
1028 1029
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
1030

A
Andrew Vasquez 已提交
1031
	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1032 1033 1034 1035
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_online)) {
L
Linus Torvalds 已提交
1036 1037 1038

		msleep(1000);
	}
1039
	if (base_vha->flags.online)
A
Andrew Vasquez 已提交
1040
		return_status = QLA_SUCCESS;
L
Linus Torvalds 已提交
1041 1042 1043 1044 1045 1046
	else
		return_status = QLA_FUNCTION_FAILED;

	return (return_status);
}

1047
/*
1048 1049
 * qla2x00_wait_for_hba_ready
 * Wait till the HBA is ready before doing driver unload
1050 1051 1052 1053 1054 1055 1056 1057 1058
 *
 * Input:
 *     ha - pointer to host adapter structure
 *
 * Note:
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 */
1059 1060
static void
qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1061 1062
{
	struct qla_hw_data *ha = vha->hw;
1063
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1064

1065 1066 1067 1068 1069 1070
	while ((qla2x00_reset_active(vha) || ha->dpc_active ||
		ha->flags.mbox_busy) ||
	       test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
	       test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
		if (test_bit(UNLOADING, &base_vha->dpc_flags))
			break;
1071
		msleep(1000);
1072
	}
1073 1074
}

1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102
int
qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_reset;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_reset)) {

		msleep(1000);

		if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
		    ha->flags.chip_reset_done)
			break;
	}
	if (ha->flags.chip_reset_done)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

	return return_status;
}

1103 1104 1105 1106 1107 1108
static void
sp_get(struct srb *sp)
{
	atomic_inc(&sp->ref_count);
}

1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132
#define ISP_REG_DISCONNECT 0xffffffffU
/**************************************************************************
* qla2x00_isp_reg_stat
*
* Description:
*	Read the host status register of ISP before aborting the command.
*
* Input:
*	ha = pointer to host adapter structure.
*
*
* Returns:
*	Either true or false.
*
* Note:	Return true if there is register disconnect.
**************************************************************************/
static inline
uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
{
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	return ((RD_REG_DWORD(&reg->host_status)) == ISP_REG_DISCONNECT);
}

L
Linus Torvalds 已提交
1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145
/**************************************************************************
* qla2xxx_eh_abort
*
* Description:
*    The abort function will abort the specified command.
*
* Input:
*    cmd = Linux SCSI command packet to be aborted.
*
* Returns:
*    Either SUCCESS or FAILED.
*
* Note:
1146
*    Only return FAILED if command not returned by firmware.
L
Linus Torvalds 已提交
1147
**************************************************************************/
1148
static int
L
Linus Torvalds 已提交
1149 1150
qla2xxx_eh_abort(struct scsi_cmnd *cmd)
{
1151
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
已提交
1152
	srb_t *sp;
1153
	int ret;
H
Hannes Reinecke 已提交
1154 1155
	unsigned int id;
	uint64_t lun;
1156
	unsigned long flags;
1157
	int rval, wait = 0;
1158
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1159

1160 1161 1162 1163 1164
	if (qla2x00_isp_reg_stat(ha)) {
		ql_log(ql_log_info, vha, 0x8042,
		    "PCI/Register disconnect, exiting.\n");
		return FAILED;
	}
已提交
1165
	if (!CMD_SP(cmd))
1166
		return SUCCESS;
L
Linus Torvalds 已提交
1167

1168 1169 1170 1171 1172
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = SUCCESS;

已提交
1173 1174
	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
1175

1176
	spin_lock_irqsave(&ha->hardware_lock, flags);
1177 1178 1179 1180 1181
	sp = (srb_t *) CMD_SP(cmd);
	if (!sp) {
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
		return SUCCESS;
	}
L
Linus Torvalds 已提交
1182

1183
	ql_dbg(ql_dbg_taskm, vha, 0x8002,
1184 1185
	    "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
	    vha->host_no, id, lun, sp, cmd, sp->handle);
1186

1187 1188
	/* Get a reference to the sp and drop the lock.*/
	sp_get(sp);
1189

1190
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
1191 1192
	rval = ha->isp_ops->abort_command(sp);
	if (rval) {
1193
		if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1194
			ret = SUCCESS;
1195
		else
1196 1197
			ret = FAILED;

1198
		ql_dbg(ql_dbg_taskm, vha, 0x8003,
1199
		    "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1200
	} else {
1201
		ql_dbg(ql_dbg_taskm, vha, 0x8004,
1202
		    "Abort command mbx success cmd=%p.\n", cmd);
1203 1204
		wait = 1;
	}
1205 1206

	spin_lock_irqsave(&ha->hardware_lock, flags);
1207
	sp->done(ha, sp, 0);
1208
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
1209

1210 1211 1212 1213
	/* Did the command return during mailbox execution? */
	if (ret == FAILED && !CMD_SP(cmd))
		ret = SUCCESS;

已提交
1214
	/* Wait for the command to be returned. */
1215
	if (wait) {
1216
		if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1217
			ql_log(ql_log_warn, vha, 0x8006,
1218
			    "Abort handler timed out cmd=%p.\n", cmd);
1219
			ret = FAILED;
已提交
1220
		}
L
Linus Torvalds 已提交
1221 1222
	}

1223
	ql_log(ql_log_info, vha, 0x801c,
H
Hannes Reinecke 已提交
1224
	    "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1225
	    vha->host_no, id, lun, wait, ret);
L
Linus Torvalds 已提交
1226

已提交
1227 1228
	return ret;
}
L
Linus Torvalds 已提交
1229

1230
int
1231
qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
H
Hannes Reinecke 已提交
1232
	uint64_t l, enum nexus_wait_type type)
已提交
1233
{
1234
	int cnt, match, status;
1235
	unsigned long flags;
1236
	struct qla_hw_data *ha = vha->hw;
1237
	struct req_que *req;
1238
	srb_t *sp;
1239
	struct scsi_cmnd *cmd;
L
Linus Torvalds 已提交
1240

1241
	status = QLA_SUCCESS;
1242

1243
	spin_lock_irqsave(&ha->hardware_lock, flags);
1244
	req = vha->req;
1245
	for (cnt = 1; status == QLA_SUCCESS &&
1246
		cnt < req->num_outstanding_cmds; cnt++) {
1247 1248
		sp = req->outstanding_cmds[cnt];
		if (!sp)
1249
			continue;
1250
		if (sp->type != SRB_SCSI_CMD)
1251
			continue;
1252 1253 1254
		if (vha->vp_idx != sp->fcport->vha->vp_idx)
			continue;
		match = 0;
1255
		cmd = GET_CMD_SP(sp);
1256 1257 1258 1259 1260
		switch (type) {
		case WAIT_HOST:
			match = 1;
			break;
		case WAIT_TARGET:
1261
			match = cmd->device->id == t;
1262 1263
			break;
		case WAIT_LUN:
1264 1265
			match = (cmd->device->id == t &&
				cmd->device->lun == l);
1266
			break;
1267
		}
1268 1269 1270 1271
		if (!match)
			continue;

		spin_unlock_irqrestore(&ha->hardware_lock, flags);
1272
		status = qla2x00_eh_wait_on_command(cmd);
1273
		spin_lock_irqsave(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
1274
	}
1275
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
1276 1277

	return status;
L
Linus Torvalds 已提交
1278 1279
}

1280 1281 1282 1283 1284 1285
static char *reset_errors[] = {
	"HBA not online",
	"HBA not ready",
	"Task management failed",
	"Waiting for command completions",
};
L
Linus Torvalds 已提交
1286

1287
static int
1288
__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
H
Hannes Reinecke 已提交
1289
    struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
L
Linus Torvalds 已提交
1290
{
1291
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1292
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1293
	int err;
L
Linus Torvalds 已提交
1294

1295
	if (!fcport) {
1296
		return FAILED;
1297
	}
L
Linus Torvalds 已提交
1298

1299 1300 1301 1302
	err = fc_block_scsi_eh(cmd);
	if (err != 0)
		return err;

1303
	ql_log(ql_log_info, vha, 0x8009,
H
Hannes Reinecke 已提交
1304
	    "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1305
	    cmd->device->id, cmd->device->lun, cmd);
L
Linus Torvalds 已提交
1306

1307
	err = 0;
1308 1309 1310
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800a,
		    "Wait for hba online failed for cmd=%p.\n", cmd);
1311
		goto eh_reset_failed;
1312
	}
1313
	err = 2;
1314
	if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1315 1316 1317
		!= QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800c,
		    "do_reset failed for cmd=%p.\n", cmd);
1318
		goto eh_reset_failed;
1319
	}
1320
	err = 3;
1321
	if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1322 1323
	    cmd->device->lun, type) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800d,
1324
		    "wait for pending cmds failed for cmd=%p.\n", cmd);
1325
		goto eh_reset_failed;
1326
	}
1327

1328
	ql_log(ql_log_info, vha, 0x800e,
H
Hannes Reinecke 已提交
1329
	    "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1330
	    vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1331 1332 1333

	return SUCCESS;

1334
eh_reset_failed:
1335
	ql_log(ql_log_info, vha, 0x800f,
H
Hannes Reinecke 已提交
1336
	    "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1337 1338
	    reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
	    cmd);
1339 1340
	return FAILED;
}
L
Linus Torvalds 已提交
1341

1342 1343 1344
static int
qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
{
1345 1346
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1347

1348 1349 1350 1351 1352 1353
	if (qla2x00_isp_reg_stat(ha)) {
		ql_log(ql_log_info, vha, 0x803e,
		    "PCI/Register disconnect, exiting.\n");
		return FAILED;
	}

1354 1355
	return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
	    ha->isp_ops->lun_reset);
L
Linus Torvalds 已提交
1356 1357 1358
}

static int
1359
qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
1360
{
1361 1362
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1363

1364 1365 1366 1367 1368 1369
	if (qla2x00_isp_reg_stat(ha)) {
		ql_log(ql_log_info, vha, 0x803f,
		    "PCI/Register disconnect, exiting.\n");
		return FAILED;
	}

1370 1371
	return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
	    ha->isp_ops->target_reset);
L
Linus Torvalds 已提交
1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388
}

/**************************************************************************
* qla2xxx_eh_bus_reset
*
* Description:
*    The bus reset function will reset the bus and abort any executing
*    commands.
*
* Input:
*    cmd = Linux SCSI command packet of the command that cause the
*          bus reset.
*
* Returns:
*    SUCCESS/FAILURE (defined as macro in scsi.h).
*
**************************************************************************/
1389
static int
L
Linus Torvalds 已提交
1390 1391
qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
{
1392
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1393
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1394
	int ret = FAILED;
H
Hannes Reinecke 已提交
1395 1396
	unsigned int id;
	uint64_t lun;
1397 1398 1399 1400 1401 1402 1403
	struct qla_hw_data *ha = vha->hw;

	if (qla2x00_isp_reg_stat(ha)) {
		ql_log(ql_log_info, vha, 0x8040,
		    "PCI/Register disconnect, exiting.\n");
		return FAILED;
	}
已提交
1404 1405 1406

	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
1407

1408
	if (!fcport) {
已提交
1409
		return ret;
1410
	}
L
Linus Torvalds 已提交
1411

1412 1413 1414 1415 1416
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = FAILED;

1417
	ql_log(ql_log_info, vha, 0x8012,
H
Hannes Reinecke 已提交
1418
	    "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1419

1420
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1421 1422
		ql_log(ql_log_fatal, vha, 0x8013,
		    "Wait for hba online failed board disabled.\n");
已提交
1423
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1424 1425
	}

1426 1427 1428
	if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
		ret = SUCCESS;

已提交
1429 1430
	if (ret == FAILED)
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1431

1432
	/* Flush outstanding commands. */
1433
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1434 1435 1436
	    QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x8014,
		    "Wait for pending commands failed.\n");
1437
		ret = FAILED;
1438
	}
L
Linus Torvalds 已提交
1439

已提交
1440
eh_bus_reset_done:
1441
	ql_log(ql_log_warn, vha, 0x802b,
H
Hannes Reinecke 已提交
1442
	    "BUS RESET %s nexus=%ld:%d:%llu.\n",
1443
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1444

已提交
1445
	return ret;
L
Linus Torvalds 已提交
1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462
}

/**************************************************************************
* qla2xxx_eh_host_reset
*
* Description:
*    The reset function will reset the Adapter.
*
* Input:
*      cmd = Linux SCSI command packet of the command that cause the
*            adapter reset.
*
* Returns:
*      Either SUCCESS or FAILED.
*
* Note:
**************************************************************************/
1463
static int
L
Linus Torvalds 已提交
1464 1465
qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
{
1466 1467
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
1468
	int ret = FAILED;
H
Hannes Reinecke 已提交
1469 1470
	unsigned int id;
	uint64_t lun;
1471
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
1472

1473 1474 1475 1476 1477 1478 1479
	if (qla2x00_isp_reg_stat(ha)) {
		ql_log(ql_log_info, vha, 0x8041,
		    "PCI/Register disconnect, exiting.\n");
		schedule_work(&ha->board_disable);
		return SUCCESS;
	}

已提交
1480 1481 1482
	id = cmd->device->id;
	lun = cmd->device->lun;

1483
	ql_log(ql_log_info, vha, 0x8018,
H
Hannes Reinecke 已提交
1484
	    "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1485

1486 1487 1488 1489 1490
	/*
	 * No point in issuing another reset if one is active.  Also do not
	 * attempt a reset if we are updating flash.
	 */
	if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
已提交
1491
		goto eh_host_reset_lock;
L
Linus Torvalds 已提交
1492

1493 1494
	if (vha != base_vha) {
		if (qla2x00_vp_abort_isp(vha))
已提交
1495
			goto eh_host_reset_lock;
1496
	} else {
1497
		if (IS_P3P_TYPE(vha->hw)) {
1498 1499 1500 1501 1502 1503 1504
			if (!qla82xx_fcoe_ctx_reset(vha)) {
				/* Ctx reset success */
				ret = SUCCESS;
				goto eh_host_reset_lock;
			}
			/* fall thru if ctx reset failed */
		}
1505 1506 1507
		if (ha->wq)
			flush_workqueue(ha->wq);

1508
		set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1509
		if (ha->isp_ops->abort_isp(base_vha)) {
1510 1511 1512 1513
			clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
			/* failed. schedule dpc to try */
			set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);

1514 1515 1516
			if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
				ql_log(ql_log_warn, vha, 0x802a,
				    "wait for hba online failed.\n");
1517
				goto eh_host_reset_lock;
1518
			}
1519 1520
		}
		clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
A
Andrew Vasquez 已提交
1521
	}
L
Linus Torvalds 已提交
1522

1523
	/* Waiting for command to be returned to OS.*/
1524
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1525
		QLA_SUCCESS)
已提交
1526
		ret = SUCCESS;
L
Linus Torvalds 已提交
1527

已提交
1528
eh_host_reset_lock:
1529
	ql_log(ql_log_info, vha, 0x8017,
H
Hannes Reinecke 已提交
1530
	    "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1531
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1532

已提交
1533 1534
	return ret;
}
L
Linus Torvalds 已提交
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545

/*
* qla2x00_loop_reset
*      Issue loop reset.
*
* Input:
*      ha = adapter block pointer.
*
* Returns:
*      0 = success
*/
1546
int
1547
qla2x00_loop_reset(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
1548
{
1549
	int ret;
1550
	struct fc_port *fcport;
1551
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1552

1553 1554 1555 1556
	if (IS_QLAFX00(ha)) {
		return qlafx00_loop_reset(vha);
	}

1557
	if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1558 1559 1560 1561 1562 1563
		list_for_each_entry(fcport, &vha->vp_fcports, list) {
			if (fcport->port_type != FCT_TARGET)
				continue;

			ret = ha->isp_ops->target_reset(fcport, 0, 0);
			if (ret != QLA_SUCCESS) {
1564
				ql_dbg(ql_dbg_taskm, vha, 0x802c,
1565
				    "Bus Reset failed: Reset=%d "
1566
				    "d_id=%x.\n", ret, fcport->d_id.b24);
1567 1568 1569 1570
			}
		}
	}

1571

1572
	if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1573 1574 1575
		atomic_set(&vha->loop_state, LOOP_DOWN);
		atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
		qla2x00_mark_all_devices_lost(vha, 0);
1576
		ret = qla2x00_full_login_lip(vha);
1577
		if (ret != QLA_SUCCESS) {
1578 1579
			ql_dbg(ql_dbg_taskm, vha, 0x802d,
			    "full_login_lip=%d.\n", ret);
1580
		}
1581 1582
	}

1583
	if (ha->flags.enable_lip_reset) {
1584
		ret = qla2x00_lip_reset(vha);
1585
		if (ret != QLA_SUCCESS)
1586 1587
			ql_dbg(ql_dbg_taskm, vha, 0x802e,
			    "lip_reset failed (%d).\n", ret);
L
Linus Torvalds 已提交
1588 1589 1590
	}

	/* Issue marker command only when we are going to start the I/O */
1591
	vha->marker_needed = 1;
L
Linus Torvalds 已提交
1592

1593
	return QLA_SUCCESS;
L
Linus Torvalds 已提交
1594 1595
}

1596
void
1597
qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1598
{
1599
	int que, cnt;
1600 1601
	unsigned long flags;
	srb_t *sp;
1602
	struct qla_hw_data *ha = vha->hw;
1603
	struct req_que *req;
1604

1605 1606
	qlt_host_reset_handler(ha);

1607
	spin_lock_irqsave(&ha->hardware_lock, flags);
1608
	for (que = 0; que < ha->max_req_queues; que++) {
1609
		req = ha->req_q_map[que];
1610 1611
		if (!req)
			continue;
1612 1613 1614
		if (!req->outstanding_cmds)
			continue;
		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1615
			sp = req->outstanding_cmds[cnt];
1616
			if (sp) {
1617 1618
				/* Don't abort commands in adapter during EEH
				 * recovery as it's not accessible/responding.
1619
				 */
1620
				if (GET_CMD_SP(sp) && !ha->flags.eeh_busy) {
1621 1622 1623 1624 1625 1626 1627 1628 1629 1630
					/* Get a reference to the sp and drop the lock.
					 * The reference ensures this sp->done() call
					 * - and not the call in qla2xxx_eh_abort() -
					 * ends the SCSI command (with result 'res').
					 */
					sp_get(sp);
					spin_unlock_irqrestore(&ha->hardware_lock, flags);
					qla2xxx_eh_abort(GET_CMD_SP(sp));
					spin_lock_irqsave(&ha->hardware_lock, flags);
				}
1631
				req->outstanding_cmds[cnt] = NULL;
1632
				sp->done(vha, sp, res);
1633
			}
1634 1635 1636 1637 1638
		}
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

已提交
1639 1640
static int
qla2xxx_slave_alloc(struct scsi_device *sdev)
L
Linus Torvalds 已提交
1641
{
1642
	struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
L
Linus Torvalds 已提交
1643

1644
	if (!rport || fc_remote_port_chkready(rport))
已提交
1645
		return -ENXIO;
1646

1647
	sdev->hostdata = *(fc_port_t **)rport->dd_data;
L
Linus Torvalds 已提交
1648

已提交
1649 1650
	return 0;
}
L
Linus Torvalds 已提交
1651

已提交
1652 1653 1654
static int
qla2xxx_slave_configure(struct scsi_device *sdev)
{
1655
	scsi_qla_host_t *vha = shost_priv(sdev->host);
1656
	struct req_que *req = vha->req;
已提交
1657

1658 1659 1660
	if (IS_T10_PI_CAPABLE(vha->hw))
		blk_queue_update_dma_alignment(sdev->request_queue, 0x7);

1661
	scsi_change_queue_depth(sdev, req->max_q_depth);
已提交
1662 1663
	return 0;
}
L
Linus Torvalds 已提交
1664

已提交
1665 1666 1667 1668
static void
qla2xxx_slave_destroy(struct scsi_device *sdev)
{
	sdev->hostdata = NULL;
L
Linus Torvalds 已提交
1669 1670 1671 1672 1673 1674 1675 1676 1677 1678
}

/**
 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
 * @ha: HA context
 *
 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
 * supported addressing method.
 */
static void
1679
qla2x00_config_dma_addressing(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
1680
{
1681
	/* Assume a 32bit DMA mask. */
L
Linus Torvalds 已提交
1682 1683
	ha->flags.enable_64bit_addressing = 0;

1684
	if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1685 1686
		/* Any upper-dword bits set? */
		if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1687
		    !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1688
			/* Ok, a 64bit DMA mask is applicable. */
L
Linus Torvalds 已提交
1689
			ha->flags.enable_64bit_addressing = 1;
1690 1691
			ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
			ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1692
			return;
L
Linus Torvalds 已提交
1693 1694
		}
	}
1695

1696 1697
	dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
	pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
L
Linus Torvalds 已提交
1698 1699
}

1700
static void
1701
qla2x00_enable_intrs(struct qla_hw_data *ha)
1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	/* enable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

}

static void
1716
qla2x00_disable_intrs(struct qla_hw_data *ha)
1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	/* disable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, 0);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1730
qla24xx_enable_intrs(struct qla_hw_data *ha)
1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1743
qla24xx_disable_intrs(struct qla_hw_data *ha)
1744 1745 1746 1747
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

1748 1749
	if (IS_NOPOLLING_TYPE(ha))
		return;
1750 1751 1752 1753 1754 1755 1756
	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	WRT_REG_DWORD(&reg->ictrl, 0);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817
static int
qla2x00_iospace_config(struct qla_hw_data *ha)
{
	resource_size_t pio;
	uint16_t msix;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (!(ha->bars & 1))
		goto skip_pio;

	/* We only need PIO for Flash operations on ISP2312 v2 chips. */
	pio = pci_resource_start(ha->pdev, 0);
	if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
		if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
			ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
			    "Invalid pci I/O region size (%s).\n",
			    pci_name(ha->pdev));
			pio = 0;
		}
	} else {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
		    "Region #0 no a PIO resource (%s).\n",
		    pci_name(ha->pdev));
		pio = 0;
	}
	ha->pio_address = pio;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
	    "PIO address=%llu.\n",
	    (unsigned long long)ha->pio_address);

skip_pio:
	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
		    "Region #1 not an MMIO resource (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
		    "Invalid PCI mem region size (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* Determine queue resources */
	ha->max_req_queues = ha->max_rsp_queues = 1;
1818
	ha->msix_count = QLA_BASE_VECTORS;
1819
	if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1820 1821 1822 1823 1824 1825 1826 1827 1828
		goto mqiobase_exit;

	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
			pci_resource_len(ha->pdev, 3));
	if (ha->mqiobase) {
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
		    "MQIO Base=%p.\n", ha->mqiobase);
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1829
		ha->msix_count = msix + 1;
1830
		/* Max queues are bounded by available msix vectors */
1831 1832 1833 1834 1835 1836 1837 1838
		/* MB interrupt uses 1 vector */
		ha->max_req_queues = ha->msix_count - 1;
		ha->max_rsp_queues = ha->max_req_queues;
		/* Queue pairs is the max value minus the base queue pair */
		ha->max_qpairs = ha->max_rsp_queues - 1;
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
		    "Max no of queues pairs: %d.\n", ha->max_qpairs);

1839
		ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1840
		    "MSI-X vector count: %d.\n", ha->msix_count);
1841 1842 1843 1844 1845 1846
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x001b,
		    "BAR 3 not enabled.\n");

mqiobase_exit:
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1847
	    "MSIX Count: %d.\n", ha->msix_count);
1848 1849 1850 1851 1852 1853 1854
	return (0);

iospace_error_exit:
	return (-ENOMEM);
}


1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894
static int
qla83xx_iospace_config(struct qla_hw_data *ha)
{
	uint16_t msix;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));

		goto iospace_error_exit;
	}

	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
		    "Invalid pci I/O region size (%s).\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
		    "Invalid PCI mem region size (%s), aborting\n",
			pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* 64bit PCI BAR - BAR2 will correspoond to region 4 */
	/* 83XX 26XX always use MQ type access for queues
	 * - mbar 2, a.k.a region 4 */
	ha->max_req_queues = ha->max_rsp_queues = 1;
1895
	ha->msix_count = QLA_BASE_VECTORS;
1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910
	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
			pci_resource_len(ha->pdev, 4));

	if (!ha->mqiobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
		    "BAR2/region4 not enabled\n");
		goto mqiobase_exit;
	}

	ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
			pci_resource_len(ha->pdev, 2));
	if (ha->msixbase) {
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev,
		    QLA_83XX_PCI_MSIX_CONTROL, &msix);
1911
		ha->msix_count = msix + 1;
1912 1913 1914 1915
		/*
		 * By default, driver uses at least two msix vectors
		 * (default & rspq)
		 */
1916 1917 1918
		if (ql2xmqsupport) {
			/* MB interrupt uses 1 vector */
			ha->max_req_queues = ha->msix_count - 1;
1919 1920 1921 1922 1923

			/* ATIOQ needs 1 vector. That's 1 less QPair */
			if (QLA_TGT_MODE_ENABLED())
				ha->max_req_queues--;

1924 1925
			ha->max_rsp_queues = ha->max_req_queues;

1926 1927 1928 1929 1930
			/* Queue pairs is the max value minus
			 * the base queue pair */
			ha->max_qpairs = ha->max_req_queues - 1;
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
			    "Max no of queues pairs: %d.\n", ha->max_qpairs);
1931 1932
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1933
		    "MSI-X vector count: %d.\n", ha->msix_count);
1934 1935 1936 1937 1938 1939
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x011e,
		    "BAR 1 not enabled.\n");

mqiobase_exit:
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1940
	    "MSIX Count: %d.\n", ha->msix_count);
1941 1942 1943 1944 1945 1946
	return 0;

iospace_error_exit:
	return -ENOMEM;
}

1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961
static struct isp_operations qla2100_isp_ops = {
	.pci_config		= qla2100_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2100_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1962 1963
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2100_fw_dump,
	.beacon_on		= NULL,
	.beacon_off		= NULL,
	.beacon_blink		= NULL,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1979
	.start_scsi		= qla2x00_start_scsi,
1980
	.start_scsi_mq          = NULL,
1981
	.abort_isp		= qla2x00_abort_isp,
1982
	.iospace_config     	= qla2x00_iospace_config,
1983
	.initialize_adapter	= qla2x00_initialize_adapter,
1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000
};

static struct isp_operations qla2300_isp_ops = {
	.pci_config		= qla2300_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2300_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
2001 2002
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2300_fw_dump,
	.beacon_on		= qla2x00_beacon_on,
	.beacon_off		= qla2x00_beacon_off,
	.beacon_blink		= qla2x00_beacon_blink,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
2018
	.start_scsi		= qla2x00_start_scsi,
2019
	.start_scsi_mq          = NULL,
2020
	.abort_isp		= qla2x00_abort_isp,
2021
	.iospace_config		= qla2x00_iospace_config,
2022
	.initialize_adapter	= qla2x00_initialize_adapter,
2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039
};

static struct isp_operations qla24xx_isp_ops = {
	.pci_config		= qla24xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
2040 2041
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
2057
	.start_scsi		= qla24xx_start_scsi,
2058
	.start_scsi_mq          = NULL,
2059
	.abort_isp		= qla2x00_abort_isp,
2060
	.iospace_config		= qla2x00_iospace_config,
2061
	.initialize_adapter	= qla2x00_initialize_adapter,
2062 2063
};

2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078
static struct isp_operations qla25xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
2079 2080
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla25xx_read_nvram_data,
	.write_nvram		= qla25xx_write_nvram_data,
	.fw_dump		= qla25xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
2093
	.read_optrom		= qla25xx_read_optrom_data,
2094 2095
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
2096
	.start_scsi		= qla24xx_dif_start_scsi,
2097
	.start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2098
	.abort_isp		= qla2x00_abort_isp,
2099
	.iospace_config		= qla2x00_iospace_config,
2100
	.initialize_adapter	= qla2x00_initialize_adapter,
2101 2102
};

2103 2104 2105 2106 2107 2108 2109 2110
static struct isp_operations qla81xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
2111
	.load_risc		= qla81xx_load_risc,
2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
2126 2127
	.read_nvram		= NULL,
	.write_nvram		= NULL,
2128 2129 2130
	.fw_dump		= qla81xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
2131
	.beacon_blink		= qla83xx_beacon_blink,
2132 2133 2134
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
2135
	.start_scsi		= qla24xx_dif_start_scsi,
2136
	.start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2137
	.abort_isp		= qla2x00_abort_isp,
2138
	.iospace_config		= qla2x00_iospace_config,
2139
	.initialize_adapter	= qla2x00_initialize_adapter,
2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150
};

static struct isp_operations qla82xx_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
2151
	.pci_info_str		= qla24xx_pci_info_str,
2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla82xx_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
2167
	.fw_dump		= qla82xx_fw_dump,
2168 2169 2170
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
2171 2172
	.read_optrom		= qla82xx_read_optrom_data,
	.write_optrom		= qla82xx_write_optrom_data,
2173
	.get_flash_version	= qla82xx_get_flash_version,
2174
	.start_scsi             = qla82xx_start_scsi,
2175
	.start_scsi_mq          = NULL,
2176
	.abort_isp		= qla82xx_abort_isp,
2177
	.iospace_config     	= qla82xx_iospace_config,
2178
	.initialize_adapter	= qla2x00_initialize_adapter,
2179 2180
};

2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205
static struct isp_operations qla8044_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla8044_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
2206
	.fw_dump		= qla8044_fw_dump,
2207 2208 2209
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
2210
	.read_optrom		= qla8044_read_optrom_data,
2211 2212 2213
	.write_optrom		= qla8044_write_optrom_data,
	.get_flash_version	= qla82xx_get_flash_version,
	.start_scsi             = qla82xx_start_scsi,
2214
	.start_scsi_mq          = NULL,
2215 2216 2217 2218 2219
	.abort_isp		= qla8044_abort_isp,
	.iospace_config		= qla82xx_iospace_config,
	.initialize_adapter	= qla2x00_initialize_adapter,
};

2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252
static struct isp_operations qla83xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla83xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
2253
	.start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2254 2255
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272
	.initialize_adapter	= qla2x00_initialize_adapter,
};

static struct isp_operations qlafx00_isp_ops = {
	.pci_config		= qlafx00_pci_config,
	.reset_chip		= qlafx00_soft_reset,
	.chip_diag		= qlafx00_chip_diag,
	.config_rings		= qlafx00_config_rings,
	.reset_adapter		= qlafx00_soft_reset,
	.nvram_config		= NULL,
	.update_fw_options	= NULL,
	.load_risc		= NULL,
	.pci_info_str		= qlafx00_pci_info_str,
	.fw_version_str		= qlafx00_fw_version_str,
	.intr_handler		= qlafx00_intr_handler,
	.enable_intrs		= qlafx00_enable_intrs,
	.disable_intrs		= qlafx00_disable_intrs,
2273
	.abort_command		= qla24xx_async_abort_command,
2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291
	.target_reset		= qlafx00_abort_target,
	.lun_reset		= qlafx00_lun_reset,
	.fabric_login		= NULL,
	.fabric_logout		= NULL,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= NULL,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= NULL,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qlafx00_start_scsi,
2292
	.start_scsi_mq          = NULL,
2293 2294 2295
	.abort_isp		= qlafx00_abort_isp,
	.iospace_config		= qlafx00_iospace_config,
	.initialize_adapter	= qlafx00_initialize_adapter,
2296 2297
};

2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330
static struct isp_operations qla27xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla27xx_fwdump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
2331
	.start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2332 2333 2334 2335 2336
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
	.initialize_adapter	= qla2x00_initialize_adapter,
};

2337
static inline void
2338
qla2x00_set_isp_flags(struct qla_hw_data *ha)
2339 2340 2341 2342
{
	ha->device_type = DT_EXTENDED_IDS;
	switch (ha->pdev->device) {
	case PCI_DEVICE_ID_QLOGIC_ISP2100:
2343
		ha->isp_type |= DT_ISP2100;
2344
		ha->device_type &= ~DT_EXTENDED_IDS;
2345
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2346 2347
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2200:
2348
		ha->isp_type |= DT_ISP2200;
2349
		ha->device_type &= ~DT_EXTENDED_IDS;
2350
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2351 2352
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2300:
2353
		ha->isp_type |= DT_ISP2300;
2354
		ha->device_type |= DT_ZIO_SUPPORTED;
2355
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2356 2357
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2312:
2358
		ha->isp_type |= DT_ISP2312;
2359
		ha->device_type |= DT_ZIO_SUPPORTED;
2360
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2361 2362
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2322:
2363
		ha->isp_type |= DT_ISP2322;
2364
		ha->device_type |= DT_ZIO_SUPPORTED;
2365 2366 2367
		if (ha->pdev->subsystem_vendor == 0x1028 &&
		    ha->pdev->subsystem_device == 0x0170)
			ha->device_type |= DT_OEM_001;
2368
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2369 2370
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6312:
2371
		ha->isp_type |= DT_ISP6312;
2372
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2373 2374
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6322:
2375
		ha->isp_type |= DT_ISP6322;
2376
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2377 2378
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2422:
2379
		ha->isp_type |= DT_ISP2422;
2380
		ha->device_type |= DT_ZIO_SUPPORTED;
2381
		ha->device_type |= DT_FWI2;
2382
		ha->device_type |= DT_IIDMA;
2383
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2384 2385
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2432:
2386
		ha->isp_type |= DT_ISP2432;
2387
		ha->device_type |= DT_ZIO_SUPPORTED;
2388
		ha->device_type |= DT_FWI2;
2389
		ha->device_type |= DT_IIDMA;
2390
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2391
		break;
2392
	case PCI_DEVICE_ID_QLOGIC_ISP8432:
2393
		ha->isp_type |= DT_ISP8432;
2394 2395 2396 2397 2398
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2399
	case PCI_DEVICE_ID_QLOGIC_ISP5422:
2400
		ha->isp_type |= DT_ISP5422;
2401
		ha->device_type |= DT_FWI2;
2402
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2403
		break;
2404
	case PCI_DEVICE_ID_QLOGIC_ISP5432:
2405
		ha->isp_type |= DT_ISP5432;
2406
		ha->device_type |= DT_FWI2;
2407
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2408
		break;
2409
	case PCI_DEVICE_ID_QLOGIC_ISP2532:
2410
		ha->isp_type |= DT_ISP2532;
2411 2412 2413
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2414
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2415
		break;
2416
	case PCI_DEVICE_ID_QLOGIC_ISP8001:
2417
		ha->isp_type |= DT_ISP8001;
2418 2419 2420 2421 2422
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2423
	case PCI_DEVICE_ID_QLOGIC_ISP8021:
2424
		ha->isp_type |= DT_ISP8021;
2425 2426 2427 2428 2429 2430
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2431
	 case PCI_DEVICE_ID_QLOGIC_ISP8044:
2432
		ha->isp_type |= DT_ISP8044;
2433 2434 2435 2436 2437 2438
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2439
	case PCI_DEVICE_ID_QLOGIC_ISP2031:
2440
		ha->isp_type |= DT_ISP2031;
2441 2442 2443 2444 2445 2446 2447
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP8031:
2448
		ha->isp_type |= DT_ISP8031;
2449 2450 2451 2452 2453 2454
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2455
	case PCI_DEVICE_ID_QLOGIC_ISPF001:
2456
		ha->isp_type |= DT_ISPFX00;
2457
		break;
2458
	case PCI_DEVICE_ID_QLOGIC_ISP2071:
2459
		ha->isp_type |= DT_ISP2071;
2460 2461 2462
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2463
		ha->device_type |= DT_T10_PI;
2464 2465
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2466
	case PCI_DEVICE_ID_QLOGIC_ISP2271:
2467
		ha->isp_type |= DT_ISP2271;
2468 2469 2470
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2471
		ha->device_type |= DT_T10_PI;
2472 2473
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2474
	case PCI_DEVICE_ID_QLOGIC_ISP2261:
2475
		ha->isp_type |= DT_ISP2261;
2476 2477 2478
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2479
		ha->device_type |= DT_T10_PI;
2480 2481
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2482
	}
2483

2484
	if (IS_QLA82XX(ha))
2485
		ha->port_no = ha->portnum & 1;
2486
	else {
2487 2488
		/* Get adapter physical port no from interrupt pin register. */
		pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2489 2490 2491 2492 2493
		if (IS_QLA27XX(ha))
			ha->port_no--;
		else
			ha->port_no = !(ha->port_no & 1);
	}
2494

2495
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2496
	    "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2497
	    ha->device_type, ha->port_no, ha->fw_srisc_address);
2498 2499
}

2500 2501 2502
static void
qla2xxx_scan_start(struct Scsi_Host *shost)
{
2503
	scsi_qla_host_t *vha = shost_priv(shost);
2504

2505 2506 2507
	if (vha->hw->flags.running_gold_fw)
		return;

2508 2509 2510 2511
	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	set_bit(RSCN_UPDATE, &vha->dpc_flags);
	set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2512 2513 2514 2515 2516
}

static int
qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
{
2517
	scsi_qla_host_t *vha = shost_priv(shost);
2518

2519 2520
	if (test_bit(UNLOADING, &vha->dpc_flags))
		return 1;
2521
	if (!vha->host)
2522
		return 1;
2523
	if (time > vha->hw->loop_reset_delay * HZ)
2524 2525
		return 1;

2526
	return atomic_read(&vha->loop_state) == LOOP_READY;
2527 2528
}

L
Linus Torvalds 已提交
2529 2530 2531
/*
 * PCI driver interface
 */
2532
static int
2533
qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
L
Linus Torvalds 已提交
2534
{
2535
	int	ret = -ENODEV;
L
Linus Torvalds 已提交
2536
	struct Scsi_Host *host;
2537 2538
	scsi_qla_host_t *base_vha = NULL;
	struct qla_hw_data *ha;
2539
	char pci_info[30];
2540
	char fw_str[30], wq_name[30];
2541
	struct scsi_host_template *sht;
2542
	int bars, mem_only = 0;
2543
	uint16_t req_length = 0, rsp_length = 0;
2544 2545
	struct req_que *req = NULL;
	struct rsp_que *rsp = NULL;
2546
	int i;
2547

2548
	bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2549
	sht = &qla2xxx_driver_template;
2550
	if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2551
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2552
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2553
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2554
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2555
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2556
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2557 2558
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2559
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2560
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2561
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2562
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2563 2564
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2565
		bars = pci_select_bars(pdev, IORESOURCE_MEM);
2566
		mem_only = 1;
2567 2568
		ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
		    "Mem only adapter.\n");
2569
	}
2570 2571
	ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
	    "Bars=%d.\n", bars);
2572

2573 2574 2575 2576 2577 2578 2579
	if (mem_only) {
		if (pci_enable_device_mem(pdev))
			goto probe_out;
	} else {
		if (pci_enable_device(pdev))
			goto probe_out;
	}
2580

2581 2582
	/* This may fail but that's ok */
	pci_enable_pcie_error_reporting(pdev);
2583

2584 2585
	ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
	if (!ha) {
2586 2587
		ql_log_pci(ql_log_fatal, pdev, 0x0009,
		    "Unable to allocate memory for ha.\n");
2588
		goto probe_out;
L
Linus Torvalds 已提交
2589
	}
2590 2591
	ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
	    "Memory allocated for ha=%p.\n", ha);
2592
	ha->pdev = pdev;
2593
	ha->tgt.enable_class_2 = ql2xenableclass2;
2594 2595
	INIT_LIST_HEAD(&ha->tgt.q_full_list);
	spin_lock_init(&ha->tgt.q_full_lock);
2596
	spin_lock_init(&ha->tgt.sess_lock);
2597 2598
	spin_lock_init(&ha->tgt.atio_lock);

L
Linus Torvalds 已提交
2599 2600

	/* Clear our data area */
2601
	ha->bars = bars;
2602
	ha->mem_only = mem_only;
2603
	spin_lock_init(&ha->hardware_lock);
2604
	spin_lock_init(&ha->vport_slock);
2605
	mutex_init(&ha->selflogin_lock);
2606
	mutex_init(&ha->optrom_mutex);
L
Linus Torvalds 已提交
2607

2608 2609
	/* Set ISP-type information. */
	qla2x00_set_isp_flags(ha);
2610 2611

	/* Set EEH reset type to fundamental if required by hba */
2612
	if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2613
	    IS_QLA83XX(ha) || IS_QLA27XX(ha))
2614 2615
		pdev->needs_freset = 1;

2616 2617 2618 2619 2620
	ha->prev_topology = 0;
	ha->init_cb_size = sizeof(init_cb_t);
	ha->link_data_rate = PORT_SPEED_UNKNOWN;
	ha->optrom_size = OPTROM_SIZE_2300;

2621
	/* Assign ISP specific operations. */
L
Linus Torvalds 已提交
2622
	if (IS_QLA2100(ha)) {
2623
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2624
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2625 2626 2627
		req_length = REQUEST_ENTRY_CNT_2100;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2628
		ha->gid_list_info_size = 4;
2629 2630 2631 2632
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2633
		ha->isp_ops = &qla2100_isp_ops;
L
Linus Torvalds 已提交
2634
	} else if (IS_QLA2200(ha)) {
2635
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2636
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2637 2638 2639
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2640
		ha->gid_list_info_size = 4;
2641 2642 2643 2644
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2645
		ha->isp_ops = &qla2100_isp_ops;
2646
	} else if (IS_QLA23XX(ha)) {
2647
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2648
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2649 2650 2651
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2652
		ha->gid_list_info_size = 6;
2653 2654
		if (IS_QLA2322(ha) || IS_QLA6322(ha))
			ha->optrom_size = OPTROM_SIZE_2322;
2655 2656 2657 2658
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2659
		ha->isp_ops = &qla2300_isp_ops;
2660
	} else if (IS_QLA24XX_TYPE(ha)) {
2661
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2662
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2663 2664
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2665
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2666
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2667
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2668
		ha->gid_list_info_size = 8;
2669
		ha->optrom_size = OPTROM_SIZE_24XX;
2670
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2671
		ha->isp_ops = &qla24xx_isp_ops;
2672 2673 2674 2675
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2676
	} else if (IS_QLA25XX(ha)) {
2677
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2678
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2679 2680
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2681
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2682
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2683 2684 2685
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_25XX;
2686
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2687
		ha->isp_ops = &qla25xx_isp_ops;
2688 2689 2690 2691 2692
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
	} else if (IS_QLA81XX(ha)) {
2693
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2694 2695 2696
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2697
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2698 2699 2700 2701
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_81XX;
2702
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2703 2704 2705 2706 2707
		ha->isp_ops = &qla81xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2708
	} else if (IS_QLA82XX(ha)) {
2709
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2710 2711 2712 2713 2714 2715 2716
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_82XX;
2717
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2718 2719 2720 2721 2722
		ha->isp_ops = &qla82xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737
	} else if (IS_QLA8044(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla8044_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2738
	} else if (IS_QLA83XX(ha)) {
2739
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
2740
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2741
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2742
		req_length = REQUEST_ENTRY_CNT_83XX;
Q
Quinn Tran 已提交
2743
		rsp_length = RESPONSE_ENTRY_CNT_83XX;
2744
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2745 2746 2747 2748 2749 2750 2751 2752 2753 2754
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla83xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2755 2756 2757 2758 2759 2760 2761 2762 2763 2764
	}  else if (IS_QLAFX00(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
		ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
		ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
		req_length = REQUEST_ENTRY_CNT_FX00;
		rsp_length = RESPONSE_ENTRY_CNT_FX00;
		ha->isp_ops = &qlafx00_isp_ops;
		ha->port_down_retry_count = 30; /* default value */
		ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
		ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2765
		ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2766
		ha->mr.fw_hbt_en = 1;
2767 2768
		ha->mr.host_info_resend = false;
		ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2769 2770 2771 2772
	} else if (IS_QLA27XX(ha)) {
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
Q
Quinn Tran 已提交
2773 2774
		req_length = REQUEST_ENTRY_CNT_83XX;
		rsp_length = RESPONSE_ENTRY_CNT_83XX;
2775
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2776 2777 2778 2779 2780 2781 2782 2783 2784 2785
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla27xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
L
Linus Torvalds 已提交
2786
	}
2787

2788 2789 2790
	ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
	    "mbx_count=%d, req_length=%d, "
	    "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2791 2792
	    "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
	    "max_fibre_devices=%d.\n",
2793 2794
	    ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
	    ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2795
	    ha->nvram_npiv_size, ha->max_fibre_devices);
2796 2797 2798 2799 2800
	ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
	    "isp_ops=%p, flash_conf_off=%d, "
	    "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
	    ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
	    ha->nvram_conf_off, ha->nvram_data_off);
2801 2802 2803 2804

	/* Configure PCI I/O space */
	ret = ha->isp_ops->iospace_config(ha);
	if (ret)
2805
		goto iospace_config_failed;
2806 2807 2808 2809

	ql_log_pci(ql_log_info, pdev, 0x001d,
	    "Found an ISP%04X irq %d iobase 0x%p.\n",
	    pdev->device, pdev->irq, ha->iobase);
2810
	mutex_init(&ha->vport_lock);
2811
	mutex_init(&ha->mq_lock);
2812 2813 2814
	init_completion(&ha->mbx_cmd_comp);
	complete(&ha->mbx_cmd_comp);
	init_completion(&ha->mbx_intr_comp);
2815
	init_completion(&ha->dcbx_comp);
2816
	init_completion(&ha->lb_portup_comp);
L
Linus Torvalds 已提交
2817

2818
	set_bit(0, (unsigned long *) ha->vp_idx_map);
L
Linus Torvalds 已提交
2819

2820
	qla2x00_config_dma_addressing(ha);
2821 2822 2823 2824
	ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
	    "64 Bit addressing is %s.\n",
	    ha->flags.enable_64bit_addressing ? "enable" :
	    "disable");
2825
	ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2826
	if (ret) {
2827 2828
		ql_log_pci(ql_log_fatal, pdev, 0x0031,
		    "Failed to allocate memory for adapter, aborting.\n");
L
Linus Torvalds 已提交
2829

2830 2831 2832
		goto probe_hw_failed;
	}

2833
	req->max_q_depth = MAX_Q_DEPTH;
2834
	if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2835 2836
		req->max_q_depth = ql2xmaxqdepth;

2837 2838 2839

	base_vha = qla2x00_create_host(sht, ha);
	if (!base_vha) {
2840
		ret = -ENOMEM;
2841
		qla2x00_mem_free(ha);
2842 2843
		qla2x00_free_req_que(ha, req);
		qla2x00_free_rsp_que(ha, rsp);
2844
		goto probe_hw_failed;
L
Linus Torvalds 已提交
2845 2846
	}

2847
	pci_set_drvdata(pdev, base_vha);
2848
	set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2849 2850

	host = base_vha->host;
2851
	base_vha->req = req;
2852
	if (IS_QLA2XXX_MIDTYPE(ha))
2853
		base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2854
	else
2855 2856
		base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
						base_vha->vp_idx;
2857

2858 2859 2860 2861 2862 2863 2864 2865
	/* Setup fcport template structure. */
	ha->mr.fcport.vha = base_vha;
	ha->mr.fcport.port_type = FCT_UNKNOWN;
	ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
	qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
	ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
	ha->mr.fcport.scan_state = 1;

2866 2867 2868 2869 2870 2871 2872 2873
	/* Set the SG table size based on ISP type */
	if (!IS_FWI2_CAPABLE(ha)) {
		if (IS_QLA2100(ha))
			host->sg_tablesize = 32;
	} else {
		if (!IS_QLA82XX(ha))
			host->sg_tablesize = QLA_SG_ALL;
	}
2874
	host->max_id = ha->max_fibre_devices;
2875 2876
	host->cmd_per_lun = 3;
	host->unique_id = host->host_no;
2877
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2878 2879 2880
		host->max_cmd_len = 32;
	else
		host->max_cmd_len = MAX_CMDSZ;
2881
	host->max_channel = MAX_BUSES - 1;
2882 2883 2884 2885 2886 2887
	/* Older HBAs support only 16-bit LUNs */
	if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
	    ql2xmaxlun > 0xffff)
		host->max_lun = 0xffff;
	else
		host->max_lun = ql2xmaxlun;
2888
	host->transportt = qla2xxx_transport_template;
2889
	sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2890

2891 2892 2893
	ql_dbg(ql_dbg_init, base_vha, 0x0033,
	    "max_id=%d this_id=%d "
	    "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2894
	    "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2895 2896 2897 2898
	    host->this_id, host->cmd_per_lun, host->unique_id,
	    host->max_cmd_len, host->max_channel, host->max_lun,
	    host->transportt, sht->vendor_id);

2899 2900 2901 2902 2903
	/* Set up the irqs */
	ret = qla2x00_request_irqs(ha, rsp);
	if (ret)
		goto probe_init_failed;

2904 2905 2906 2907 2908 2909 2910 2911
	/* Alloc arrays of request and response ring ptrs */
	if (!qla2x00_alloc_queues(ha, req, rsp)) {
		ql_log(ql_log_fatal, base_vha, 0x003d,
		    "Failed to allocate memory for queue pointers..."
		    "aborting.\n");
		goto probe_init_failed;
	}

2912 2913 2914 2915 2916 2917 2918 2919 2920 2921
	if (ha->mqenable && shost_use_blk_mq(host)) {
		/* number of hardware queues supported by blk/scsi-mq*/
		host->nr_hw_queues = ha->max_qpairs;

		ql_dbg(ql_dbg_init, base_vha, 0x0192,
			"blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
	} else
		ql_dbg(ql_dbg_init, base_vha, 0x0193,
			"blk/scsi-mq disabled.\n");

2922
	qlt_probe_one_stage1(base_vha, ha);
2923

2924 2925
	pci_save_state(pdev);

2926
	/* Assign back pointers */
2927 2928
	rsp->req = req;
	req->rsp = rsp;
2929

2930 2931 2932 2933 2934 2935 2936
	if (IS_QLAFX00(ha)) {
		ha->rsp_q_map[0] = rsp;
		ha->req_q_map[0] = req;
		set_bit(0, ha->req_qid_map);
		set_bit(0, ha->rsp_qid_map);
	}

2937 2938 2939 2940 2941
	/* FWI2-capable only. */
	req->req_q_in = &ha->iobase->isp24.req_q_in;
	req->req_q_out = &ha->iobase->isp24.req_q_out;
	rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
	rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2942
	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2943 2944 2945 2946
		req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
		req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
		rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
		rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2947 2948
	}

2949 2950 2951 2952 2953 2954 2955
	if (IS_QLAFX00(ha)) {
		req->req_q_in = &ha->iobase->ispfx00.req_q_in;
		req->req_q_out = &ha->iobase->ispfx00.req_q_out;
		rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
		rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
	}

2956
	if (IS_P3P_TYPE(ha)) {
2957 2958 2959 2960 2961
		req->req_q_out = &ha->iobase->isp82.req_q_out[0];
		rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
		rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
	}

2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975
	ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
	    "req->req_q_in=%p req->req_q_out=%p "
	    "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out,
	    rsp->rsp_q_in, rsp->rsp_q_out);
	ql_dbg(ql_dbg_init, base_vha, 0x003e,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_init, base_vha, 0x003f,
	    "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
L
Linus Torvalds 已提交
2976

2977
	if (ha->isp_ops->initialize_adapter(base_vha)) {
2978 2979 2980
		ql_log(ql_log_fatal, base_vha, 0x00d6,
		    "Failed to initialize adapter - Adapter flags %x.\n",
		    base_vha->device_flags);
L
Linus Torvalds 已提交
2981

2982 2983 2984
		if (IS_QLA82XX(ha)) {
			qla82xx_idc_lock(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2985
				QLA8XXX_DEV_FAILED);
2986
			qla82xx_idc_unlock(ha);
2987 2988
			ql_log(ql_log_fatal, base_vha, 0x00d7,
			    "HW State: FAILED.\n");
2989 2990 2991 2992 2993 2994 2995 2996
		} else if (IS_QLA8044(ha)) {
			qla8044_idc_lock(ha);
			qla8044_wr_direct(base_vha,
				QLA8044_CRB_DEV_STATE_INDEX,
				QLA8XXX_DEV_FAILED);
			qla8044_idc_unlock(ha);
			ql_log(ql_log_fatal, base_vha, 0x0150,
			    "HW State: FAILED.\n");
2997 2998
		}

2999
		ret = -ENODEV;
L
Linus Torvalds 已提交
3000 3001 3002
		goto probe_failed;
	}

3003 3004 3005 3006 3007 3008 3009 3010 3011 3012
	if (IS_QLAFX00(ha))
		host->can_queue = QLAFX00_MAX_CANQUEUE;
	else
		host->can_queue = req->num_outstanding_cmds - 10;

	ql_dbg(ql_dbg_init, base_vha, 0x0032,
	    "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
	    host->can_queue, base_vha->req,
	    base_vha->mgmt_svr_loop_id, host->sg_tablesize);

3013
	if (ha->mqenable && qla_ini_mode_enabled(base_vha)) {
3014
		ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
3015 3016 3017 3018 3019 3020
		/* Create start of day qpairs for Block MQ */
		if (shost_use_blk_mq(host)) {
			for (i = 0; i < ha->max_qpairs; i++)
				qla2xxx_create_qpair(base_vha, 5, 0);
		}
	}
3021

3022 3023 3024
	if (ha->flags.running_gold_fw)
		goto skip_dpc;

L
Linus Torvalds 已提交
3025 3026 3027
	/*
	 * Startup the kernel thread for this host adapter
	 */
3028
	ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3029
	    "%s_dpc", base_vha->host_str);
3030
	if (IS_ERR(ha->dpc_thread)) {
3031 3032
		ql_log(ql_log_fatal, base_vha, 0x00ed,
		    "Failed to start DPC thread.\n");
3033
		ret = PTR_ERR(ha->dpc_thread);
L
Linus Torvalds 已提交
3034 3035
		goto probe_failed;
	}
3036 3037
	ql_dbg(ql_dbg_init, base_vha, 0x00ee,
	    "DPC thread started successfully.\n");
L
Linus Torvalds 已提交
3038

3039 3040 3041 3042 3043 3044 3045 3046
	/*
	 * If we're not coming up in initiator mode, we might sit for
	 * a while without waking up the dpc thread, which leads to a
	 * stuck process warning.  So just kick the dpc once here and
	 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
	 */
	qla2xxx_wake_dpc(base_vha);

3047 3048
	INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);

3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062
	if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
		sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
		ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);

		sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
		ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
		INIT_WORK(&ha->idc_state_handler,
		    qla83xx_idc_state_handler_work);
		INIT_WORK(&ha->nic_core_unrecoverable,
		    qla83xx_nic_core_unrecoverable_work);
	}

3063
skip_dpc:
3064 3065
	list_add_tail(&base_vha->list, &ha->vp_list);
	base_vha->host->irq = ha->pdev->irq;
L
Linus Torvalds 已提交
3066 3067

	/* Initialized the timer */
3068
	qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3069 3070 3071 3072 3073 3074
	ql_dbg(ql_dbg_init, base_vha, 0x00ef,
	    "Started qla2x00_timer with "
	    "interval=%d.\n", WATCH_INTERVAL);
	ql_dbg(ql_dbg_init, base_vha, 0x00f0,
	    "Detected hba at address=%p.\n",
	    ha);
3075

3076
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3077
		if (ha->fw_attributes & BIT_4) {
3078
			int prot = 0, guard;
3079
			base_vha->flags.difdix_supported = 1;
3080 3081
			ql_dbg(ql_dbg_init, base_vha, 0x00f1,
			    "Registering for DIF/DIX type 1 and 3 protection.\n");
3082 3083
			if (ql2xenabledif == 1)
				prot = SHOST_DIX_TYPE0_PROTECTION;
3084
			scsi_host_set_prot(host,
3085
			    prot | SHOST_DIF_TYPE1_PROTECTION
3086
			    | SHOST_DIF_TYPE2_PROTECTION
3087 3088
			    | SHOST_DIF_TYPE3_PROTECTION
			    | SHOST_DIX_TYPE1_PROTECTION
3089
			    | SHOST_DIX_TYPE2_PROTECTION
3090
			    | SHOST_DIX_TYPE3_PROTECTION);
3091 3092 3093 3094 3095 3096 3097 3098

			guard = SHOST_DIX_GUARD_CRC;

			if (IS_PI_IPGUARD_CAPABLE(ha) &&
			    (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
				guard |= SHOST_DIX_GUARD_IP;

			scsi_host_set_guard(host, guard);
3099 3100 3101 3102
		} else
			base_vha->flags.difdix_supported = 0;
	}

3103 3104
	ha->isp_ops->enable_intrs(ha);

3105 3106 3107 3108 3109 3110 3111
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
		host->sg_tablesize = (ha->mr.extended_io_enabled) ?
		    QLA_SG_ALL : 128;
	}

3112 3113 3114 3115
	ret = scsi_add_host(host, &pdev->dev);
	if (ret)
		goto probe_failed;

3116 3117
	base_vha->flags.init_done = 1;
	base_vha->flags.online = 1;
3118
	ha->prev_minidump_failed = 0;
3119

3120 3121 3122
	ql_dbg(ql_dbg_init, base_vha, 0x00f2,
	    "Init done and hba is online.\n");

3123 3124 3125 3126 3127
	if (qla_ini_mode_enabled(base_vha))
		scsi_scan_host(host);
	else
		ql_dbg(ql_dbg_init, base_vha, 0x0122,
			"skipping scsi_scan_host() for non-initiator port\n");
3128

3129
	qla2x00_alloc_sysfs_attr(base_vha);
3130

3131 3132 3133 3134 3135 3136 3137 3138 3139
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);

		/* Register system information */
		ret =  qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
	}

3140
	qla2x00_init_host_attr(base_vha);
3141

3142
	qla2x00_dfs_setup(base_vha);
3143

3144 3145
	ql_log(ql_log_info, base_vha, 0x00fb,
	    "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3146 3147 3148 3149 3150
	ql_log(ql_log_info, base_vha, 0x00fc,
	    "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
	    pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
	    pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
	    base_vha->host_no,
3151
	    ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
L
Linus Torvalds 已提交
3152

3153 3154
	qlt_add_target(ha, base_vha);

3155
	clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3156 3157 3158 3159

	if (test_bit(UNLOADING, &base_vha->dpc_flags))
		return -ENODEV;

L
Linus Torvalds 已提交
3160 3161
	return 0;

3162
probe_init_failed:
3163
	qla2x00_free_req_que(ha, req);
3164 3165
	ha->req_q_map[0] = NULL;
	clear_bit(0, ha->req_qid_map);
3166
	qla2x00_free_rsp_que(ha, rsp);
3167 3168
	ha->rsp_q_map[0] = NULL;
	clear_bit(0, ha->rsp_qid_map);
3169
	ha->max_req_queues = ha->max_rsp_queues = 0;
3170

L
Linus Torvalds 已提交
3171
probe_failed:
3172 3173 3174 3175 3176 3177 3178 3179 3180 3181
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);
	base_vha->flags.online = 0;
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		ha->dpc_thread = NULL;
		kthread_stop(t);
	}

3182
	qla2x00_free_device(base_vha);
L
Linus Torvalds 已提交
3183

3184
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
3185

3186
probe_hw_failed:
3187 3188
	qla2x00_clear_drv_active(ha);

3189
iospace_config_failed:
3190
	if (IS_P3P_TYPE(ha)) {
3191
		if (!ha->nx_pcibase)
3192
			iounmap((device_reg_t *)ha->nx_pcibase);
3193
		if (!ql2xdbwr)
3194
			iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3195 3196 3197
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
3198 3199
		if (ha->cregbase)
			iounmap(ha->cregbase);
3200
	}
3201 3202 3203
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
3204

3205
probe_out:
3206
	pci_disable_device(pdev);
3207
	return ret;
L
Linus Torvalds 已提交
3208 3209
}

3210 3211 3212 3213 3214 3215
static void
qla2x00_shutdown(struct pci_dev *pdev)
{
	scsi_qla_host_t *vha;
	struct qla_hw_data  *ha;

3216 3217 3218
	if (!atomic_read(&pdev->enable_cnt))
		return;

3219 3220 3221
	vha = pci_get_drvdata(pdev);
	ha = vha->hw;

3222 3223 3224 3225
	/* Notify ISPFX00 firmware */
	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(vha, 20);

3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250
	/* Turn-off FCE trace */
	if (ha->flags.fce_enabled) {
		qla2x00_disable_fce_trace(vha, NULL, NULL);
		ha->flags.fce_enabled = 0;
	}

	/* Turn-off EFT trace */
	if (ha->eft)
		qla2x00_disable_eft_trace(vha);

	/* Stop currently executing firmware. */
	qla2x00_try_to_stop_firmware(vha);

	/* Turn adapter off line */
	vha->flags.online = 0;

	/* turn-off interrupts on the card */
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
		ha->isp_ops->disable_intrs(ha);
	}

	qla2x00_free_irqs(vha);

	qla2x00_free_fw_dump(ha);
3251 3252 3253

	pci_disable_pcie_error_reporting(pdev);
	pci_disable_device(pdev);
3254 3255
}

3256
/* Deletes all the virtual ports for a given ha */
A
Adrian Bunk 已提交
3257
static void
3258
qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
L
Linus Torvalds 已提交
3259
{
3260
	scsi_qla_host_t *vha;
3261
	unsigned long flags;
3262

3263 3264 3265
	mutex_lock(&ha->vport_lock);
	while (ha->cur_vport_count) {
		spin_lock_irqsave(&ha->vport_slock, flags);
3266

3267 3268 3269
		BUG_ON(base_vha->list.next == &ha->vp_list);
		/* This assumes first entry in ha->vp_list is always base vha */
		vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3270
		scsi_host_get(vha->host);
3271

3272 3273 3274 3275 3276
		spin_unlock_irqrestore(&ha->vport_slock, flags);
		mutex_unlock(&ha->vport_lock);

		fc_vport_terminate(vha->fc_vport);
		scsi_host_put(vha->host);
3277

3278
		mutex_lock(&ha->vport_lock);
3279
	}
3280
	mutex_unlock(&ha->vport_lock);
3281
}
L
Linus Torvalds 已提交
3282

3283 3284 3285 3286
/* Stops all deferred work threads */
static void
qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
{
3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301
	/* Cancel all work and destroy DPC workqueues */
	if (ha->dpc_lp_wq) {
		cancel_work_sync(&ha->idc_aen);
		destroy_workqueue(ha->dpc_lp_wq);
		ha->dpc_lp_wq = NULL;
	}

	if (ha->dpc_hp_wq) {
		cancel_work_sync(&ha->nic_core_reset);
		cancel_work_sync(&ha->idc_state_handler);
		cancel_work_sync(&ha->nic_core_unrecoverable);
		destroy_workqueue(ha->dpc_hp_wq);
		ha->dpc_hp_wq = NULL;
	}

3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312
	/* Kill the kernel thread for this host */
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		/*
		 * qla2xxx_wake_dpc checks for ->dpc_thread
		 * so we need to zero it out.
		 */
		ha->dpc_thread = NULL;
		kthread_stop(t);
	}
3313
}
L
Linus Torvalds 已提交
3314

3315 3316 3317
static void
qla2x00_unmap_iobases(struct qla_hw_data *ha)
{
3318
	if (IS_QLA82XX(ha)) {
3319

3320
		iounmap((device_reg_t *)ha->nx_pcibase);
3321
		if (!ql2xdbwr)
3322
			iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3323 3324 3325
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
L
Linus Torvalds 已提交
3326

3327 3328 3329
		if (ha->cregbase)
			iounmap(ha->cregbase);

3330 3331
		if (ha->mqiobase)
			iounmap(ha->mqiobase);
3332

3333
		if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3334
			iounmap(ha->msixbase);
3335
	}
3336 3337 3338
}

static void
3339
qla2x00_clear_drv_active(struct qla_hw_data *ha)
3340 3341 3342
{
	if (IS_QLA8044(ha)) {
		qla8044_idc_lock(ha);
3343
		qla8044_clear_drv_active(ha);
3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357
		qla8044_idc_unlock(ha);
	} else if (IS_QLA82XX(ha)) {
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);
	}
}

static void
qla2x00_remove_one(struct pci_dev *pdev)
{
	scsi_qla_host_t *base_vha;
	struct qla_hw_data  *ha;

3358 3359 3360 3361 3362 3363 3364 3365
	base_vha = pci_get_drvdata(pdev);
	ha = base_vha->hw;

	/* Indicate device removal to prevent future board_disable and wait
	 * until any pending board_disable has completed. */
	set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
	cancel_work_sync(&ha->board_disable);

3366
	/*
3367 3368 3369
	 * If the PCI device is disabled then there was a PCI-disconnect and
	 * qla2x00_disable_board_on_pci_error has taken care of most of the
	 * resources.
3370
	 */
3371 3372 3373 3374
	if (!atomic_read(&pdev->enable_cnt)) {
		scsi_host_put(base_vha->host);
		kfree(ha);
		pci_set_drvdata(pdev, NULL);
3375
		return;
3376
	}
3377

3378 3379
	qla2x00_wait_for_hba_ready(base_vha);

3380 3381 3382 3383 3384 3385
	/* if UNLOAD flag is already set, then continue unload,
	 * where it was set first.
	 */
	if (test_bit(UNLOADING, &base_vha->dpc_flags))
		return;

3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406
	set_bit(UNLOADING, &base_vha->dpc_flags);

	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(base_vha, 20);

	qla2x00_delete_all_vps(ha, base_vha);

	if (IS_QLA8031(ha)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
		    "Clearing fcoe driver presence.\n");
		if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
			ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
			    "Error while clearing DRV-Presence.\n");
	}

	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

	qla2x00_dfs_remove(base_vha);

	qla84xx_put_chip(base_vha);

3407 3408 3409 3410
	/* Laser should be disabled only for ISP2031 */
	if (IS_QLA2031(ha))
		qla83xx_disable_laser(base_vha);

3411 3412 3413 3414 3415 3416
	/* Disable timer */
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

3417 3418 3419 3420
	/* free DMA memory */
	if (ha->exlogin_buf)
		qla2x00_free_exlogin_buffer(ha);

3421 3422 3423 3424
	/* free DMA memory */
	if (ha->exchoffld_buf)
		qla2x00_free_exchoffld_buffer(ha);

3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436
	qla2x00_destroy_deferred_work(ha);

	qlt_remove_target(ha, base_vha);

	qla2x00_free_sysfs_attr(base_vha, true);

	fc_remove_host(base_vha->host);

	scsi_remove_host(base_vha->host);

	qla2x00_free_device(base_vha);

3437
	qla2x00_clear_drv_active(ha);
3438

3439 3440
	scsi_host_put(base_vha->host);

3441
	qla2x00_unmap_iobases(ha);
3442

3443 3444 3445
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
3446

3447 3448
	pci_disable_pcie_error_reporting(pdev);

3449
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
3450 3451 3452
}

static void
3453
qla2x00_free_device(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
3454
{
3455
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
3456

3457 3458 3459 3460 3461 3462
	qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);

	/* Disable timer */
	if (vha->timer_active)
		qla2x00_stop_timer(vha);

3463
	qla25xx_delete_queues(vha);
3464

3465
	if (ha->flags.fce_enabled)
3466
		qla2x00_disable_fce_trace(vha, NULL, NULL);
3467

3468
	if (ha->eft)
3469
		qla2x00_disable_eft_trace(vha);
3470

3471
	/* Stop currently executing firmware. */
3472
	qla2x00_try_to_stop_firmware(vha);
L
Linus Torvalds 已提交
3473

3474 3475
	vha->flags.online = 0;

3476
	/* turn-off interrupts on the card */
3477 3478
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
3479
		ha->isp_ops->disable_intrs(ha);
3480
	}
3481

3482 3483
	qla2x00_free_fcports(vha);

3484
	qla2x00_free_irqs(vha);
L
Linus Torvalds 已提交
3485

3486 3487 3488 3489 3490 3491 3492
	/* Flush the work queue and remove it */
	if (ha->wq) {
		flush_workqueue(ha->wq);
		destroy_workqueue(ha->wq);
		ha->wq = NULL;
	}

3493

3494
	qla2x00_mem_free(ha);
3495

3496 3497
	qla82xx_md_free(vha);

3498
	qla2x00_free_queues(ha);
L
Linus Torvalds 已提交
3499 3500
}

3501 3502 3503 3504 3505 3506
void qla2x00_free_fcports(struct scsi_qla_host *vha)
{
	fc_port_t *fcport, *tfcport;

	list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
		list_del(&fcport->list);
3507
		qla2x00_clear_loop_id(fcport);
3508 3509 3510 3511 3512
		kfree(fcport);
		fcport = NULL;
	}
}

3513
static inline void
3514
qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3515 3516 3517
    int defer)
{
	struct fc_rport *rport;
3518
	scsi_qla_host_t *base_vha;
3519
	unsigned long flags;
3520 3521 3522 3523 3524 3525

	if (!fcport->rport)
		return;

	rport = fcport->rport;
	if (defer) {
3526
		base_vha = pci_get_drvdata(vha->hw->pdev);
3527
		spin_lock_irqsave(vha->host->host_lock, flags);
3528
		fcport->drport = rport;
3529
		spin_unlock_irqrestore(vha->host->host_lock, flags);
3530
		qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3531 3532
		set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
		qla2xxx_wake_dpc(base_vha);
3533
	} else {
3534
		int now;
3535 3536
		if (rport)
			fc_remote_port_delete(rport);
3537 3538
		qlt_do_generation_tick(vha, &now);
		qlt_fc_port_deleted(vha, fcport, now);
3539
	}
3540 3541
}

L
Linus Torvalds 已提交
3542 3543 3544 3545 3546 3547 3548 3549 3550
/*
 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
 *
 * Input: ha = adapter block pointer.  fcport = port structure pointer.
 *
 * Return: None.
 *
 * Context:
 */
3551
void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3552
    int do_login, int defer)
L
Linus Torvalds 已提交
3553
{
3554 3555 3556 3557 3558 3559
	if (IS_QLAFX00(vha->hw)) {
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
		qla2x00_schedule_rport_del(vha, fcport, defer);
		return;
	}

3560
	if (atomic_read(&fcport->state) == FCS_ONLINE &&
3561
	    vha->vp_idx == fcport->vha->vp_idx) {
3562
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3563 3564
		qla2x00_schedule_rport_del(vha, fcport, defer);
	}
A
Andrew Vasquez 已提交
3565
	/*
L
Linus Torvalds 已提交
3566 3567 3568 3569
	 * We may need to retry the login, so don't change the state of the
	 * port but do the retries.
	 */
	if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3570
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
L
Linus Torvalds 已提交
3571 3572 3573 3574

	if (!do_login)
		return;

3575 3576
	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);

L
Linus Torvalds 已提交
3577
	if (fcport->login_retry == 0) {
3578
		fcport->login_retry = vha->hw->login_retry_count;
L
Linus Torvalds 已提交
3579

3580
		ql_dbg(ql_dbg_disc, vha, 0x2067,
3581 3582
		    "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
		    fcport->port_name, fcport->loop_id, fcport->login_retry);
L
Linus Torvalds 已提交
3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599
	}
}

/*
 * qla2x00_mark_all_devices_lost
 *	Updates fcport state when device goes offline.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fcport = port structure pointer.
 *
 * Return:
 *	None.
 *
 * Context:
 */
void
3600
qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
L
Linus Torvalds 已提交
3601 3602 3603
{
	fc_port_t *fcport;

3604
	list_for_each_entry(fcport, &vha->vp_fcports, list) {
3605
		if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
L
Linus Torvalds 已提交
3606
			continue;
3607

L
Linus Torvalds 已提交
3608 3609 3610 3611 3612 3613
		/*
		 * No point in marking the device as lost, if the device is
		 * already DEAD.
		 */
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
			continue;
3614
		if (atomic_read(&fcport->state) == FCS_ONLINE) {
3615
			qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3616 3617
			if (defer)
				qla2x00_schedule_rport_del(vha, fcport, defer);
3618
			else if (vha->vp_idx == fcport->vha->vp_idx)
3619 3620
				qla2x00_schedule_rport_del(vha, fcport, defer);
		}
L
Linus Torvalds 已提交
3621 3622 3623 3624 3625 3626 3627 3628 3629
	}
}

/*
* qla2x00_mem_alloc
*      Allocates adapter memory.
*
* Returns:
*      0  = success.
3630
*      !0  = failure.
L
Linus Torvalds 已提交
3631
*/
3632
static int
3633 3634
qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
	struct req_que **req, struct rsp_que **rsp)
L
Linus Torvalds 已提交
3635 3636 3637
{
	char	name[16];

3638
	ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3639
		&ha->init_cb_dma, GFP_KERNEL);
3640
	if (!ha->init_cb)
3641
		goto fail;
3642

3643 3644 3645
	if (qlt_mem_alloc(ha) < 0)
		goto fail_free_init_cb;

3646 3647
	ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
		qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3648
	if (!ha->gid_list)
3649
		goto fail_free_tgt_mem;
L
Linus Torvalds 已提交
3650

3651 3652
	ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
	if (!ha->srb_mempool)
3653
		goto fail_free_gid_list;
3654

3655
	if (IS_P3P_TYPE(ha)) {
3656 3657 3658 3659 3660 3661
		/* Allocate cache for CT6 Ctx. */
		if (!ctx_cachep) {
			ctx_cachep = kmem_cache_create("qla2xxx_ctx",
				sizeof(struct ct6_dsd), 0,
				SLAB_HWCACHE_ALIGN, NULL);
			if (!ctx_cachep)
3662
				goto fail_free_srb_mempool;
3663 3664 3665 3666 3667
		}
		ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
			ctx_cachep);
		if (!ha->ctx_mempool)
			goto fail_free_srb_mempool;
3668 3669 3670
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
		    "ctx_cachep=%p ctx_mempool=%p.\n",
		    ctx_cachep, ha->ctx_mempool);
3671 3672
	}

3673 3674 3675
	/* Get memory for cached NVRAM */
	ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
	if (!ha->nvram)
3676
		goto fail_free_ctx_mempool;
3677

3678 3679 3680 3681 3682 3683 3684
	snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
		ha->pdev->device);
	ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
		DMA_POOL_SIZE, 8, 0);
	if (!ha->s_dma_pool)
		goto fail_free_nvram;

3685 3686 3687 3688
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
	    "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
	    ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);

3689
	if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3690 3691 3692
		ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			DSD_LIST_DMA_POOL_SIZE, 8, 0);
		if (!ha->dl_dma_pool) {
3693 3694
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
			    "Failed to allocate memory for dl_dma_pool.\n");
3695 3696 3697 3698 3699 3700
			goto fail_s_dma_pool;
		}

		ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			FCP_CMND_DMA_POOL_SIZE, 8, 0);
		if (!ha->fcp_cmnd_dma_pool) {
3701 3702
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
			    "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3703 3704
			goto fail_dl_dma_pool;
		}
3705 3706 3707
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
		    "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
		    ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3708 3709
	}

3710 3711
	/* Allocate memory for SNS commands */
	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3712
	/* Get consistent memory allocated for SNS commands */
3713
		ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3714
		sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3715
		if (!ha->sns_cmd)
3716
			goto fail_dma_pool;
3717
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3718
		    "sns_cmd: %p.\n", ha->sns_cmd);
3719
	} else {
3720
	/* Get consistent memory allocated for MS IOCB */
3721
		ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3722
			&ha->ms_iocb_dma);
3723
		if (!ha->ms_iocb)
3724 3725
			goto fail_dma_pool;
	/* Get consistent memory allocated for CT SNS commands */
3726
		ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3727
			sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3728 3729
		if (!ha->ct_sns)
			goto fail_free_ms_iocb;
3730 3731 3732
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
		    "ms_iocb=%p ct_sns=%p.\n",
		    ha->ms_iocb, ha->ct_sns);
L
Linus Torvalds 已提交
3733 3734
	}

3735
	/* Allocate memory for request ring */
3736 3737
	*req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
	if (!*req) {
3738 3739
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
		    "Failed to allocate memory for req.\n");
3740 3741
		goto fail_req;
	}
3742 3743 3744 3745 3746
	(*req)->length = req_len;
	(*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*req)->length + 1) * sizeof(request_t),
		&(*req)->dma, GFP_KERNEL);
	if (!(*req)->ring) {
3747 3748
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
		    "Failed to allocate memory for req_ring.\n");
3749 3750 3751
		goto fail_req_ring;
	}
	/* Allocate memory for response ring */
3752 3753
	*rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
	if (!*rsp) {
3754 3755
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
		    "Failed to allocate memory for rsp.\n");
3756 3757
		goto fail_rsp;
	}
3758 3759 3760 3761 3762 3763
	(*rsp)->hw = ha;
	(*rsp)->length = rsp_len;
	(*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*rsp)->length + 1) * sizeof(response_t),
		&(*rsp)->dma, GFP_KERNEL);
	if (!(*rsp)->ring) {
3764 3765
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
		    "Failed to allocate memory for rsp_ring.\n");
3766 3767
		goto fail_rsp_ring;
	}
3768 3769
	(*req)->rsp = *rsp;
	(*rsp)->req = *req;
3770 3771 3772 3773 3774
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
	    "req=%p req->length=%d req->ring=%p rsp=%p "
	    "rsp->length=%d rsp->ring=%p.\n",
	    *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
	    (*rsp)->ring);
3775 3776 3777
	/* Allocate memory for NVRAM data for vports */
	if (ha->nvram_npiv_size) {
		ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3778
		    ha->nvram_npiv_size, GFP_KERNEL);
3779
		if (!ha->npiv_info) {
3780 3781
			ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
			    "Failed to allocate memory for npiv_info.\n");
3782 3783 3784 3785
			goto fail_npiv_info;
		}
	} else
		ha->npiv_info = NULL;
3786

3787
	/* Get consistent memory allocated for EX-INIT-CB. */
3788
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3789 3790 3791 3792
		ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
		    &ha->ex_init_cb_dma);
		if (!ha->ex_init_cb)
			goto fail_ex_init_cb;
3793 3794
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
		    "ex_init_cb=%p.\n", ha->ex_init_cb);
3795 3796
	}

3797 3798
	INIT_LIST_HEAD(&ha->gbl_dsd_list);

3799 3800 3801 3802 3803 3804
	/* Get consistent memory allocated for Async Port-Database. */
	if (!IS_FWI2_CAPABLE(ha)) {
		ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
			&ha->async_pd_dma);
		if (!ha->async_pd)
			goto fail_async_pd;
3805 3806
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
		    "async_pd=%p.\n", ha->async_pd);
3807 3808
	}

3809
	INIT_LIST_HEAD(&ha->vp_list);
3810 3811 3812 3813 3814

	/* Allocate memory for our loop_id bitmap */
	ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
	    GFP_KERNEL);
	if (!ha->loop_id_map)
3815
		goto fail_loop_id_map;
3816 3817 3818
	else {
		qla2x00_set_reserved_loop_ids(ha);
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3819
		    "loop_id_map=%p.\n", ha->loop_id_map);
3820 3821
	}

3822
	return 0;
3823

3824 3825
fail_loop_id_map:
	dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3826 3827
fail_async_pd:
	dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3828 3829
fail_ex_init_cb:
	kfree(ha->npiv_info);
3830 3831 3832 3833 3834
fail_npiv_info:
	dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
		sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
	(*rsp)->ring = NULL;
	(*rsp)->dma = 0;
3835
fail_rsp_ring:
3836
	kfree(*rsp);
3837
fail_rsp:
3838 3839 3840 3841
	dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
		sizeof(request_t), (*req)->ring, (*req)->dma);
	(*req)->ring = NULL;
	(*req)->dma = 0;
3842
fail_req_ring:
3843
	kfree(*req);
3844 3845 3846 3847 3848
fail_req:
	dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
		ha->ct_sns, ha->ct_sns_dma);
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
3849 3850 3851 3852
fail_free_ms_iocb:
	dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
3853 3854 3855 3856

	if (ha->sns_cmd)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
		    ha->sns_cmd, ha->sns_cmd_dma);
3857
fail_dma_pool:
3858
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3859 3860 3861 3862
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);
		ha->fcp_cmnd_dma_pool = NULL;
	}
fail_dl_dma_pool:
3863
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3864 3865 3866 3867
		dma_pool_destroy(ha->dl_dma_pool);
		ha->dl_dma_pool = NULL;
	}
fail_s_dma_pool:
3868 3869
	dma_pool_destroy(ha->s_dma_pool);
	ha->s_dma_pool = NULL;
3870 3871 3872
fail_free_nvram:
	kfree(ha->nvram);
	ha->nvram = NULL;
3873
fail_free_ctx_mempool:
3874 3875
	if (ha->ctx_mempool)
		mempool_destroy(ha->ctx_mempool);
3876
	ha->ctx_mempool = NULL;
3877
fail_free_srb_mempool:
3878 3879
	if (ha->srb_mempool)
		mempool_destroy(ha->srb_mempool);
3880 3881
	ha->srb_mempool = NULL;
fail_free_gid_list:
3882 3883
	dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
	ha->gid_list,
3884
	ha->gid_list_dma);
3885 3886
	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3887 3888
fail_free_tgt_mem:
	qlt_mem_free(ha);
3889 3890 3891 3892 3893
fail_free_init_cb:
	dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
	ha->init_cb_dma);
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3894
fail:
3895 3896
	ql_log(ql_log_fatal, NULL, 0x0030,
	    "Memory allocation failure.\n");
3897
	return -ENOMEM;
L
Linus Torvalds 已提交
3898 3899
}

3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965
int
qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
{
	int rval;
	uint16_t	size, max_cnt, temp;
	struct qla_hw_data *ha = vha->hw;

	/* Return if we don't need to alloacate any extended logins */
	if (!ql2xexlogins)
		return QLA_SUCCESS;

	ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
	max_cnt = 0;
	rval = qla_get_exlogin_status(vha, &size, &max_cnt);
	if (rval != QLA_SUCCESS) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
		    "Failed to get exlogin status.\n");
		return rval;
	}

	temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
	ha->exlogin_size = (size * temp);
	ql_log(ql_log_info, vha, 0xd024,
		"EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
		max_cnt, size, temp);

	ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
		ha->exlogin_size);

	/* Get consistent memory for extended logins */
	ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
	    ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
	if (!ha->exlogin_buf) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
		    "Failed to allocate memory for exlogin_buf_dma.\n");
		return -ENOMEM;
	}

	/* Now configure the dma buffer */
	rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
	if (rval) {
		ql_log(ql_log_fatal, vha, 0x00cf,
		    "Setup extended login buffer  ****FAILED****.\n");
		qla2x00_free_exlogin_buffer(ha);
	}

	return rval;
}

/*
* qla2x00_free_exlogin_buffer
*
* Input:
*	ha = adapter block pointer
*/
void
qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
{
	if (ha->exlogin_buf) {
		dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
		    ha->exlogin_buf, ha->exlogin_buf_dma);
		ha->exlogin_buf = NULL;
		ha->exlogin_size = 0;
	}
}

3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033
int
qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
{
	int rval;
	uint16_t	size, max_cnt, temp;
	struct qla_hw_data *ha = vha->hw;

	/* Return if we don't need to alloacate any extended logins */
	if (!ql2xexchoffld)
		return QLA_SUCCESS;

	ql_log(ql_log_info, vha, 0xd014,
	    "Exchange offload count: %d.\n", ql2xexlogins);

	max_cnt = 0;
	rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
	if (rval != QLA_SUCCESS) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
		    "Failed to get exlogin status.\n");
		return rval;
	}

	temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
	ha->exchoffld_size = (size * temp);
	ql_log(ql_log_info, vha, 0xd016,
		"Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
		max_cnt, size, temp);

	ql_log(ql_log_info, vha, 0xd017,
	    "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);

	/* Get consistent memory for extended logins */
	ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
	    ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
	if (!ha->exchoffld_buf) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
		    "Failed to allocate memory for exchoffld_buf_dma.\n");
		return -ENOMEM;
	}

	/* Now configure the dma buffer */
	rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
	if (rval) {
		ql_log(ql_log_fatal, vha, 0xd02e,
		    "Setup exchange offload buffer ****FAILED****.\n");
		qla2x00_free_exchoffld_buffer(ha);
	}

	return rval;
}

/*
* qla2x00_free_exchoffld_buffer
*
* Input:
*	ha = adapter block pointer
*/
void
qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
{
	if (ha->exchoffld_buf) {
		dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
		    ha->exchoffld_buf, ha->exchoffld_buf_dma);
		ha->exchoffld_buf = NULL;
		ha->exchoffld_size = 0;
	}
}

L
Linus Torvalds 已提交
4034
/*
4035 4036
* qla2x00_free_fw_dump
*	Frees fw dump stuff.
L
Linus Torvalds 已提交
4037 4038
*
* Input:
4039
*	ha = adapter block pointer
L
Linus Torvalds 已提交
4040
*/
A
Adrian Bunk 已提交
4041
static void
4042
qla2x00_free_fw_dump(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
4043
{
4044
	if (ha->fce)
4045 4046
		dma_free_coherent(&ha->pdev->dev,
		    FCE_SIZE, ha->fce, ha->fce_dma);
4047

4048 4049 4050 4051 4052
	if (ha->eft)
		dma_free_coherent(&ha->pdev->dev,
		    EFT_SIZE, ha->eft, ha->eft_dma);

	if (ha->fw_dump)
4053
		vfree(ha->fw_dump);
4054 4055 4056
	if (ha->fw_dump_template)
		vfree(ha->fw_dump_template);

4057 4058 4059 4060 4061
	ha->fce = NULL;
	ha->fce_dma = 0;
	ha->eft = NULL;
	ha->eft_dma = 0;
	ha->fw_dumped = 0;
4062
	ha->fw_dump_cap_flags = 0;
4063
	ha->fw_dump_reading = 0;
4064 4065 4066 4067
	ha->fw_dump = NULL;
	ha->fw_dump_len = 0;
	ha->fw_dump_template = NULL;
	ha->fw_dump_template_len = 0;
4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081
}

/*
* qla2x00_mem_free
*      Frees all adapter allocated memory.
*
* Input:
*      ha = adapter block pointer.
*/
static void
qla2x00_mem_free(struct qla_hw_data *ha)
{
	qla2x00_free_fw_dump(ha);

4082 4083 4084 4085
	if (ha->mctp_dump)
		dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
		    ha->mctp_dump_dma);

4086 4087
	if (ha->srb_mempool)
		mempool_destroy(ha->srb_mempool);
4088

4089 4090 4091 4092
	if (ha->dcbx_tlv)
		dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
		    ha->dcbx_tlv, ha->dcbx_tlv_dma);

4093 4094 4095 4096
	if (ha->xgmac_data)
		dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
		    ha->xgmac_data, ha->xgmac_data_dma);

L
Linus Torvalds 已提交
4097 4098
	if (ha->sns_cmd)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4099
		ha->sns_cmd, ha->sns_cmd_dma);
L
Linus Torvalds 已提交
4100 4101 4102

	if (ha->ct_sns)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4103
		ha->ct_sns, ha->ct_sns_dma);
L
Linus Torvalds 已提交
4104

4105 4106 4107
	if (ha->sfp_data)
		dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);

L
Linus Torvalds 已提交
4108 4109 4110
	if (ha->ms_iocb)
		dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);

4111
	if (ha->ex_init_cb)
4112 4113
		dma_pool_free(ha->s_dma_pool,
			ha->ex_init_cb, ha->ex_init_cb_dma);
4114

4115 4116 4117
	if (ha->async_pd)
		dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);

L
Linus Torvalds 已提交
4118 4119 4120 4121
	if (ha->s_dma_pool)
		dma_pool_destroy(ha->s_dma_pool);

	if (ha->gid_list)
4122 4123
		dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
		ha->gid_list, ha->gid_list_dma);
L
Linus Torvalds 已提交
4124

4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148
	if (IS_QLA82XX(ha)) {
		if (!list_empty(&ha->gbl_dsd_list)) {
			struct dsd_dma *dsd_ptr, *tdsd_ptr;

			/* clean up allocated prev pool */
			list_for_each_entry_safe(dsd_ptr,
				tdsd_ptr, &ha->gbl_dsd_list, list) {
				dma_pool_free(ha->dl_dma_pool,
				dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
				list_del(&dsd_ptr->list);
				kfree(dsd_ptr);
			}
		}
	}

	if (ha->dl_dma_pool)
		dma_pool_destroy(ha->dl_dma_pool);

	if (ha->fcp_cmnd_dma_pool)
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);

	if (ha->ctx_mempool)
		mempool_destroy(ha->ctx_mempool);

4149 4150
	qlt_mem_free(ha);

4151 4152
	if (ha->init_cb)
		dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4153
			ha->init_cb, ha->init_cb_dma);
4154 4155
	vfree(ha->optrom_buffer);
	kfree(ha->nvram);
4156
	kfree(ha->npiv_info);
4157
	kfree(ha->swl);
4158
	kfree(ha->loop_id_map);
L
Linus Torvalds 已提交
4159

4160
	ha->srb_mempool = NULL;
4161
	ha->ctx_mempool = NULL;
L
Linus Torvalds 已提交
4162 4163 4164 4165 4166 4167 4168 4169
	ha->sns_cmd = NULL;
	ha->sns_cmd_dma = 0;
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
4170 4171
	ha->ex_init_cb = NULL;
	ha->ex_init_cb_dma = 0;
4172 4173
	ha->async_pd = NULL;
	ha->async_pd_dma = 0;
L
Linus Torvalds 已提交
4174 4175

	ha->s_dma_pool = NULL;
4176 4177
	ha->dl_dma_pool = NULL;
	ha->fcp_cmnd_dma_pool = NULL;
L
Linus Torvalds 已提交
4178 4179 4180

	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
4181 4182 4183 4184

	ha->tgt.atio_ring = NULL;
	ha->tgt.atio_dma = 0;
	ha->tgt.tgt_vp_map = NULL;
4185
}
L
Linus Torvalds 已提交
4186

4187 4188 4189 4190 4191
struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
						struct qla_hw_data *ha)
{
	struct Scsi_Host *host;
	struct scsi_qla_host *vha = NULL;
4192

4193 4194
	host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
	if (host == NULL) {
4195 4196
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
		    "Failed to allocate host from the scsi layer, aborting.\n");
4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210
		goto fail;
	}

	/* Clear our data area */
	vha = shost_priv(host);
	memset(vha, 0, sizeof(scsi_qla_host_t));

	vha->host = host;
	vha->host_no = host->host_no;
	vha->hw = ha;

	INIT_LIST_HEAD(&vha->vp_fcports);
	INIT_LIST_HEAD(&vha->work_list);
	INIT_LIST_HEAD(&vha->list);
4211 4212
	INIT_LIST_HEAD(&vha->qla_cmd_list);
	INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4213
	INIT_LIST_HEAD(&vha->logo_list);
4214
	INIT_LIST_HEAD(&vha->plogi_ack_list);
4215
	INIT_LIST_HEAD(&vha->qp_list);
4216

4217
	spin_lock_init(&vha->work_lock);
4218
	spin_lock_init(&vha->cmd_list_lock);
4219

4220
	sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4221 4222 4223 4224 4225
	ql_dbg(ql_dbg_init, vha, 0x0041,
	    "Allocated the host=%p hw=%p vha=%p dev_name=%s",
	    vha->host, vha->hw, vha,
	    dev_name(&(ha->pdev->dev)));

4226 4227 4228 4229
	return vha;

fail:
	return vha;
L
Linus Torvalds 已提交
4230 4231
}

4232
static struct qla_work_evt *
4233
qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4234 4235
{
	struct qla_work_evt *e;
4236 4237 4238 4239 4240
	uint8_t bail;

	QLA_VHA_MARK_BUSY(vha, bail);
	if (bail)
		return NULL;
4241

4242
	e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4243 4244
	if (!e) {
		QLA_VHA_MARK_NOT_BUSY(vha);
4245
		return NULL;
4246
	}
4247 4248 4249 4250 4251 4252 4253

	INIT_LIST_HEAD(&e->list);
	e->type = type;
	e->flags = QLA_EVT_FLAG_FREE;
	return e;
}

4254
static int
4255
qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4256
{
4257
	unsigned long flags;
4258

4259
	spin_lock_irqsave(&vha->work_lock, flags);
4260
	list_add_tail(&e->list, &vha->work_list);
4261
	spin_unlock_irqrestore(&vha->work_lock, flags);
4262
	qla2xxx_wake_dpc(vha);
4263

4264 4265 4266 4267
	return QLA_SUCCESS;
}

int
4268
qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4269 4270 4271 4272
    u32 data)
{
	struct qla_work_evt *e;

4273
	e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4274 4275 4276 4277 4278
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aen.code = code;
	e->u.aen.data = data;
4279
	return qla2x00_post_work(vha, e);
4280 4281
}

4282 4283 4284 4285 4286
int
qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
{
	struct qla_work_evt *e;

4287
	e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4288 4289 4290 4291
	if (!e)
		return QLA_FUNCTION_FAILED;

	memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4292
	return qla2x00_post_work(vha, e);
4293 4294
}

4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317
#define qla2x00_post_async_work(name, type)	\
int qla2x00_post_async_##name##_work(		\
    struct scsi_qla_host *vha,			\
    fc_port_t *fcport, uint16_t *data)		\
{						\
	struct qla_work_evt *e;			\
						\
	e = qla2x00_alloc_work(vha, type);	\
	if (!e)					\
		return QLA_FUNCTION_FAILED;	\
						\
	e->u.logio.fcport = fcport;		\
	if (data) {				\
		e->u.logio.data[0] = data[0];	\
		e->u.logio.data[1] = data[1];	\
	}					\
	return qla2x00_post_work(vha, e);	\
}

qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4318 4319
qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4320

4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351
int
qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.uevent.code = code;
	return qla2x00_post_work(vha, e);
}

static void
qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
{
	char event_string[40];
	char *envp[] = { event_string, NULL };

	switch (code) {
	case QLA_UEVENT_CODE_FW_DUMP:
		snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
		    vha->host_no);
		break;
	default:
		/* do nothing */
		break;
	}
	kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
}

4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367
int
qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
			uint32_t *data, int cnt)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aenfx.evtcode = evtcode;
	e->u.aenfx.count = cnt;
	memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
	return qla2x00_post_work(vha, e);
}

4368
void
4369
qla2x00_do_work(struct scsi_qla_host *vha)
4370
{
4371 4372 4373
	struct qla_work_evt *e, *tmp;
	unsigned long flags;
	LIST_HEAD(work);
4374

4375 4376 4377 4378 4379
	spin_lock_irqsave(&vha->work_lock, flags);
	list_splice_init(&vha->work_list, &work);
	spin_unlock_irqrestore(&vha->work_lock, flags);

	list_for_each_entry_safe(e, tmp, &work, list) {
4380 4381 4382 4383
		list_del_init(&e->list);

		switch (e->type) {
		case QLA_EVT_AEN:
4384
			fc_host_post_event(vha->host, fc_get_event_number(),
4385 4386
			    e->u.aen.code, e->u.aen.data);
			break;
4387 4388 4389
		case QLA_EVT_IDC_ACK:
			qla81xx_idc_ack(vha, e->u.idc_ack.mb);
			break;
4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404
		case QLA_EVT_ASYNC_LOGIN:
			qla2x00_async_login(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGIN_DONE:
			qla2x00_async_login_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGOUT:
			qla2x00_async_logout(vha, e->u.logio.fcport);
			break;
		case QLA_EVT_ASYNC_LOGOUT_DONE:
			qla2x00_async_logout_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
4405 4406 4407 4408 4409 4410 4411 4412
		case QLA_EVT_ASYNC_ADISC:
			qla2x00_async_adisc(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_ADISC_DONE:
			qla2x00_async_adisc_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
4413 4414 4415
		case QLA_EVT_UEVENT:
			qla2x00_uevent_emit(vha, e->u.uevent.code);
			break;
4416 4417 4418
		case QLA_EVT_AENFX:
			qlafx00_process_aen(vha, e);
			break;
4419 4420 4421
		}
		if (e->flags & QLA_EVT_FLAG_FREE)
			kfree(e);
4422 4423 4424

		/* For each work completed decrement vha ref count */
		QLA_VHA_MARK_NOT_BUSY(vha);
4425 4426
	}
}
4427

4428 4429 4430 4431 4432 4433
/* Relogins all the fcports of a vport
 * Context: dpc thread
 */
void qla2x00_relogin(struct scsi_qla_host *vha)
{
	fc_port_t       *fcport;
4434
	int status;
4435 4436
	uint16_t        next_loopid = 0;
	struct qla_hw_data *ha = vha->hw;
4437
	uint16_t data[2];
4438 4439 4440 4441 4442 4443

	list_for_each_entry(fcport, &vha->vp_fcports, list) {
	/*
	 * If the port is not ONLINE then try to login
	 * to it if we haven't run out of retries.
	 */
4444 4445
		if (atomic_read(&fcport->state) != FCS_ONLINE &&
		    fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4446
			fcport->login_retry--;
4447
			if (fcport->flags & FCF_FABRIC_DEVICE) {
4448
				if (fcport->flags & FCF_FCP2_DEVICE)
4449 4450 4451 4452 4453 4454
					ha->isp_ops->fabric_logout(vha,
							fcport->loop_id,
							fcport->d_id.b.domain,
							fcport->d_id.b.area,
							fcport->d_id.b.al_pa);

4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465
				if (fcport->loop_id == FC_NO_LOOP_ID) {
					fcport->loop_id = next_loopid =
					    ha->min_external_loopid;
					status = qla2x00_find_new_loop_id(
					    vha, fcport);
					if (status != QLA_SUCCESS) {
						/* Ran out of IDs to use */
						break;
					}
				}

4466
				if (IS_ALOGIO_CAPABLE(ha)) {
4467
					fcport->flags |= FCF_ASYNC_SENT;
4468 4469 4470 4471 4472 4473 4474 4475
					data[0] = 0;
					data[1] = QLA_LOGIO_LOGIN_RETRIED;
					status = qla2x00_post_async_login_work(
					    vha, fcport, data);
					if (status == QLA_SUCCESS)
						continue;
					/* Attempt a retry. */
					status = 1;
4476
				} else {
4477 4478
					status = qla2x00_fabric_login(vha,
					    fcport, &next_loopid);
4479 4480 4481 4482 4483 4484 4485 4486
					if (status ==  QLA_SUCCESS) {
						int status2;
						uint8_t opts;

						opts = 0;
						if (fcport->flags &
						    FCF_FCP2_DEVICE)
							opts |= BIT_1;
4487 4488 4489
						status2 =
						    qla2x00_get_port_database(
							vha, fcport, opts);
4490 4491 4492 4493
						if (status2 != QLA_SUCCESS)
							status = 1;
					}
				}
4494 4495 4496 4497 4498 4499 4500
			} else
				status = qla2x00_local_device_login(vha,
								fcport);

			if (status == QLA_SUCCESS) {
				fcport->old_loop_id = fcport->loop_id;

4501 4502 4503
				ql_dbg(ql_dbg_disc, vha, 0x2003,
				    "Port login OK: logged in ID 0x%x.\n",
				    fcport->loop_id);
4504 4505 4506 4507 4508 4509

				qla2x00_update_fcport(vha, fcport);

			} else if (status == 1) {
				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
				/* retry the login again */
4510 4511 4512
				ql_dbg(ql_dbg_disc, vha, 0x2007,
				    "Retrying %d login again loop_id 0x%x.\n",
				    fcport->login_retry, fcport->loop_id);
4513 4514 4515 4516 4517
			} else {
				fcport->login_retry = 0;
			}

			if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4518
				qla2x00_clear_loop_id(fcport);
4519 4520 4521
		}
		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
			break;
4522 4523 4524
	}
}

4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555
/* Schedule work on any of the dpc-workqueues */
void
qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
{
	struct qla_hw_data *ha = base_vha->hw;

	switch (work_code) {
	case MBA_IDC_AEN: /* 0x8200 */
		if (ha->dpc_lp_wq)
			queue_work(ha->dpc_lp_wq, &ha->idc_aen);
		break;

	case QLA83XX_NIC_CORE_RESET: /* 0x1 */
		if (!ha->flags.nic_core_reset_hdlr_active) {
			if (ha->dpc_hp_wq)
				queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
		} else
			ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
			    "NIC Core reset is already active. Skip "
			    "scheduling it again.\n");
		break;
	case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
		break;
	case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
		break;
	default:
		ql_log(ql_log_warn, base_vha, 0xb05f,
4556
		    "Unknown work-code=0x%x.\n", work_code);
4557 4558 4559 4560 4561 4562 4563 4564 4565 4566
	}

	return;
}

/* Work: Perform NIC Core Unrecoverable state handling */
void
qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4567
		container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_reset_ownership(base_vha);
	if (ha->flags.nic_core_reset_owner) {
		ha->flags.nic_core_reset_owner = 0;
		qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
		    QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
	qla83xx_idc_unlock(base_vha, 0);
}

/* Work: Execute IDC state handler */
void
qla83xx_idc_state_handler_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4589
		container_of(work, struct qla_hw_data, idc_state_handler);
4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
		qla83xx_idc_state_handler(base_vha);
	qla83xx_idc_unlock(base_vha, 0);
}

4601
static int
4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638
qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	unsigned long heart_beat_wait = jiffies + (1 * HZ);
	uint32_t heart_beat_counter1, heart_beat_counter2;

	do {
		if (time_after(jiffies, heart_beat_wait)) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
			    "Nic Core f/w is not alive.\n");
			rval = QLA_FUNCTION_FAILED;
			break;
		}

		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter1);
		qla83xx_idc_unlock(base_vha, 0);
		msleep(100);
		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter2);
		qla83xx_idc_unlock(base_vha, 0);
	} while (heart_beat_counter1 == heart_beat_counter2);

	return rval;
}

/* Work: Perform NIC Core Reset handling */
void
qla83xx_nic_core_reset_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, nic_core_reset);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

4639 4640 4641 4642 4643 4644 4645
	if (IS_QLA2031(ha)) {
		if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
			ql_log(ql_log_warn, base_vha, 0xb081,
			    "Failed to dump mctp\n");
		return;
	}

4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718
	if (!ha->flags.nic_core_reset_hdlr_active) {
		if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
			qla83xx_idc_lock(base_vha, 0);
			qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
			    &dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			if (dev_state != QLA8XXX_DEV_NEED_RESET) {
				ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
				    "Nic Core f/w is alive.\n");
				return;
			}
		}

		ha->flags.nic_core_reset_hdlr_active = 1;
		if (qla83xx_nic_core_reset(base_vha)) {
			/* NIC Core reset failed. */
			ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
			    "NIC Core reset failed.\n");
		}
		ha->flags.nic_core_reset_hdlr_active = 0;
	}
}

/* Work: Handle 8200 IDC aens */
void
qla83xx_service_idc_aen(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, idc_aen);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state, idc_control;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
	qla83xx_idc_unlock(base_vha, 0);
	if (dev_state == QLA8XXX_DEV_NEED_RESET) {
		if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
			    "Application requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		} else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
		    QLA_SUCCESS) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
			    "Other protocol driver requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		}
	} else if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
}

static void
qla83xx_wait_logic(void)
{
	int i;

	/* Yield CPU */
	if (!in_interrupt()) {
		/*
		 * Wait about 200ms before retrying again.
		 * This controls the number of retries for single
		 * lock operation.
		 */
		msleep(100);
		schedule();
	} else {
		for (i = 0; i < 20; i++)
			cpu_relax(); /* This a nop instr on i386 */
	}
}

4719
static int
4720 4721 4722 4723 4724 4725 4726
qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval;
	uint32_t data;
	uint32_t idc_lck_rcvry_stage_mask = 0x3;
	uint32_t idc_lck_rcvry_owner_mask = 0x3c;
	struct qla_hw_data *ha = base_vha->hw;
4727 4728
	ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
	    "Trying force recovery of the IDC lock.\n");
4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779

	rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
	if (rval)
		return rval;

	if ((data & idc_lck_rcvry_stage_mask) > 0) {
		return QLA_SUCCESS;
	} else {
		data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
		rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    data);
		if (rval)
			return rval;

		msleep(200);

		rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    &data);
		if (rval)
			return rval;

		if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
			data &= (IDC_LOCK_RECOVERY_STAGE2 |
					~(idc_lck_rcvry_stage_mask));
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, data);
			if (rval)
				return rval;

			/* Forcefully perform IDC UnLock */
			rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
			    &data);
			if (rval)
				return rval;
			/* Clear lock-id by setting 0xff */
			rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    0xff);
			if (rval)
				return rval;
			/* Clear lock-recovery by setting 0x0 */
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, 0x0);
			if (rval)
				return rval;
		} else
			return QLA_SUCCESS;
	}

	return rval;
}

4780
static int
4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819
qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	uint32_t o_drv_lockid, n_drv_lockid;
	unsigned long lock_recovery_timeout;

	lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
retry_lockid:
	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
	if (rval)
		goto exit;

	/* MAX wait time before forcing IDC Lock recovery = 2 secs */
	if (time_after_eq(jiffies, lock_recovery_timeout)) {
		if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
			return QLA_SUCCESS;
		else
			return QLA_FUNCTION_FAILED;
	}

	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
	if (rval)
		goto exit;

	if (o_drv_lockid == n_drv_lockid) {
		qla83xx_wait_logic();
		goto retry_lockid;
	} else
		return QLA_SUCCESS;

exit:
	return rval;
}

void
qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_6;
	uint32_t data;
4820
	uint32_t lock_owner;
4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-lock implementation using driver-lock/lock-id remote registers */
retry_lock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
	    == QLA_SUCCESS) {
		if (data) {
			/* Setting lock-id to our function-number */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    ha->portnum);
		} else {
4832 4833
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    &lock_owner);
4834
			ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4835 4836
			    "Failed to acquire IDC lock, acquired by %d, "
			    "retrying...\n", lock_owner);
4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871

			/* Retry/Perform IDC-Lock recovery */
			if (qla83xx_idc_lock_recovery(base_vha)
			    == QLA_SUCCESS) {
				qla83xx_wait_logic();
				goto retry_lock;
			} else
				ql_log(ql_log_warn, base_vha, 0xb075,
				    "IDC Lock recovery FAILED.\n");
		}

	}

	return;

	/* XXX: IDC-lock implementation using access-control mbx */
retry_lock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
		    "Failed to acquire IDC lock. retrying...\n");
		/* Retry/Perform IDC-Lock recovery */
		if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
			qla83xx_wait_logic();
			goto retry_lock2;
		} else
			ql_log(ql_log_warn, base_vha, 0xb076,
			    "IDC Lock recovery FAILED.\n");
	}

	return;
}

void
qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
4872 4873 4874 4875
#if 0
	uint16_t options = (requester_id << 15) | BIT_7;
#endif
	uint16_t retry;
4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896
	uint32_t data;
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-unlock implementation using driver-unlock/lock-id
	 * remote registers
	 */
	retry = 0;
retry_unlock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
	    == QLA_SUCCESS) {
		if (data == ha->portnum) {
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
			/* Clearing lock-id by setting 0xff */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
		} else if (retry < 10) {
			/* SV: XXX: IDC unlock retrying needed here? */

			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4897
			    "Failed to release IDC lock, retrying=%d\n", retry);
4898 4899 4900 4901 4902 4903 4904
			goto retry_unlock;
		}
	} else if (retry < 10) {
		/* Retry for IDC-unlock */
		qla83xx_wait_logic();
		retry++;
		ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4905
		    "Failed to read drv-lockid, retrying=%d\n", retry);
4906 4907 4908 4909 4910
		goto retry_unlock;
	}

	return;

4911
#if 0
4912 4913 4914 4915 4916 4917 4918 4919 4920
	/* XXX: IDC-unlock implementation using access-control mbx */
	retry = 0;
retry_unlock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		if (retry < 10) {
			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4921
			    "Failed to release IDC lock, retrying=%d\n", retry);
4922 4923 4924 4925 4926
			goto retry_unlock2;
		}
	}

	return;
4927
#endif
4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987
}

int
__qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence |= (1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_set_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

int
__qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence &= ~(1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_clear_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

4988
static void
4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999
qla83xx_need_reset_handler(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_ack, drv_presence;
	unsigned long ack_timeout;

	/* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
	ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
	while (1) {
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5000
		if ((drv_ack & drv_presence) == drv_presence)
5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026
			break;

		if (time_after_eq(jiffies, ack_timeout)) {
			ql_log(ql_log_warn, vha, 0xb067,
			    "RESET ACK TIMEOUT! drv_presence=0x%x "
			    "drv_ack=0x%x\n", drv_presence, drv_ack);
			/*
			 * The function(s) which did not ack in time are forced
			 * to withdraw any further participation in the IDC
			 * reset.
			 */
			if (drv_ack != drv_presence)
				qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
				    drv_ack);
			break;
		}

		qla83xx_idc_unlock(vha, 0);
		msleep(1000);
		qla83xx_idc_lock(vha, 0);
	}

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
	ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
}

5027
static int
5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160
qla83xx_device_bootstrap(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	uint32_t idc_control;

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
	ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");

	/* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
	__qla83xx_get_idc_control(vha, &idc_control);
	idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
	__qla83xx_set_idc_control(vha, 0);

	qla83xx_idc_unlock(vha, 0);
	rval = qla83xx_restart_nic_firmware(vha);
	qla83xx_idc_lock(vha, 0);

	if (rval != QLA_SUCCESS) {
		ql_log(ql_log_fatal, vha, 0xb06a,
		    "Failed to restart NIC f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
	} else {
		ql_dbg(ql_dbg_p3p, vha, 0xb06c,
		    "Success in restarting nic f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
		ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
	}

	return rval;
}

/* Assumes idc_lock always held on entry */
int
qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
{
	struct qla_hw_data *ha = base_vha->hw;
	int rval = QLA_SUCCESS;
	unsigned long dev_init_timeout;
	uint32_t dev_state;

	/* Wait for MAX-INIT-TIMEOUT for the device to go ready */
	dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);

	while (1) {

		if (time_after_eq(jiffies, dev_init_timeout)) {
			ql_log(ql_log_warn, base_vha, 0xb06e,
			    "Initialization TIMEOUT!\n");
			/* Init timeout. Disable further NIC Core
			 * communication.
			 */
			qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
				QLA8XXX_DEV_FAILED);
			ql_log(ql_log_info, base_vha, 0xb06f,
			    "HW State: FAILED.\n");
		}

		qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
		switch (dev_state) {
		case QLA8XXX_DEV_READY:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
			    "Reset_owner reset by 0x%x.\n",
			    ha->portnum);
			goto exit;
		case QLA8XXX_DEV_COLD:
			if (ha->flags.nic_core_reset_owner)
				rval = qla83xx_device_bootstrap(base_vha);
			else {
			/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			break;
		case QLA8XXX_DEV_INITIALIZING:
			/* Wait for AEN to change device-state */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_NEED_RESET:
			if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
				qla83xx_need_reset_handler(base_vha);
			else {
				/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			/* reset timeout value after need reset handler */
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_NEED_QUIESCENT:
			/* XXX: DEBUG for now */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_QUIESCENT:
			/* XXX: DEBUG for now */
			if (ha->flags.quiesce_owner)
				goto exit;

			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_FAILED:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			__qla83xx_clear_drv_presence(base_vha);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		case QLA8XXX_BAD_VALUE:
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		default:
			ql_log(ql_log_warn, base_vha, 0xb071,
5161
			    "Unknown Device State: %x.\n", dev_state);
5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		}
	}

exit:
	return rval;
}

5174 5175 5176 5177 5178 5179 5180 5181
void
qla2x00_disable_board_on_pci_error(struct work_struct *work)
{
	struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
	    board_disable);
	struct pci_dev *pdev = ha->pdev;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

5182 5183 5184 5185 5186 5187
	/* if UNLOAD flag is already set, then continue unload,
	 * where it was set first.
	 */
	if (test_bit(UNLOADING, &base_vha->dpc_flags))
		return;

5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220
	ql_log(ql_log_warn, base_vha, 0x015b,
	    "Disabling adapter.\n");

	set_bit(UNLOADING, &base_vha->dpc_flags);

	qla2x00_delete_all_vps(ha, base_vha);

	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

	qla2x00_dfs_remove(base_vha);

	qla84xx_put_chip(base_vha);

	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

	qla2x00_destroy_deferred_work(ha);

	/*
	 * Do not try to stop beacon blink as it will issue a mailbox
	 * command.
	 */
	qla2x00_free_sysfs_attr(base_vha, false);

	fc_remove_host(base_vha->host);

	scsi_remove_host(base_vha->host);

	base_vha->flags.init_done = 0;
	qla25xx_delete_queues(base_vha);
	qla2x00_free_fcports(base_vha);
5221
	qla2x00_free_irqs(base_vha);
5222 5223 5224 5225 5226 5227 5228 5229 5230 5231
	qla2x00_mem_free(ha);
	qla82xx_md_free(base_vha);
	qla2x00_free_queues(ha);

	qla2x00_unmap_iobases(ha);

	pci_release_selected_regions(ha->pdev, ha->bars);
	pci_disable_pcie_error_reporting(pdev);
	pci_disable_device(pdev);

5232 5233 5234
	/*
	 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
	 */
5235 5236
}

L
Linus Torvalds 已提交
5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252
/**************************************************************************
* qla2x00_do_dpc
*   This kernel thread is a task that is schedule by the interrupt handler
*   to perform the background processing for interrupts.
*
* Notes:
* This task always run in the context of a kernel thread.  It
* is kick-off by the driver's detect code and starts up
* up one per adapter. It immediately goes to sleep and waits for
* some fibre event.  When either the interrupt handler or
* the timer routine detects a event it will one of the task
* bits then wake us up.
**************************************************************************/
static int
qla2x00_do_dpc(void *data)
{
5253 5254
	scsi_qla_host_t *base_vha;
	struct qla_hw_data *ha;
5255 5256
	uint32_t online;
	struct qla_qpair *qpair;
L
Linus Torvalds 已提交
5257

5258 5259
	ha = (struct qla_hw_data *)data;
	base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
5260

5261
	set_user_nice(current, MIN_NICE);
L
Linus Torvalds 已提交
5262

5263
	set_current_state(TASK_INTERRUPTIBLE);
5264
	while (!kthread_should_stop()) {
5265 5266
		ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
		    "DPC handler sleeping.\n");
L
Linus Torvalds 已提交
5267

5268
		schedule();
L
Linus Torvalds 已提交
5269

5270 5271
		if (!base_vha->flags.init_done || ha->flags.mbox_busy)
			goto end_loop;
L
Linus Torvalds 已提交
5272

5273
		if (ha->flags.eeh_busy) {
5274 5275
			ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
			    "eeh_busy=%d.\n", ha->flags.eeh_busy);
5276
			goto end_loop;
5277 5278
		}

L
Linus Torvalds 已提交
5279 5280
		ha->dpc_active = 1;

5281 5282 5283
		ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
		    "DPC handler waking up, dpc_flags=0x%lx.\n",
		    base_vha->dpc_flags);
L
Linus Torvalds 已提交
5284

5285 5286 5287
		if (test_bit(UNLOADING, &base_vha->dpc_flags))
			break;

5288
		qla2x00_do_work(base_vha);
5289

5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316
		if (IS_P3P_TYPE(ha)) {
			if (IS_QLA8044(ha)) {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla8044_idc_lock(ha);
					qla8044_wr_direct(base_vha,
						QLA8044_CRB_DEV_STATE_INDEX,
						QLA8XXX_DEV_FAILED);
					qla8044_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x4004,
						"HW State: FAILED.\n");
					qla8044_device_state_handler(base_vha);
					continue;
				}

			} else {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla82xx_idc_lock(ha);
					qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
						QLA8XXX_DEV_FAILED);
					qla82xx_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x0151,
						"HW State: FAILED.\n");
					qla82xx_device_state_handler(base_vha);
					continue;
				}
5317 5318 5319 5320 5321
			}

			if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
				&base_vha->dpc_flags)) {

5322 5323
				ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
				    "FCoE context reset scheduled.\n");
5324 5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336
				if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
					&base_vha->dpc_flags))) {
					if (qla82xx_fcoe_ctx_reset(base_vha)) {
						/* FCoE-ctx reset failed.
						 * Escalate to chip-reset
						 */
						set_bit(ISP_ABORT_NEEDED,
							&base_vha->dpc_flags);
					}
					clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
				}

5337 5338
				ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
				    "FCoE context reset end.\n");
5339
			}
5340 5341 5342 5343 5344 5345 5346 5347
		} else if (IS_QLAFX00(ha)) {
			if (test_and_clear_bit(ISP_UNRECOVERABLE,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
				    "Firmware Reset Recovery\n");
				if (qlafx00_reset_initialize(base_vha)) {
					/* Failed. Abort isp later. */
					if (!test_bit(UNLOADING,
5348
					    &base_vha->dpc_flags)) {
5349 5350 5351 5352 5353
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
						ql_dbg(ql_dbg_dpc, base_vha,
						    0x4021,
						    "Reset Recovery Failed\n");
5354
					}
5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372
				}
			}

			if (test_and_clear_bit(FX00_TARGET_SCAN,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
				    "ISPFx00 Target Scan scheduled\n");
				if (qlafx00_rescan_isp(base_vha)) {
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
					ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
					    "ISPFx00 Target Scan Failed\n");
				}
				ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
				    "ISPFx00 Target Scan End\n");
			}
5373 5374 5375 5376 5377 5378 5379 5380
			if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
				    "ISPFx00 Host Info resend scheduled\n");
				qlafx00_fx_disc(base_vha,
				    &base_vha->hw->mr.fcport,
				    FXDISC_REG_HOST_INFO);
			}
5381 5382
		}

5383 5384
		if (test_and_clear_bit(ISP_ABORT_NEEDED,
						&base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
5385

5386 5387
			ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
			    "ISP abort scheduled.\n");
L
Linus Torvalds 已提交
5388
			if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5389
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
5390

5391
				if (ha->isp_ops->abort_isp(base_vha)) {
L
Linus Torvalds 已提交
5392 5393
					/* failed. retry later */
					set_bit(ISP_ABORT_NEEDED,
5394
					    &base_vha->dpc_flags);
5395
				}
5396 5397
				clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
5398 5399
			}

5400 5401
			ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
			    "ISP abort end.\n");
L
Linus Torvalds 已提交
5402 5403
		}

5404 5405
		if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
		    &base_vha->dpc_flags)) {
5406
			qla2x00_update_fcports(base_vha);
5407
		}
5408

5409 5410 5411 5412 5413 5414 5415 5416 5417 5418
		if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
			int ret;
			ret = qla2x00_send_change_request(base_vha, 0x3, 0);
			if (ret != QLA_SUCCESS)
				ql_log(ql_log_warn, base_vha, 0x121,
				    "Failed to enable receiving of RSCN "
				    "requests: 0x%x.\n", ret);
			clear_bit(SCR_PENDING, &base_vha->dpc_flags);
		}

5419 5420 5421
		if (IS_QLAFX00(ha))
			goto loop_resync_check;

5422
		if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5423 5424
			ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
			    "Quiescence mode scheduled.\n");
5425 5426 5427 5428 5429
			if (IS_P3P_TYPE(ha)) {
				if (IS_QLA82XX(ha))
					qla82xx_device_state_handler(base_vha);
				if (IS_QLA8044(ha))
					qla8044_device_state_handler(base_vha);
5430 5431 5432 5433
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				if (!ha->flags.quiesce_owner) {
					qla2x00_perform_loop_resync(base_vha);
5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444
					if (IS_QLA82XX(ha)) {
						qla82xx_idc_lock(ha);
						qla82xx_clear_qsnt_ready(
						    base_vha);
						qla82xx_idc_unlock(ha);
					} else if (IS_QLA8044(ha)) {
						qla8044_idc_lock(ha);
						qla8044_clear_qsnt_ready(
						    base_vha);
						qla8044_idc_unlock(ha);
					}
5445 5446 5447 5448 5449
				}
			} else {
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				qla2x00_quiesce_io(base_vha);
5450
			}
5451 5452
			ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
			    "Quiescence mode end.\n");
5453 5454
		}

5455
		if (test_and_clear_bit(RESET_MARKER_NEEDED,
5456
				&base_vha->dpc_flags) &&
5457
		    (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
L
Linus Torvalds 已提交
5458

5459 5460
			ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
			    "Reset marker scheduled.\n");
5461 5462
			qla2x00_rst_aen(base_vha);
			clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5463 5464
			ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
			    "Reset marker end.\n");
L
Linus Torvalds 已提交
5465 5466 5467
		}

		/* Retry each device up to login retry count */
5468 5469 5470 5471
		if ((test_and_clear_bit(RELOGIN_NEEDED,
						&base_vha->dpc_flags)) &&
		    !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
L
Linus Torvalds 已提交
5472

5473 5474
			ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
			    "Relogin scheduled.\n");
5475
			qla2x00_relogin(base_vha);
5476 5477
			ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
			    "Relogin end.\n");
L
Linus Torvalds 已提交
5478
		}
5479
loop_resync_check:
5480
		if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5481
		    &base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
5482

5483 5484
			ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
			    "Loop resync scheduled.\n");
L
Linus Torvalds 已提交
5485 5486

			if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5487
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
5488

5489
				qla2x00_loop_resync(base_vha);
L
Linus Torvalds 已提交
5490

5491 5492
				clear_bit(LOOP_RESYNC_ACTIVE,
						&base_vha->dpc_flags);
L
Linus Torvalds 已提交
5493 5494
			}

5495 5496
			ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
			    "Loop resync end.\n");
L
Linus Torvalds 已提交
5497 5498
		}

5499 5500 5501
		if (IS_QLAFX00(ha))
			goto intr_on_check;

5502 5503 5504 5505
		if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) == LOOP_READY) {
			clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
			qla2xxx_flash_npiv_conf(base_vha);
5506 5507
		}

5508
intr_on_check:
L
Linus Torvalds 已提交
5509
		if (!ha->interrupts_on)
5510
			ha->isp_ops->enable_intrs(ha);
L
Linus Torvalds 已提交
5511

5512
		if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5513 5514 5515 5516
					&base_vha->dpc_flags)) {
			if (ha->beacon_blink_led == 1)
				ha->isp_ops->beacon_blink(base_vha);
		}
5517

5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533
		/* qpair online check */
		if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
		    &base_vha->dpc_flags)) {
			if (ha->flags.eeh_busy ||
			    ha->flags.pci_channel_io_perm_failure)
				online = 0;
			else
				online = 1;

			mutex_lock(&ha->mq_lock);
			list_for_each_entry(qpair, &base_vha->qp_list,
			    qp_list_elem)
			qpair->online = online;
			mutex_unlock(&ha->mq_lock);
		}

5534 5535
		if (!IS_QLAFX00(ha))
			qla2x00_do_dpc_all_vps(base_vha);
5536

L
Linus Torvalds 已提交
5537
		ha->dpc_active = 0;
5538
end_loop:
5539
		set_current_state(TASK_INTERRUPTIBLE);
L
Linus Torvalds 已提交
5540
	} /* End of while(1) */
5541
	__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
5542

5543 5544
	ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
	    "DPC handler exiting.\n");
L
Linus Torvalds 已提交
5545 5546 5547 5548 5549 5550

	/*
	 * Make sure that nobody tries to wake us up again.
	 */
	ha->dpc_active = 0;

5551 5552 5553
	/* Cleanup any residual CTX SRBs. */
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

5554 5555 5556 5557
	return 0;
}

void
5558
qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5559
{
5560
	struct qla_hw_data *ha = vha->hw;
5561 5562
	struct task_struct *t = ha->dpc_thread;

5563
	if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5564
		wake_up_process(t);
L
Linus Torvalds 已提交
5565 5566 5567 5568 5569 5570 5571 5572 5573 5574
}

/*
*  qla2x00_rst_aen
*      Processes asynchronous reset.
*
* Input:
*      ha  = adapter block pointer.
*/
static void
5575
qla2x00_rst_aen(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
5576
{
5577 5578 5579
	if (vha->flags.online && !vha->flags.reset_active &&
	    !atomic_read(&vha->loop_down_timer) &&
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
L
Linus Torvalds 已提交
5580
		do {
5581
			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
5582 5583 5584 5585 5586

			/*
			 * Issue marker command only when we are going to start
			 * the I/O.
			 */
5587 5588 5589
			vha->marker_needed = 1;
		} while (!atomic_read(&vha->loop_down_timer) &&
		    (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
L
Linus Torvalds 已提交
5590 5591 5592 5593 5594 5595 5596 5597 5598 5599 5600
	}
}

/**************************************************************************
*   qla2x00_timer
*
* Description:
*   One second timer
*
* Context: Interrupt
***************************************************************************/
5601
void
5602
qla2x00_timer(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
5603 5604 5605 5606 5607
{
	unsigned long	cpu_flags = 0;
	int		start_dpc = 0;
	int		index;
	srb_t		*sp;
5608
	uint16_t        w;
5609
	struct qla_hw_data *ha = vha->hw;
5610
	struct req_que *req;
5611

5612
	if (ha->flags.eeh_busy) {
5613 5614 5615
		ql_dbg(ql_dbg_timer, vha, 0x6000,
		    "EEH = %d, restarting timer.\n",
		    ha->flags.eeh_busy);
5616 5617 5618 5619
		qla2x00_restart_timer(vha, WATCH_INTERVAL);
		return;
	}

5620 5621 5622 5623 5624
	/*
	 * Hardware read to raise pending EEH errors during mailbox waits. If
	 * the read returns -1 then disable the board.
	 */
	if (!pci_channel_offline(ha->pdev)) {
5625
		pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5626
		qla2x00_check_reg16_for_disconnect(vha, w);
5627
	}
L
Linus Torvalds 已提交
5628

5629
	/* Make sure qla82xx_watchdog is run only for physical port */
5630
	if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5631 5632
		if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
			start_dpc++;
5633 5634 5635 5636
		if (IS_QLA82XX(ha))
			qla82xx_watchdog(vha);
		else if (IS_QLA8044(ha))
			qla8044_watchdog(vha);
5637 5638
	}

5639 5640 5641
	if (!vha->vp_idx && IS_QLAFX00(ha))
		qlafx00_timer_routine(vha);

L
Linus Torvalds 已提交
5642
	/* Loop down handler. */
5643
	if (atomic_read(&vha->loop_down_timer) > 0 &&
5644 5645
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
	    !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5646
		&& vha->flags.online) {
L
Linus Torvalds 已提交
5647

5648 5649
		if (atomic_read(&vha->loop_down_timer) ==
		    vha->loop_down_abort_time) {
L
Linus Torvalds 已提交
5650

5651 5652
			ql_log(ql_log_info, vha, 0x6008,
			    "Loop down - aborting the queues before time expires.\n");
L
Linus Torvalds 已提交
5653

5654 5655
			if (!IS_QLA2100(ha) && vha->link_down_timeout)
				atomic_set(&vha->loop_state, LOOP_DEAD);
L
Linus Torvalds 已提交
5656

5657 5658 5659 5660
			/*
			 * Schedule an ISP abort to return any FCP2-device
			 * commands.
			 */
5661
			/* NPIV - scan physical port only */
5662
			if (!vha->vp_idx) {
5663 5664
				spin_lock_irqsave(&ha->hardware_lock,
				    cpu_flags);
5665
				req = ha->req_q_map[0];
5666
				for (index = 1;
5667
				    index < req->num_outstanding_cmds;
5668 5669 5670
				    index++) {
					fc_port_t *sfcp;

5671
					sp = req->outstanding_cmds[index];
5672 5673
					if (!sp)
						continue;
5674
					if (sp->type != SRB_SCSI_CMD)
5675
						continue;
5676
					sfcp = sp->fcport;
5677
					if (!(sfcp->flags & FCF_FCP2_DEVICE))
5678
						continue;
5679

5680 5681 5682 5683 5684
					if (IS_QLA82XX(ha))
						set_bit(FCOE_CTX_RESET_NEEDED,
							&vha->dpc_flags);
					else
						set_bit(ISP_ABORT_NEEDED,
5685
							&vha->dpc_flags);
5686 5687 5688
					break;
				}
				spin_unlock_irqrestore(&ha->hardware_lock,
5689
								cpu_flags);
L
Linus Torvalds 已提交
5690 5691 5692 5693 5694
			}
			start_dpc++;
		}

		/* if the loop has been down for 4 minutes, reinit adapter */
5695
		if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5696
			if (!(vha->device_flags & DFLG_NO_CABLE)) {
5697
				ql_log(ql_log_warn, vha, 0x6009,
L
Linus Torvalds 已提交
5698 5699
				    "Loop down - aborting ISP.\n");

5700 5701 5702 5703 5704 5705
				if (IS_QLA82XX(ha))
					set_bit(FCOE_CTX_RESET_NEEDED,
						&vha->dpc_flags);
				else
					set_bit(ISP_ABORT_NEEDED,
						&vha->dpc_flags);
L
Linus Torvalds 已提交
5706 5707
			}
		}
5708 5709 5710
		ql_dbg(ql_dbg_timer, vha, 0x600a,
		    "Loop down - seconds remaining %d.\n",
		    atomic_read(&vha->loop_down_timer));
L
Linus Torvalds 已提交
5711
	}
5712 5713
	/* Check if beacon LED needs to be blinked for physical host only */
	if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5714
		/* There is no beacon_blink function for ISP82xx */
5715
		if (!IS_P3P_TYPE(ha)) {
5716 5717 5718
			set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
			start_dpc++;
		}
5719 5720
	}

5721
	/* Process any deferred work. */
5722
	if (!list_empty(&vha->work_list))
5723 5724
		start_dpc++;

L
Linus Torvalds 已提交
5725
	/* Schedule the DPC routine if needed */
5726 5727 5728
	if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
	    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
	    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
L
Linus Torvalds 已提交
5729
	    start_dpc ||
5730 5731
	    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
	    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5732 5733
	    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
	    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5734
	    test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5735
	    test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5736 5737 5738 5739 5740 5741 5742 5743 5744 5745 5746 5747
		ql_dbg(ql_dbg_timer, vha, 0x600b,
		    "isp_abort_needed=%d loop_resync_needed=%d "
		    "fcport_update_needed=%d start_dpc=%d "
		    "reset_marker_needed=%d",
		    test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
		    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
		    start_dpc,
		    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
		ql_dbg(ql_dbg_timer, vha, 0x600c,
		    "beacon_blink_needed=%d isp_unrecoverable=%d "
		    "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5748
		    "relogin_needed=%d.\n",
5749 5750 5751 5752
		    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
		    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
		    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
		    test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5753
		    test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5754
		qla2xxx_wake_dpc(vha);
5755
	}
L
Linus Torvalds 已提交
5756

5757
	qla2x00_restart_timer(vha, WATCH_INTERVAL);
L
Linus Torvalds 已提交
5758 5759
}

5760 5761
/* Firmware interface routines. */

5762
#define FW_BLOBS	11
5763 5764 5765 5766
#define FW_ISP21XX	0
#define FW_ISP22XX	1
#define FW_ISP2300	2
#define FW_ISP2322	3
5767
#define FW_ISP24XX	4
5768
#define FW_ISP25XX	5
5769
#define FW_ISP81XX	6
5770
#define FW_ISP82XX	7
5771 5772
#define FW_ISP2031	8
#define FW_ISP8031	9
5773
#define FW_ISP27XX	10
5774

5775 5776 5777 5778 5779
#define FW_FILE_ISP21XX	"ql2100_fw.bin"
#define FW_FILE_ISP22XX	"ql2200_fw.bin"
#define FW_FILE_ISP2300	"ql2300_fw.bin"
#define FW_FILE_ISP2322	"ql2322_fw.bin"
#define FW_FILE_ISP24XX	"ql2400_fw.bin"
5780
#define FW_FILE_ISP25XX	"ql2500_fw.bin"
5781
#define FW_FILE_ISP81XX	"ql8100_fw.bin"
5782
#define FW_FILE_ISP82XX	"ql8200_fw.bin"
5783 5784
#define FW_FILE_ISP2031	"ql2600_fw.bin"
#define FW_FILE_ISP8031	"ql8300_fw.bin"
5785
#define FW_FILE_ISP27XX	"ql2700_fw.bin"
5786

5787

5788
static DEFINE_MUTEX(qla_fw_lock);
5789 5790

static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5791 5792 5793 5794 5795
	{ .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
	{ .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
	{ .name = FW_FILE_ISP24XX, },
5796
	{ .name = FW_FILE_ISP25XX, },
5797
	{ .name = FW_FILE_ISP81XX, },
5798
	{ .name = FW_FILE_ISP82XX, },
5799 5800
	{ .name = FW_FILE_ISP2031, },
	{ .name = FW_FILE_ISP8031, },
5801
	{ .name = FW_FILE_ISP27XX, },
5802 5803 5804
};

struct fw_blob *
5805
qla2x00_request_firmware(scsi_qla_host_t *vha)
5806
{
5807
	struct qla_hw_data *ha = vha->hw;
5808 5809 5810 5811 5812 5813
	struct fw_blob *blob;

	if (IS_QLA2100(ha)) {
		blob = &qla_fw_blobs[FW_ISP21XX];
	} else if (IS_QLA2200(ha)) {
		blob = &qla_fw_blobs[FW_ISP22XX];
5814
	} else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5815
		blob = &qla_fw_blobs[FW_ISP2300];
5816
	} else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5817
		blob = &qla_fw_blobs[FW_ISP2322];
5818
	} else if (IS_QLA24XX_TYPE(ha)) {
5819
		blob = &qla_fw_blobs[FW_ISP24XX];
5820 5821
	} else if (IS_QLA25XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP25XX];
5822 5823
	} else if (IS_QLA81XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP81XX];
5824 5825
	} else if (IS_QLA82XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP82XX];
5826 5827 5828 5829
	} else if (IS_QLA2031(ha)) {
		blob = &qla_fw_blobs[FW_ISP2031];
	} else if (IS_QLA8031(ha)) {
		blob = &qla_fw_blobs[FW_ISP8031];
5830 5831
	} else if (IS_QLA27XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP27XX];
5832 5833
	} else {
		return NULL;
5834 5835
	}

5836
	mutex_lock(&qla_fw_lock);
5837 5838 5839 5840
	if (blob->fw)
		goto out;

	if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5841 5842
		ql_log(ql_log_warn, vha, 0x0063,
		    "Failed to load firmware image (%s).\n", blob->name);
5843 5844 5845 5846 5847 5848
		blob->fw = NULL;
		blob = NULL;
		goto out;
	}

out:
5849
	mutex_unlock(&qla_fw_lock);
5850 5851 5852 5853 5854 5855 5856 5857
	return blob;
}

static void
qla2x00_release_firmware(void)
{
	int idx;

5858
	mutex_lock(&qla_fw_lock);
5859
	for (idx = 0; idx < FW_BLOBS; idx++)
5860
		release_firmware(qla_fw_blobs[idx].fw);
5861
	mutex_unlock(&qla_fw_lock);
5862 5863
}

5864 5865 5866
static pci_ers_result_t
qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
5867 5868 5869
	scsi_qla_host_t *vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = vha->hw;

5870 5871
	ql_dbg(ql_dbg_aer, vha, 0x9000,
	    "PCI error detected, state %x.\n", state);
5872

5873 5874
	switch (state) {
	case pci_channel_io_normal:
5875
		ha->flags.eeh_busy = 0;
5876 5877 5878 5879
		if (ql2xmqsupport) {
			set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
			qla2xxx_wake_dpc(vha);
		}
5880 5881
		return PCI_ERS_RESULT_CAN_RECOVER;
	case pci_channel_io_frozen:
5882
		ha->flags.eeh_busy = 1;
5883 5884
		/* For ISP82XX complete any pending mailbox cmd */
		if (IS_QLA82XX(ha)) {
5885
			ha->flags.isp82xx_fw_hung = 1;
5886 5887
			ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
			qla82xx_clear_pending_mbx(vha);
5888
		}
5889
		qla2x00_free_irqs(vha);
5890
		pci_disable_device(pdev);
5891 5892
		/* Return back all IOs */
		qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5893 5894 5895 5896
		if (ql2xmqsupport) {
			set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
			qla2xxx_wake_dpc(vha);
		}
5897 5898
		return PCI_ERS_RESULT_NEED_RESET;
	case pci_channel_io_perm_failure:
5899 5900
		ha->flags.pci_channel_io_perm_failure = 1;
		qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5901 5902 5903 5904
		if (ql2xmqsupport) {
			set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
			qla2xxx_wake_dpc(vha);
		}
5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915
		return PCI_ERS_RESULT_DISCONNECT;
	}
	return PCI_ERS_RESULT_NEED_RESET;
}

static pci_ers_result_t
qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
{
	int risc_paused = 0;
	uint32_t stat;
	unsigned long flags;
5916 5917
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5918 5919 5920
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
	struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;

5921 5922 5923
	if (IS_QLA82XX(ha))
		return PCI_ERS_RESULT_RECOVERED;

5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940
	spin_lock_irqsave(&ha->hardware_lock, flags);
	if (IS_QLA2100(ha) || IS_QLA2200(ha)){
		stat = RD_REG_DWORD(&reg->hccr);
		if (stat & HCCR_RISC_PAUSE)
			risc_paused = 1;
	} else if (IS_QLA23XX(ha)) {
		stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
		if (stat & HSR_RISC_PAUSED)
			risc_paused = 1;
	} else if (IS_FWI2_CAPABLE(ha)) {
		stat = RD_REG_DWORD(&reg24->host_status);
		if (stat & HSRX_RISC_PAUSED)
			risc_paused = 1;
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

	if (risc_paused) {
5941 5942
		ql_log(ql_log_info, base_vha, 0x9003,
		    "RISC paused -- mmio_enabled, Dumping firmware.\n");
5943
		ha->isp_ops->fw_dump(base_vha, 0);
5944 5945 5946 5947 5948 5949

		return PCI_ERS_RESULT_NEED_RESET;
	} else
		return PCI_ERS_RESULT_RECOVERED;
}

5950 5951
static uint32_t
qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5952 5953 5954 5955 5956 5957 5958
{
	uint32_t rval = QLA_FUNCTION_FAILED;
	uint32_t drv_active = 0;
	struct qla_hw_data *ha = base_vha->hw;
	int fn;
	struct pci_dev *other_pdev = NULL;

5959 5960
	ql_dbg(ql_dbg_aer, base_vha, 0x9006,
	    "Entered %s.\n", __func__);
5961 5962 5963 5964 5965 5966 5967 5968 5969 5970 5971 5972 5973

	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	if (base_vha->flags.online) {
		/* Abort all outstanding commands,
		 * so as to be requeued later */
		qla2x00_abort_isp_cleanup(base_vha);
	}


	fn = PCI_FUNC(ha->pdev->devfn);
	while (fn > 0) {
		fn--;
5974 5975
		ql_dbg(ql_dbg_aer, base_vha, 0x9007,
		    "Finding pci device at function = 0x%x.\n", fn);
5976 5977 5978 5979 5980 5981 5982 5983
		other_pdev =
		    pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
		    ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
		    fn));

		if (!other_pdev)
			continue;
		if (atomic_read(&other_pdev->enable_cnt)) {
5984 5985 5986
			ql_dbg(ql_dbg_aer, base_vha, 0x9008,
			    "Found PCI func available and enable at 0x%x.\n",
			    fn);
5987 5988 5989 5990 5991 5992 5993 5994
			pci_dev_put(other_pdev);
			break;
		}
		pci_dev_put(other_pdev);
	}

	if (!fn) {
		/* Reset owner */
5995 5996 5997
		ql_dbg(ql_dbg_aer, base_vha, 0x9009,
		    "This devfn is reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5998 5999 6000
		qla82xx_idc_lock(ha);

		qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6001
		    QLA8XXX_DEV_INITIALIZING);
6002 6003 6004 6005 6006

		qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
		    QLA82XX_IDC_VERSION);

		drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6007 6008
		ql_dbg(ql_dbg_aer, base_vha, 0x900a,
		    "drv_active = 0x%x.\n", drv_active);
6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020

		qla82xx_idc_unlock(ha);
		/* Reset if device is not already reset
		 * drv_active would be 0 if a reset has already been done
		 */
		if (drv_active)
			rval = qla82xx_start_firmware(base_vha);
		else
			rval = QLA_SUCCESS;
		qla82xx_idc_lock(ha);

		if (rval != QLA_SUCCESS) {
6021 6022
			ql_log(ql_log_info, base_vha, 0x900b,
			    "HW State: FAILED.\n");
6023 6024
			qla82xx_clear_drv_active(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6025
			    QLA8XXX_DEV_FAILED);
6026
		} else {
6027 6028
			ql_log(ql_log_info, base_vha, 0x900c,
			    "HW State: READY.\n");
6029
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6030
			    QLA8XXX_DEV_READY);
6031
			qla82xx_idc_unlock(ha);
6032
			ha->flags.isp82xx_fw_hung = 0;
6033 6034 6035 6036 6037 6038 6039 6040
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			/* Clear driver state register */
			qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
			qla82xx_set_drv_active(base_vha);
		}
		qla82xx_idc_unlock(ha);
	} else {
6041 6042 6043
		ql_dbg(ql_dbg_aer, base_vha, 0x900d,
		    "This devfn is not reset owner = 0x%x.\n",
		    ha->pdev->devfn);
6044
		if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6045
		    QLA8XXX_DEV_READY)) {
6046
			ha->flags.isp82xx_fw_hung = 0;
6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			qla82xx_set_drv_active(base_vha);
			qla82xx_idc_unlock(ha);
		}
	}
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	return rval;
}

6058 6059 6060 6061
static pci_ers_result_t
qla2xxx_pci_slot_reset(struct pci_dev *pdev)
{
	pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6062 6063
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
6064 6065
	struct rsp_que *rsp;
	int rc, retries = 10;
6066

6067 6068
	ql_dbg(ql_dbg_aer, base_vha, 0x9004,
	    "Slot Reset.\n");
6069

6070 6071 6072 6073 6074 6075 6076 6077
	/* Workaround: qla2xxx driver which access hardware earlier
	 * needs error state to be pci_channel_io_online.
	 * Otherwise mailbox command timesout.
	 */
	pdev->error_state = pci_channel_io_normal;

	pci_restore_state(pdev);

6078 6079 6080 6081 6082
	/* pci_restore_state() clears the saved_state flag of the device
	 * save restored state which resets saved_state flag
	 */
	pci_save_state(pdev);

6083 6084 6085 6086
	if (ha->mem_only)
		rc = pci_enable_device_mem(pdev);
	else
		rc = pci_enable_device(pdev);
6087

6088
	if (rc) {
6089
		ql_log(ql_log_warn, base_vha, 0x9005,
6090
		    "Can't re-enable PCI device after reset.\n");
6091
		goto exit_slot_reset;
6092 6093
	}

6094 6095
	rsp = ha->rsp_q_map[0];
	if (qla2x00_request_irqs(ha, rsp))
6096
		goto exit_slot_reset;
6097

6098
	if (ha->isp_ops->pci_config(base_vha))
6099 6100 6101 6102 6103 6104 6105 6106 6107
		goto exit_slot_reset;

	if (IS_QLA82XX(ha)) {
		if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
			ret = PCI_ERS_RESULT_RECOVERED;
			goto exit_slot_reset;
		} else
			goto exit_slot_reset;
	}
6108

6109 6110
	while (ha->flags.mbox_busy && retries--)
		msleep(1000);
6111

6112
	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6113
	if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6114
		ret =  PCI_ERS_RESULT_RECOVERED;
6115
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6116

6117

6118
exit_slot_reset:
6119 6120
	ql_dbg(ql_dbg_aer, base_vha, 0x900e,
	    "slot_reset return %x.\n", ret);
6121

6122 6123 6124 6125 6126 6127
	return ret;
}

static void
qla2xxx_pci_resume(struct pci_dev *pdev)
{
6128 6129
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
6130 6131
	int ret;

6132 6133
	ql_dbg(ql_dbg_aer, base_vha, 0x900f,
	    "pci_resume.\n");
6134

6135
	ret = qla2x00_wait_for_hba_online(base_vha);
6136
	if (ret != QLA_SUCCESS) {
6137 6138
		ql_log(ql_log_fatal, base_vha, 0x9002,
		    "The device failed to resume I/O from slot/link_reset.\n");
6139
	}
6140

6141 6142
	pci_cleanup_aer_uncorrect_error_status(pdev);

6143
	ha->flags.eeh_busy = 0;
6144 6145
}

6146 6147 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 6171
static void
qla83xx_disable_laser(scsi_qla_host_t *vha)
{
	uint32_t reg, data, fn;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;

	/* pci func #/port # */
	ql_dbg(ql_dbg_init, vha, 0x004b,
	    "Disabling Laser for hba: %p\n", vha);

	fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
		(BIT_15|BIT_14|BIT_13|BIT_12));

	fn = (fn >> 12);

	if (fn & 1)
		reg = PORT_1_2031;
	else
		reg = PORT_0_2031;

	data = LASER_OFF_2031;

	qla83xx_wr_reg(vha, reg, data);
}

6172 6173 6174 6175 6176 6177 6178
static int qla2xxx_map_queues(struct Scsi_Host *shost)
{
	scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;

	return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
}

6179
static const struct pci_error_handlers qla2xxx_err_handler = {
6180 6181 6182 6183 6184 6185
	.error_detected = qla2xxx_pci_error_detected,
	.mmio_enabled = qla2xxx_pci_mmio_enabled,
	.slot_reset = qla2xxx_pci_slot_reset,
	.resume = qla2xxx_pci_resume,
};

6186
static struct pci_device_id qla2xxx_pci_tbl[] = {
6187 6188 6189 6190 6191 6192 6193 6194 6195
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6196
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6197 6198
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6199
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6200
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6201
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6202
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6203
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6204
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6205
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6206
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6207
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6208
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6209 6210 6211 6212
	{ 0 },
};
MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);

6213
static struct pci_driver qla2xxx_pci_driver = {
6214
	.name		= QLA2XXX_DRIVER_NAME,
6215 6216 6217
	.driver		= {
		.owner		= THIS_MODULE,
	},
6218
	.id_table	= qla2xxx_pci_tbl,
6219
	.probe		= qla2x00_probe_one,
A
Adrian Bunk 已提交
6220
	.remove		= qla2x00_remove_one,
6221
	.shutdown	= qla2x00_shutdown,
6222
	.err_handler	= &qla2xxx_err_handler,
6223 6224
};

6225
static const struct file_operations apidev_fops = {
6226
	.owner = THIS_MODULE,
6227
	.llseek = noop_llseek,
6228 6229
};

L
Linus Torvalds 已提交
6230 6231 6232 6233 6234 6235
/**
 * qla2x00_module_init - Module initialization.
 **/
static int __init
qla2x00_module_init(void)
{
6236 6237
	int ret = 0;

L
Linus Torvalds 已提交
6238
	/* Allocate cache for SRBs. */
6239
	srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6240
	    SLAB_HWCACHE_ALIGN, NULL);
L
Linus Torvalds 已提交
6241
	if (srb_cachep == NULL) {
6242 6243
		ql_log(ql_log_fatal, NULL, 0x0001,
		    "Unable to allocate SRB cache...Failing load!.\n");
L
Linus Torvalds 已提交
6244 6245 6246
		return -ENOMEM;
	}

6247 6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261
	/* Initialize target kmem_cache and mem_pools */
	ret = qlt_init();
	if (ret < 0) {
		kmem_cache_destroy(srb_cachep);
		return ret;
	} else if (ret > 0) {
		/*
		 * If initiator mode is explictly disabled by qlt_init(),
		 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
		 * performing scsi_scan_target() during LOOP UP event.
		 */
		qla2xxx_transport_functions.disable_target_scan = 1;
		qla2xxx_transport_vport_functions.disable_target_scan = 1;
	}

L
Linus Torvalds 已提交
6262 6263
	/* Derive version string. */
	strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6264
	if (ql2xextended_error_logging)
6265 6266
		strcat(qla2x00_version_str, "-debug");

6267 6268
	qla2xxx_transport_template =
	    fc_attach_transport(&qla2xxx_transport_functions);
6269 6270
	if (!qla2xxx_transport_template) {
		kmem_cache_destroy(srb_cachep);
6271 6272
		ql_log(ql_log_fatal, NULL, 0x0002,
		    "fc_attach_transport failed...Failing load!.\n");
6273
		qlt_exit();
L
Linus Torvalds 已提交
6274
		return -ENODEV;
6275
	}
6276 6277 6278

	apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
	if (apidev_major < 0) {
6279 6280
		ql_log(ql_log_fatal, NULL, 0x0003,
		    "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6281 6282
	}

6283 6284 6285 6286
	qla2xxx_transport_vport_template =
	    fc_attach_transport(&qla2xxx_transport_vport_functions);
	if (!qla2xxx_transport_vport_template) {
		kmem_cache_destroy(srb_cachep);
6287
		qlt_exit();
6288
		fc_release_transport(qla2xxx_transport_template);
6289 6290
		ql_log(ql_log_fatal, NULL, 0x0004,
		    "fc_attach_transport vport failed...Failing load!.\n");
L
Linus Torvalds 已提交
6291
		return -ENODEV;
6292
	}
6293 6294
	ql_log(ql_log_info, NULL, 0x0005,
	    "QLogic Fibre Channel HBA Driver: %s.\n",
6295
	    qla2x00_version_str);
6296
	ret = pci_register_driver(&qla2xxx_pci_driver);
6297 6298
	if (ret) {
		kmem_cache_destroy(srb_cachep);
6299
		qlt_exit();
6300
		fc_release_transport(qla2xxx_transport_template);
6301
		fc_release_transport(qla2xxx_transport_vport_template);
6302 6303 6304
		ql_log(ql_log_fatal, NULL, 0x0006,
		    "pci_register_driver failed...ret=%d Failing load!.\n",
		    ret);
6305 6306
	}
	return ret;
L
Linus Torvalds 已提交
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}

/**
 * qla2x00_module_exit - Module cleanup.
 **/
static void __exit
qla2x00_module_exit(void)
{
6315
	unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6316
	pci_unregister_driver(&qla2xxx_pci_driver);
6317
	qla2x00_release_firmware();
6318
	kmem_cache_destroy(srb_cachep);
6319
	qlt_exit();
6320 6321
	if (ctx_cachep)
		kmem_cache_destroy(ctx_cachep);
L
Linus Torvalds 已提交
6322
	fc_release_transport(qla2xxx_transport_template);
6323
	fc_release_transport(qla2xxx_transport_vport_template);
L
Linus Torvalds 已提交
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}

module_init(qla2x00_module_init);
module_exit(qla2x00_module_exit);

MODULE_AUTHOR("QLogic Corporation");
MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(QLA2XXX_VERSION);
6333 6334 6335 6336 6337
MODULE_FIRMWARE(FW_FILE_ISP21XX);
MODULE_FIRMWARE(FW_FILE_ISP22XX);
MODULE_FIRMWARE(FW_FILE_ISP2300);
MODULE_FIRMWARE(FW_FILE_ISP2322);
MODULE_FIRMWARE(FW_FILE_ISP24XX);
6338
MODULE_FIRMWARE(FW_FILE_ISP25XX);