qla_os.c 163.1 KB
Newer Older
L
Linus Torvalds 已提交
1
/*
A
Andrew Vasquez 已提交
2
 * QLogic Fibre Channel HBA Driver
3
 * Copyright (c)  2003-2014 QLogic Corporation
L
Linus Torvalds 已提交
4
 *
A
Andrew Vasquez 已提交
5
 * See LICENSE.qla2xxx for copyright and licensing details.
L
Linus Torvalds 已提交
6 7 8 9 10 11
 */
#include "qla_def.h"

#include <linux/moduleparam.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
12
#include <linux/kthread.h>
13
#include <linux/mutex.h>
14
#include <linux/kobject.h>
15
#include <linux/slab.h>
L
Linus Torvalds 已提交
16 17 18 19 20
#include <scsi/scsi_tcq.h>
#include <scsi/scsicam.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_transport_fc.h>

21 22
#include "qla_target.h"

L
Linus Torvalds 已提交
23 24 25 26 27
/*
 * Driver version
 */
char qla2x00_version_str[40];

28 29
static int apidev_major;

L
Linus Torvalds 已提交
30 31 32
/*
 * SRB allocation cache
 */
33
static struct kmem_cache *srb_cachep;
L
Linus Torvalds 已提交
34

35 36 37 38
/*
 * CT6 CTX allocation cache
 */
static struct kmem_cache *ctx_cachep;
39 40 41 42
/*
 * error level for logging
 */
int ql_errlev = ql_log_all;
43

44
static int ql2xenableclass2;
45 46 47 48 49
module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
MODULE_PARM_DESC(ql2xenableclass2,
		"Specify if Class 2 operations are supported from the very "
		"beginning. Default is 0 - class 2 not supported.");

50

L
Linus Torvalds 已提交
51
int ql2xlogintimeout = 20;
52
module_param(ql2xlogintimeout, int, S_IRUGO);
L
Linus Torvalds 已提交
53 54 55
MODULE_PARM_DESC(ql2xlogintimeout,
		"Login timeout value in seconds.");

56
int qlport_down_retry;
57
module_param(qlport_down_retry, int, S_IRUGO);
L
Linus Torvalds 已提交
58
MODULE_PARM_DESC(qlport_down_retry,
59
		"Maximum number of command retries to a port that returns "
L
Linus Torvalds 已提交
60 61 62 63 64 65
		"a PORT-DOWN status.");

int ql2xplogiabsentdevice;
module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xplogiabsentdevice,
		"Option to enable PLOGI to devices that are not present after "
66
		"a Fabric scan.  This is needed for several broken switches. "
L
Linus Torvalds 已提交
67 68 69
		"Default is 0 - no PLOGI. 1 - perfom PLOGI.");

int ql2xloginretrycount = 0;
70
module_param(ql2xloginretrycount, int, S_IRUGO);
L
Linus Torvalds 已提交
71 72 73
MODULE_PARM_DESC(ql2xloginretrycount,
		"Specify an alternate value for the NVRAM login retry count.");

74
int ql2xallocfwdump = 1;
75
module_param(ql2xallocfwdump, int, S_IRUGO);
76 77 78 79 80
MODULE_PARM_DESC(ql2xallocfwdump,
		"Option to enable allocation of memory for a firmware dump "
		"during HBA initialization.  Memory allocation requirements "
		"vary by ISP type.  Default is 1 - allocate memory.");

81
int ql2xextended_error_logging;
82
module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
83
MODULE_PARM_DESC(ql2xextended_error_logging,
84 85 86 87 88 89 90 91 92
		"Option to enable extended error logging,\n"
		"\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
		"\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
		"\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
		"\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
		"\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
		"\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
		"\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
		"\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
93 94
		"\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
		"\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
95
		"\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
96 97 98
		"\t\t0x1e400000 - Preferred value for capturing essential "
		"debug information (equivalent to old "
		"ql2xextended_error_logging=1).\n"
99
		"\t\tDo LOGICAL OR of the value to enable more than one level");
100

101
int ql2xshiftctondsd = 6;
102
module_param(ql2xshiftctondsd, int, S_IRUGO);
103 104 105 106
MODULE_PARM_DESC(ql2xshiftctondsd,
		"Set to control shifting of command type processing "
		"based on total number of SG elements.");

107
int ql2xfdmienable=1;
108
module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
109
MODULE_PARM_DESC(ql2xfdmienable,
110 111
		"Enables FDMI registrations. "
		"0 - no FDMI. Default is 1 - perform FDMI.");
112

113 114
#define MAX_Q_DEPTH	32
static int ql2xmaxqdepth = MAX_Q_DEPTH;
115 116
module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xmaxqdepth,
117 118
		"Maximum queue depth to set for each LUN. "
		"Default is 32.");
119

120 121
int ql2xenabledif = 2;
module_param(ql2xenabledif, int, S_IRUGO);
122
MODULE_PARM_DESC(ql2xenabledif,
123 124 125 126 127
		" Enable T10-CRC-DIF:\n"
		" Default is 2.\n"
		"  0 -- No DIF Support\n"
		"  1 -- Enable DIF for all types\n"
		"  2 -- Enable DIF for all types, except Type 0.\n");
128

129
int ql2xenablehba_err_chk = 2;
130 131
module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xenablehba_err_chk,
132
		" Enable T10-CRC-DIF Error isolation by HBA:\n"
133
		" Default is 2.\n"
134 135 136
		"  0 -- Error isolation disabled\n"
		"  1 -- Error isolation enabled only for DIX Type 0\n"
		"  2 -- Error isolation enabled for all Types\n");
137

138
int ql2xiidmaenable=1;
139
module_param(ql2xiidmaenable, int, S_IRUGO);
140 141 142 143
MODULE_PARM_DESC(ql2xiidmaenable,
		"Enables iIDMA settings "
		"Default is 1 - perform iIDMA. 0 - no iIDMA.");

144
int ql2xmaxqueues = 1;
145
module_param(ql2xmaxqueues, int, S_IRUGO);
146 147
MODULE_PARM_DESC(ql2xmaxqueues,
		"Enables MQ settings "
148 149
		"Default is 1 for single queue. Set it to number "
		"of queues in MQ mode.");
150 151

int ql2xmultique_tag;
152
module_param(ql2xmultique_tag, int, S_IRUGO);
153 154 155 156
MODULE_PARM_DESC(ql2xmultique_tag,
		"Enables CPU affinity settings for the driver "
		"Default is 0 for no affinity of request and response IO. "
		"Set it to 1 to turn on the cpu affinity.");
157 158

int ql2xfwloadbin;
159
module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
160
MODULE_PARM_DESC(ql2xfwloadbin,
161 162
		"Option to specify location from which to load ISP firmware:.\n"
		" 2 -- load firmware via the request_firmware() (hotplug).\n"
163 164 165 166
		"      interface.\n"
		" 1 -- load firmware from flash.\n"
		" 0 -- use default semantics.\n");

167
int ql2xetsenable;
168
module_param(ql2xetsenable, int, S_IRUGO);
169 170 171 172
MODULE_PARM_DESC(ql2xetsenable,
		"Enables firmware ETS burst."
		"Default is 0 - skip ETS enablement.");

173
int ql2xdbwr = 1;
174
module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
175
MODULE_PARM_DESC(ql2xdbwr,
176 177 178
		"Option to specify scheme for request queue posting.\n"
		" 0 -- Regular doorbell.\n"
		" 1 -- CAMRAM doorbell (faster).\n");
179

180
int ql2xtargetreset = 1;
181
module_param(ql2xtargetreset, int, S_IRUGO);
182 183 184 185
MODULE_PARM_DESC(ql2xtargetreset,
		 "Enable target reset."
		 "Default is 1 - use hw defaults.");

186
int ql2xgffidenable;
187
module_param(ql2xgffidenable, int, S_IRUGO);
188 189 190
MODULE_PARM_DESC(ql2xgffidenable,
		"Enables GFF_ID checks of port type. "
		"Default is 0 - Do not use GFF_ID information.");
191

192
int ql2xasynctmfenable;
193
module_param(ql2xasynctmfenable, int, S_IRUGO);
194 195 196
MODULE_PARM_DESC(ql2xasynctmfenable,
		"Enables issue of TM IOCBs asynchronously via IOCB mechanism"
		"Default is 0 - Issue TM IOCBs via mailbox mechanism.");
197 198

int ql2xdontresethba;
199
module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
200
MODULE_PARM_DESC(ql2xdontresethba,
201 202 203
		"Option to specify reset behaviour.\n"
		" 0 (Default) -- Reset on failure.\n"
		" 1 -- Do not reset on failure.\n");
204

205 206
uint64_t ql2xmaxlun = MAX_LUNS;
module_param(ql2xmaxlun, ullong, S_IRUGO);
207 208 209 210
MODULE_PARM_DESC(ql2xmaxlun,
		"Defines the maximum LU number to register with the SCSI "
		"midlayer. Default is 65535.");

211 212 213 214
int ql2xmdcapmask = 0x1F;
module_param(ql2xmdcapmask, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdcapmask,
		"Set the Minidump driver capture mask level. "
215
		"Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
216

217
int ql2xmdenable = 1;
218 219 220
module_param(ql2xmdenable, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdenable,
		"Enable/disable MiniDump. "
221 222
		"0 - MiniDump disabled. "
		"1 (Default) - MiniDump enabled.");
223

224 225 226 227 228 229
int ql2xexlogins = 0;
module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xexlogins,
		 "Number of extended Logins. "
		 "0 (Default)- Disabled.");

230 231 232 233 234 235
int ql2xexchoffld = 0;
module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xexchoffld,
		 "Number of exchanges to offload. "
		 "0 (Default)- Disabled.");

L
Linus Torvalds 已提交
236
/*
A
Andrew Vasquez 已提交
237
 * SCSI host template entry points
L
Linus Torvalds 已提交
238 239
 */
static int qla2xxx_slave_configure(struct scsi_device * device);
已提交
240
static int qla2xxx_slave_alloc(struct scsi_device *);
241 242
static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
static void qla2xxx_scan_start(struct Scsi_Host *);
已提交
243
static void qla2xxx_slave_destroy(struct scsi_device *);
J
Jeff Garzik 已提交
244
static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
L
Linus Torvalds 已提交
245 246
static int qla2xxx_eh_abort(struct scsi_cmnd *);
static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
247
static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
L
Linus Torvalds 已提交
248 249 250
static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
static int qla2xxx_eh_host_reset(struct scsi_cmnd *);

251
static void qla2x00_clear_drv_active(struct qla_hw_data *);
252
static void qla2x00_free_device(scsi_qla_host_t *);
253
static void qla83xx_disable_laser(scsi_qla_host_t *vha);
254

255
struct scsi_host_template qla2xxx_driver_template = {
L
Linus Torvalds 已提交
256
	.module			= THIS_MODULE,
257
	.name			= QLA2XXX_DRIVER_NAME,
258
	.queuecommand		= qla2xxx_queuecommand,
259 260 261

	.eh_abort_handler	= qla2xxx_eh_abort,
	.eh_device_reset_handler = qla2xxx_eh_device_reset,
262
	.eh_target_reset_handler = qla2xxx_eh_target_reset,
263 264 265 266 267 268 269
	.eh_bus_reset_handler	= qla2xxx_eh_bus_reset,
	.eh_host_reset_handler	= qla2xxx_eh_host_reset,

	.slave_configure	= qla2xxx_slave_configure,

	.slave_alloc		= qla2xxx_slave_alloc,
	.slave_destroy		= qla2xxx_slave_destroy,
270 271
	.scan_finished		= qla2xxx_scan_finished,
	.scan_start		= qla2xxx_scan_start,
272
	.change_queue_depth	= scsi_change_queue_depth,
273 274 275 276 277 278
	.this_id		= -1,
	.cmd_per_lun		= 3,
	.use_clustering		= ENABLE_CLUSTERING,
	.sg_tablesize		= SG_ALL,

	.max_sectors		= 0xFFFF,
279
	.shost_attrs		= qla2x00_host_attrs,
280 281

	.supported_mode		= MODE_INITIATOR,
282
	.track_queue_depth	= 1,
283 284
};

L
Linus Torvalds 已提交
285
static struct scsi_transport_template *qla2xxx_transport_template = NULL;
286
struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
L
Linus Torvalds 已提交
287 288 289 290 291 292

/* TODO Convert to inlines
 *
 * Timer routines
 */

293
__inline__ void
294
qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
L
Linus Torvalds 已提交
295
{
296 297 298 299 300 301
	init_timer(&vha->timer);
	vha->timer.expires = jiffies + interval * HZ;
	vha->timer.data = (unsigned long)vha;
	vha->timer.function = (void (*)(unsigned long))func;
	add_timer(&vha->timer);
	vha->timer_active = 1;
L
Linus Torvalds 已提交
302 303 304
}

static inline void
305
qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
L
Linus Torvalds 已提交
306
{
307
	/* Currently used for 82XX only. */
308 309 310
	if (vha->device_flags & DFLG_DEV_FAILED) {
		ql_dbg(ql_dbg_timer, vha, 0x600d,
		    "Device in a failed state, returning.\n");
311
		return;
312
	}
313

314
	mod_timer(&vha->timer, jiffies + interval * HZ);
L
Linus Torvalds 已提交
315 316
}

A
Adrian Bunk 已提交
317
static __inline__ void
318
qla2x00_stop_timer(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
319
{
320 321
	del_timer_sync(&vha->timer);
	vha->timer_active = 0;
L
Linus Torvalds 已提交
322 323 324 325 326 327
}

static int qla2x00_do_dpc(void *data);

static void qla2x00_rst_aen(scsi_qla_host_t *);

328 329
static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
	struct req_que **, struct rsp_que **);
330
static void qla2x00_free_fw_dump(struct qla_hw_data *);
331
static void qla2x00_mem_free(struct qla_hw_data *);
L
Linus Torvalds 已提交
332 333

/* -------------------------------------------------------------------------- */
334 335
static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
				struct rsp_que *rsp)
336
{
337
	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
338
	ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
339 340
				GFP_KERNEL);
	if (!ha->req_q_map) {
341 342
		ql_log(ql_log_fatal, vha, 0x003b,
		    "Unable to allocate memory for request queue ptrs.\n");
343 344 345
		goto fail_req_map;
	}

346
	ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
347 348
				GFP_KERNEL);
	if (!ha->rsp_q_map) {
349 350
		ql_log(ql_log_fatal, vha, 0x003c,
		    "Unable to allocate memory for response queue ptrs.\n");
351 352
		goto fail_rsp_map;
	}
353 354 355 356 357 358
	/*
	 * Make sure we record at least the request and response queue zero in
	 * case we need to free them if part of the probe fails.
	 */
	ha->rsp_q_map[0] = rsp;
	ha->req_q_map[0] = req;
359 360 361 362 363 364 365 366 367 368 369
	set_bit(0, ha->rsp_qid_map);
	set_bit(0, ha->req_qid_map);
	return 1;

fail_rsp_map:
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
fail_req_map:
	return -ENOMEM;
}

370
static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
371
{
372 373 374 375 376 377
	if (IS_QLAFX00(ha)) {
		if (req && req->ring_fx00)
			dma_free_coherent(&ha->pdev->dev,
			    (req->length_fx00 + 1) * sizeof(request_t),
			    req->ring_fx00, req->dma_fx00);
	} else if (req && req->ring)
378 379 380 381
		dma_free_coherent(&ha->pdev->dev,
		(req->length + 1) * sizeof(request_t),
		req->ring, req->dma);

382 383 384
	if (req)
		kfree(req->outstanding_cmds);

385 386 387 388
	kfree(req);
	req = NULL;
}

389 390
static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
{
391 392 393 394 395 396
	if (IS_QLAFX00(ha)) {
		if (rsp && rsp->ring)
			dma_free_coherent(&ha->pdev->dev,
			    (rsp->length_fx00 + 1) * sizeof(request_t),
			    rsp->ring_fx00, rsp->dma_fx00);
	} else if (rsp && rsp->ring) {
397 398 399
		dma_free_coherent(&ha->pdev->dev,
		(rsp->length + 1) * sizeof(response_t),
		rsp->ring, rsp->dma);
400
	}
401 402 403 404
	kfree(rsp);
	rsp = NULL;
}

405 406 407 408 409 410
static void qla2x00_free_queues(struct qla_hw_data *ha)
{
	struct req_que *req;
	struct rsp_que *rsp;
	int cnt;

411
	for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
412
		req = ha->req_q_map[cnt];
413
		qla2x00_free_req_que(ha, req);
414 415 416
	}
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
417 418 419 420 421 422 423

	for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
		rsp = ha->rsp_q_map[cnt];
		qla2x00_free_rsp_que(ha, rsp);
	}
	kfree(ha->rsp_q_map);
	ha->rsp_q_map = NULL;
424 425
}

426 427 428 429 430 431
static int qla25xx_setup_mode(struct scsi_qla_host *vha)
{
	uint16_t options = 0;
	int ques, req, ret;
	struct qla_hw_data *ha = vha->hw;

432
	if (!(ha->fw_attributes & BIT_6)) {
433 434
		ql_log(ql_log_warn, vha, 0x00d8,
		    "Firmware is not multi-queue capable.\n");
435 436
		goto fail;
	}
437 438 439 440 441 442
	if (ql2xmultique_tag) {
		/* create a request queue for IO */
		options |= BIT_7;
		req = qla25xx_create_req_que(ha, options, 0, 0, -1,
			QLA_DEFAULT_QUE_QOS);
		if (!req) {
443 444
			ql_log(ql_log_warn, vha, 0x00e0,
			    "Failed to create request queue.\n");
445 446
			goto fail;
		}
447
		ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
448 449 450 451 452
		vha->req = ha->req_q_map[req];
		options |= BIT_1;
		for (ques = 1; ques < ha->max_rsp_queues; ques++) {
			ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
			if (!ret) {
453 454
				ql_log(ql_log_warn, vha, 0x00e8,
				    "Failed to create response queue.\n");
455 456 457
				goto fail2;
			}
		}
458
		ha->flags.cpu_affinity_enabled = 1;
459
		ql_dbg(ql_dbg_multiq, vha, 0xc007,
460
		    "CPU affinity mode enabled, "
461 462 463
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
		ql_dbg(ql_dbg_init, vha, 0x00e9,
464
		    "CPU affinity mode enabled, "
465 466
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
467 468 469 470
	}
	return 0;
fail2:
	qla25xx_delete_queues(vha);
471 472
	destroy_workqueue(ha->wq);
	ha->wq = NULL;
473
	vha->req = ha->req_q_map[0];
474 475
fail:
	ha->mqenable = 0;
476 477 478
	kfree(ha->req_q_map);
	kfree(ha->rsp_q_map);
	ha->max_req_queues = ha->max_rsp_queues = 1;
479 480 481
	return 1;
}

L
Linus Torvalds 已提交
482
static char *
483
qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
L
Linus Torvalds 已提交
484
{
485
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505
	static char *pci_bus_modes[] = {
		"33", "66", "100", "133",
	};
	uint16_t pci_bus;

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
	if (pci_bus) {
		strcat(str, "-X (");
		strcat(str, pci_bus_modes[pci_bus]);
	} else {
		pci_bus = (ha->pci_attr & BIT_8) >> 8;
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus]);
	}
	strcat(str, " MHz)");

	return (str);
}

506
static char *
507
qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
508 509
{
	static char *pci_bus_modes[] = { "33", "66", "100", "133", };
510
	struct qla_hw_data *ha = vha->hw;
511 512
	uint32_t pci_bus;

513
	if (pci_is_pcie(ha->pdev)) {
514
		char lwstr[6];
515
		uint32_t lstat, lspeed, lwidth;
516

517 518 519
		pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
		lspeed = lstat & PCI_EXP_LNKCAP_SLS;
		lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
520 521

		strcpy(str, "PCIe (");
522 523
		switch (lspeed) {
		case 1:
524
			strcat(str, "2.5GT/s ");
525 526
			break;
		case 2:
527
			strcat(str, "5.0GT/s ");
528 529 530 531 532
			break;
		case 3:
			strcat(str, "8.0GT/s ");
			break;
		default:
533
			strcat(str, "<unknown> ");
534 535
			break;
		}
536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560
		snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
		strcat(str, lwstr);

		return str;
	}

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
	if (pci_bus == 0 || pci_bus == 8) {
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus >> 3]);
	} else {
		strcat(str, "-X ");
		if (pci_bus & BIT_2)
			strcat(str, "Mode 2");
		else
			strcat(str, "Mode 1");
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
	}
	strcat(str, " MHz)");

	return str;
}

561
static char *
562
qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
L
Linus Torvalds 已提交
563 564
{
	char un_str[10];
565
	struct qla_hw_data *ha = vha->hw;
A
Andrew Vasquez 已提交
566

567 568
	snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
	    ha->fw_minor_version, ha->fw_subminor_version);
L
Linus Torvalds 已提交
569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598

	if (ha->fw_attributes & BIT_9) {
		strcat(str, "FLX");
		return (str);
	}

	switch (ha->fw_attributes & 0xFF) {
	case 0x7:
		strcat(str, "EF");
		break;
	case 0x17:
		strcat(str, "TP");
		break;
	case 0x37:
		strcat(str, "IP");
		break;
	case 0x77:
		strcat(str, "VI");
		break;
	default:
		sprintf(un_str, "(%x)", ha->fw_attributes);
		strcat(str, un_str);
		break;
	}
	if (ha->fw_attributes & 0x100)
		strcat(str, "X");

	return (str);
}

599
static char *
600
qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
601
{
602
	struct qla_hw_data *ha = vha->hw;
603

604
	snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
605
	    ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
606 607 608
	return str;
}

609 610
void
qla2x00_sp_free_dma(void *vha, void *ptr)
611
{
612 613 614 615
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
	struct qla_hw_data *ha = sp->fcport->vha->hw;
	void *ctx = GET_CMD_CTX_SP(sp);
616

617 618 619
	if (sp->flags & SRB_DMA_VALID) {
		scsi_dma_unmap(cmd);
		sp->flags &= ~SRB_DMA_VALID;
620
	}
621

622 623 624 625 626 627 628 629
	if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
		dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
		    scsi_prot_sg_count(cmd), cmd->sc_data_direction);
		sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
		/* List assured to be having elements */
630
		qla2x00_clean_dsd_pool(ha, sp, NULL);
631 632 633 634 635 636 637 638 639 640 641
		sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
		dma_pool_free(ha->dl_dma_pool, ctx,
		    ((struct crc_context *)ctx)->crc_ctx_dma);
		sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
	}

	if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
		struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
642

643 644 645 646 647 648 649 650 651 652
		dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
			ctx1->fcp_cmnd_dma);
		list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
		ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
		ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
		mempool_free(ctx1, ha->ctx_mempool);
		ctx1 = NULL;
	}

	CMD_SP(cmd) = NULL;
653
	qla2x00_rel_sp(sp->fcport->vha, sp);
654 655
}

656
static void
657 658 659 660 661 662 663 664 665 666 667 668 669
qla2x00_sp_compl(void *data, void *ptr, int res)
{
	struct qla_hw_data *ha = (struct qla_hw_data *)data;
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);

	cmd->result = res;

	if (atomic_read(&sp->ref_count) == 0) {
		ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
		    "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
		    sp, GET_CMD_SP(sp));
		if (ql2xextended_error_logging & ql_dbg_io)
670
			WARN_ON(atomic_read(&sp->ref_count) == 0);
671 672 673 674 675 676 677
		return;
	}
	if (!atomic_dec_and_test(&sp->ref_count))
		return;

	qla2x00_sp_free_dma(ha, sp);
	cmd->scsi_done(cmd);
678 679
}

680 681 682
/* If we are SP1 here, we need to still take and release the host_lock as SP1
 * does not have the changes necessary to avoid taking host->host_lock.
 */
L
Linus Torvalds 已提交
683
static int
684
qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
685
{
686
	scsi_qla_host_t *vha = shost_priv(host);
687
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
688
	struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
689 690
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
691 692 693
	srb_t *sp;
	int rval;

694
	if (ha->flags.eeh_busy) {
695
		if (ha->flags.pci_channel_io_perm_failure) {
696
			ql_dbg(ql_dbg_aer, vha, 0x9010,
697 698
			    "PCI Channel IO permanent failure, exiting "
			    "cmd=%p.\n", cmd);
699
			cmd->result = DID_NO_CONNECT << 16;
700
		} else {
701
			ql_dbg(ql_dbg_aer, vha, 0x9011,
702
			    "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
703
			cmd->result = DID_REQUEUE << 16;
704
		}
705 706 707
		goto qc24_fail_command;
	}

708 709 710
	rval = fc_remote_port_chkready(rport);
	if (rval) {
		cmd->result = rval;
711
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
712 713
		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
		    cmd, rval);
714 715 716
		goto qc24_fail_command;
	}

717 718
	if (!vha->flags.difdix_supported &&
		scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
719 720 721
			ql_dbg(ql_dbg_io, vha, 0x3004,
			    "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
			    cmd);
722 723 724
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
	}
725 726 727 728 729 730

	if (!fcport) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

731 732
	if (atomic_read(&fcport->state) != FCS_ONLINE) {
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
733
			atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
734 735 736 737
			ql_dbg(ql_dbg_io, vha, 0x3005,
			    "Returning DNC, fcport_state=%d loop_state=%d.\n",
			    atomic_read(&fcport->state),
			    atomic_read(&base_vha->loop_state));
738 739 740
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
		}
741
		goto qc24_target_busy;
742 743
	}

744 745 746 747
	/*
	 * Return target busy if we've received a non-zero retry_delay_timer
	 * in a FCP_RSP.
	 */
748 749 750
	if (fcport->retry_delay_timestamp == 0) {
		/* retry delay not set */
	} else if (time_after(jiffies, fcport->retry_delay_timestamp))
751 752 753 754
		fcport->retry_delay_timestamp = 0;
	else
		goto qc24_target_busy;

755
	sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
756
	if (!sp)
757
		goto qc24_host_busy;
758

759 760 761 762 763 764 765
	sp->u.scmd.cmd = cmd;
	sp->type = SRB_SCSI_CMD;
	atomic_set(&sp->ref_count, 1);
	CMD_SP(cmd) = (void *)sp;
	sp->free = qla2x00_sp_free_dma;
	sp->done = qla2x00_sp_compl;

766
	rval = ha->isp_ops->start_scsi(sp);
767
	if (rval != QLA_SUCCESS) {
768
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
769
		    "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
770
		goto qc24_host_busy_free_sp;
771
	}
772 773 774 775

	return 0;

qc24_host_busy_free_sp:
776
	qla2x00_sp_free_dma(ha, sp);
777

778
qc24_host_busy:
779 780
	return SCSI_MLQUEUE_HOST_BUSY;

781 782 783
qc24_target_busy:
	return SCSI_MLQUEUE_TARGET_BUSY;

784
qc24_fail_command:
785
	cmd->scsi_done(cmd);
786 787 788 789

	return 0;
}

L
Linus Torvalds 已提交
790 791 792 793 794 795 796 797 798 799 800 801 802
/*
 * qla2x00_eh_wait_on_command
 *    Waits for the command to be returned by the Firmware for some
 *    max time.
 *
 * Input:
 *    cmd = Scsi Command to wait on.
 *
 * Return:
 *    Not Found : 0
 *    Found : 1
 */
static int
803
qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
804
{
805
#define ABORT_POLLING_PERIOD	1000
806
#define ABORT_WAIT_ITER		((2 * 1000) / (ABORT_POLLING_PERIOD))
已提交
807
	unsigned long wait_iter = ABORT_WAIT_ITER;
808 809
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
已提交
810
	int ret = QLA_SUCCESS;
L
Linus Torvalds 已提交
811

812
	if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
813 814
		ql_dbg(ql_dbg_taskm, vha, 0x8005,
		    "Return:eh_wait.\n");
815 816 817
		return ret;
	}

818
	while (CMD_SP(cmd) && wait_iter--) {
819
		msleep(ABORT_POLLING_PERIOD);
已提交
820 821 822
	}
	if (CMD_SP(cmd))
		ret = QLA_FUNCTION_FAILED;
L
Linus Torvalds 已提交
823

已提交
824
	return ret;
L
Linus Torvalds 已提交
825 826 827 828
}

/*
 * qla2x00_wait_for_hba_online
A
Andrew Vasquez 已提交
829
 *    Wait till the HBA is online after going through
L
Linus Torvalds 已提交
830 831 832 833 834
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline
 *
 * Input:
 *     ha - pointer to host adapter structure
A
Andrew Vasquez 已提交
835 836
 *
 * Note:
L
Linus Torvalds 已提交
837 838 839 840 841 842 843
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online) : 0
 *    Failed  (Adapter is offline/disabled) : 1
 */
844
int
845
qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
846
{
847 848
	int		return_status;
	unsigned long	wait_online;
849 850
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
851

A
Andrew Vasquez 已提交
852
	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
853 854 855 856
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_online)) {
L
Linus Torvalds 已提交
857 858 859

		msleep(1000);
	}
860
	if (base_vha->flags.online)
A
Andrew Vasquez 已提交
861
		return_status = QLA_SUCCESS;
L
Linus Torvalds 已提交
862 863 864 865 866 867
	else
		return_status = QLA_FUNCTION_FAILED;

	return (return_status);
}

868
/*
869 870
 * qla2x00_wait_for_hba_ready
 * Wait till the HBA is ready before doing driver unload
871 872 873 874 875 876 877 878 879
 *
 * Input:
 *     ha - pointer to host adapter structure
 *
 * Note:
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 */
880 881
static void
qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
882 883 884
{
	struct qla_hw_data *ha = vha->hw;

885 886 887 888
	while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
	    ha->flags.mbox_busy) ||
		test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
		test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
889 890 891
		msleep(1000);
}

892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919
int
qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_reset;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_reset)) {

		msleep(1000);

		if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
		    ha->flags.chip_reset_done)
			break;
	}
	if (ha->flags.chip_reset_done)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

	return return_status;
}

920 921 922 923 924 925
static void
sp_get(struct srb *sp)
{
	atomic_inc(&sp->ref_count);
}

L
Linus Torvalds 已提交
926 927 928 929 930 931 932 933 934 935 936 937 938
/**************************************************************************
* qla2xxx_eh_abort
*
* Description:
*    The abort function will abort the specified command.
*
* Input:
*    cmd = Linux SCSI command packet to be aborted.
*
* Returns:
*    Either SUCCESS or FAILED.
*
* Note:
939
*    Only return FAILED if command not returned by firmware.
L
Linus Torvalds 已提交
940
**************************************************************************/
941
static int
L
Linus Torvalds 已提交
942 943
qla2xxx_eh_abort(struct scsi_cmnd *cmd)
{
944
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
已提交
945
	srb_t *sp;
946
	int ret;
H
Hannes Reinecke 已提交
947 948
	unsigned int id;
	uint64_t lun;
949
	unsigned long flags;
950
	int rval, wait = 0;
951
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
952

已提交
953
	if (!CMD_SP(cmd))
954
		return SUCCESS;
L
Linus Torvalds 已提交
955

956 957 958 959 960
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = SUCCESS;

已提交
961 962
	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
963

964
	spin_lock_irqsave(&ha->hardware_lock, flags);
965 966 967 968 969
	sp = (srb_t *) CMD_SP(cmd);
	if (!sp) {
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
		return SUCCESS;
	}
L
Linus Torvalds 已提交
970

971
	ql_dbg(ql_dbg_taskm, vha, 0x8002,
972 973
	    "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
	    vha->host_no, id, lun, sp, cmd, sp->handle);
974

975 976
	/* Get a reference to the sp and drop the lock.*/
	sp_get(sp);
977

978
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
979 980
	rval = ha->isp_ops->abort_command(sp);
	if (rval) {
981
		if (rval == QLA_FUNCTION_PARAMETER_ERROR)
982
			ret = SUCCESS;
983
		else
984 985
			ret = FAILED;

986
		ql_dbg(ql_dbg_taskm, vha, 0x8003,
987
		    "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
988
	} else {
989
		ql_dbg(ql_dbg_taskm, vha, 0x8004,
990
		    "Abort command mbx success cmd=%p.\n", cmd);
991 992
		wait = 1;
	}
993 994

	spin_lock_irqsave(&ha->hardware_lock, flags);
995
	sp->done(ha, sp, 0);
996
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
997

998 999 1000 1001
	/* Did the command return during mailbox execution? */
	if (ret == FAILED && !CMD_SP(cmd))
		ret = SUCCESS;

已提交
1002
	/* Wait for the command to be returned. */
1003
	if (wait) {
1004
		if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1005
			ql_log(ql_log_warn, vha, 0x8006,
1006
			    "Abort handler timed out cmd=%p.\n", cmd);
1007
			ret = FAILED;
已提交
1008
		}
L
Linus Torvalds 已提交
1009 1010
	}

1011
	ql_log(ql_log_info, vha, 0x801c,
H
Hannes Reinecke 已提交
1012
	    "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1013
	    vha->host_no, id, lun, wait, ret);
L
Linus Torvalds 已提交
1014

已提交
1015 1016
	return ret;
}
L
Linus Torvalds 已提交
1017

1018
int
1019
qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
H
Hannes Reinecke 已提交
1020
	uint64_t l, enum nexus_wait_type type)
已提交
1021
{
1022
	int cnt, match, status;
1023
	unsigned long flags;
1024
	struct qla_hw_data *ha = vha->hw;
1025
	struct req_que *req;
1026
	srb_t *sp;
1027
	struct scsi_cmnd *cmd;
L
Linus Torvalds 已提交
1028

1029
	status = QLA_SUCCESS;
1030

1031
	spin_lock_irqsave(&ha->hardware_lock, flags);
1032
	req = vha->req;
1033
	for (cnt = 1; status == QLA_SUCCESS &&
1034
		cnt < req->num_outstanding_cmds; cnt++) {
1035 1036
		sp = req->outstanding_cmds[cnt];
		if (!sp)
1037
			continue;
1038
		if (sp->type != SRB_SCSI_CMD)
1039
			continue;
1040 1041 1042
		if (vha->vp_idx != sp->fcport->vha->vp_idx)
			continue;
		match = 0;
1043
		cmd = GET_CMD_SP(sp);
1044 1045 1046 1047 1048
		switch (type) {
		case WAIT_HOST:
			match = 1;
			break;
		case WAIT_TARGET:
1049
			match = cmd->device->id == t;
1050 1051
			break;
		case WAIT_LUN:
1052 1053
			match = (cmd->device->id == t &&
				cmd->device->lun == l);
1054
			break;
1055
		}
1056 1057 1058 1059
		if (!match)
			continue;

		spin_unlock_irqrestore(&ha->hardware_lock, flags);
1060
		status = qla2x00_eh_wait_on_command(cmd);
1061
		spin_lock_irqsave(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
1062
	}
1063
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
1064 1065

	return status;
L
Linus Torvalds 已提交
1066 1067
}

1068 1069 1070 1071 1072 1073
static char *reset_errors[] = {
	"HBA not online",
	"HBA not ready",
	"Task management failed",
	"Waiting for command completions",
};
L
Linus Torvalds 已提交
1074

1075
static int
1076
__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
H
Hannes Reinecke 已提交
1077
    struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
L
Linus Torvalds 已提交
1078
{
1079
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1080
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1081
	int err;
L
Linus Torvalds 已提交
1082

1083
	if (!fcport) {
1084
		return FAILED;
1085
	}
L
Linus Torvalds 已提交
1086

1087 1088 1089 1090
	err = fc_block_scsi_eh(cmd);
	if (err != 0)
		return err;

1091
	ql_log(ql_log_info, vha, 0x8009,
H
Hannes Reinecke 已提交
1092
	    "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1093
	    cmd->device->id, cmd->device->lun, cmd);
L
Linus Torvalds 已提交
1094

1095
	err = 0;
1096 1097 1098
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800a,
		    "Wait for hba online failed for cmd=%p.\n", cmd);
1099
		goto eh_reset_failed;
1100
	}
1101
	err = 2;
1102
	if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1103 1104 1105
		!= QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800c,
		    "do_reset failed for cmd=%p.\n", cmd);
1106
		goto eh_reset_failed;
1107
	}
1108
	err = 3;
1109
	if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1110 1111
	    cmd->device->lun, type) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800d,
1112
		    "wait for pending cmds failed for cmd=%p.\n", cmd);
1113
		goto eh_reset_failed;
1114
	}
1115

1116
	ql_log(ql_log_info, vha, 0x800e,
H
Hannes Reinecke 已提交
1117
	    "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1118
	    vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1119 1120 1121

	return SUCCESS;

1122
eh_reset_failed:
1123
	ql_log(ql_log_info, vha, 0x800f,
H
Hannes Reinecke 已提交
1124
	    "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1125 1126
	    reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
	    cmd);
1127 1128
	return FAILED;
}
L
Linus Torvalds 已提交
1129

1130 1131 1132
static int
qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
{
1133 1134
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1135

1136 1137
	return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
	    ha->isp_ops->lun_reset);
L
Linus Torvalds 已提交
1138 1139 1140
}

static int
1141
qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
1142
{
1143 1144
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1145

1146 1147
	return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
	    ha->isp_ops->target_reset);
L
Linus Torvalds 已提交
1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164
}

/**************************************************************************
* qla2xxx_eh_bus_reset
*
* Description:
*    The bus reset function will reset the bus and abort any executing
*    commands.
*
* Input:
*    cmd = Linux SCSI command packet of the command that cause the
*          bus reset.
*
* Returns:
*    SUCCESS/FAILURE (defined as macro in scsi.h).
*
**************************************************************************/
1165
static int
L
Linus Torvalds 已提交
1166 1167
qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
{
1168
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1169
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1170
	int ret = FAILED;
H
Hannes Reinecke 已提交
1171 1172
	unsigned int id;
	uint64_t lun;
已提交
1173 1174 1175

	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
1176

1177
	if (!fcport) {
已提交
1178
		return ret;
1179
	}
L
Linus Torvalds 已提交
1180

1181 1182 1183 1184 1185
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = FAILED;

1186
	ql_log(ql_log_info, vha, 0x8012,
H
Hannes Reinecke 已提交
1187
	    "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1188

1189
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1190 1191
		ql_log(ql_log_fatal, vha, 0x8013,
		    "Wait for hba online failed board disabled.\n");
已提交
1192
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1193 1194
	}

1195 1196 1197
	if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
		ret = SUCCESS;

已提交
1198 1199
	if (ret == FAILED)
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1200

1201
	/* Flush outstanding commands. */
1202
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1203 1204 1205
	    QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x8014,
		    "Wait for pending commands failed.\n");
1206
		ret = FAILED;
1207
	}
L
Linus Torvalds 已提交
1208

已提交
1209
eh_bus_reset_done:
1210
	ql_log(ql_log_warn, vha, 0x802b,
H
Hannes Reinecke 已提交
1211
	    "BUS RESET %s nexus=%ld:%d:%llu.\n",
1212
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1213

已提交
1214
	return ret;
L
Linus Torvalds 已提交
1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
}

/**************************************************************************
* qla2xxx_eh_host_reset
*
* Description:
*    The reset function will reset the Adapter.
*
* Input:
*      cmd = Linux SCSI command packet of the command that cause the
*            adapter reset.
*
* Returns:
*      Either SUCCESS or FAILED.
*
* Note:
**************************************************************************/
1232
static int
L
Linus Torvalds 已提交
1233 1234
qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
{
1235 1236
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
1237
	int ret = FAILED;
H
Hannes Reinecke 已提交
1238 1239
	unsigned int id;
	uint64_t lun;
1240
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
1241

已提交
1242 1243 1244
	id = cmd->device->id;
	lun = cmd->device->lun;

1245
	ql_log(ql_log_info, vha, 0x8018,
H
Hannes Reinecke 已提交
1246
	    "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1247

1248 1249 1250 1251 1252
	/*
	 * No point in issuing another reset if one is active.  Also do not
	 * attempt a reset if we are updating flash.
	 */
	if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
已提交
1253
		goto eh_host_reset_lock;
L
Linus Torvalds 已提交
1254

1255 1256
	if (vha != base_vha) {
		if (qla2x00_vp_abort_isp(vha))
已提交
1257
			goto eh_host_reset_lock;
1258
	} else {
1259
		if (IS_P3P_TYPE(vha->hw)) {
1260 1261 1262 1263 1264 1265 1266
			if (!qla82xx_fcoe_ctx_reset(vha)) {
				/* Ctx reset success */
				ret = SUCCESS;
				goto eh_host_reset_lock;
			}
			/* fall thru if ctx reset failed */
		}
1267 1268 1269
		if (ha->wq)
			flush_workqueue(ha->wq);

1270
		set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1271
		if (ha->isp_ops->abort_isp(base_vha)) {
1272 1273 1274 1275
			clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
			/* failed. schedule dpc to try */
			set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);

1276 1277 1278
			if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
				ql_log(ql_log_warn, vha, 0x802a,
				    "wait for hba online failed.\n");
1279
				goto eh_host_reset_lock;
1280
			}
1281 1282
		}
		clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
A
Andrew Vasquez 已提交
1283
	}
L
Linus Torvalds 已提交
1284

1285
	/* Waiting for command to be returned to OS.*/
1286
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1287
		QLA_SUCCESS)
已提交
1288
		ret = SUCCESS;
L
Linus Torvalds 已提交
1289

已提交
1290
eh_host_reset_lock:
1291
	ql_log(ql_log_info, vha, 0x8017,
H
Hannes Reinecke 已提交
1292
	    "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1293
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1294

已提交
1295 1296
	return ret;
}
L
Linus Torvalds 已提交
1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307

/*
* qla2x00_loop_reset
*      Issue loop reset.
*
* Input:
*      ha = adapter block pointer.
*
* Returns:
*      0 = success
*/
1308
int
1309
qla2x00_loop_reset(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
1310
{
1311
	int ret;
1312
	struct fc_port *fcport;
1313
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1314

1315 1316 1317 1318
	if (IS_QLAFX00(ha)) {
		return qlafx00_loop_reset(vha);
	}

1319
	if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1320 1321 1322 1323 1324 1325
		list_for_each_entry(fcport, &vha->vp_fcports, list) {
			if (fcport->port_type != FCT_TARGET)
				continue;

			ret = ha->isp_ops->target_reset(fcport, 0, 0);
			if (ret != QLA_SUCCESS) {
1326
				ql_dbg(ql_dbg_taskm, vha, 0x802c,
1327
				    "Bus Reset failed: Reset=%d "
1328
				    "d_id=%x.\n", ret, fcport->d_id.b24);
1329 1330 1331 1332
			}
		}
	}

1333

1334
	if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1335 1336 1337
		atomic_set(&vha->loop_state, LOOP_DOWN);
		atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
		qla2x00_mark_all_devices_lost(vha, 0);
1338
		ret = qla2x00_full_login_lip(vha);
1339
		if (ret != QLA_SUCCESS) {
1340 1341
			ql_dbg(ql_dbg_taskm, vha, 0x802d,
			    "full_login_lip=%d.\n", ret);
1342
		}
1343 1344
	}

1345
	if (ha->flags.enable_lip_reset) {
1346
		ret = qla2x00_lip_reset(vha);
1347
		if (ret != QLA_SUCCESS)
1348 1349
			ql_dbg(ql_dbg_taskm, vha, 0x802e,
			    "lip_reset failed (%d).\n", ret);
L
Linus Torvalds 已提交
1350 1351 1352
	}

	/* Issue marker command only when we are going to start the I/O */
1353
	vha->marker_needed = 1;
L
Linus Torvalds 已提交
1354

1355
	return QLA_SUCCESS;
L
Linus Torvalds 已提交
1356 1357
}

1358
void
1359
qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1360
{
1361
	int que, cnt;
1362 1363
	unsigned long flags;
	srb_t *sp;
1364
	struct qla_hw_data *ha = vha->hw;
1365
	struct req_que *req;
1366

1367 1368
	qlt_host_reset_handler(ha);

1369
	spin_lock_irqsave(&ha->hardware_lock, flags);
1370
	for (que = 0; que < ha->max_req_queues; que++) {
1371
		req = ha->req_q_map[que];
1372 1373
		if (!req)
			continue;
1374 1375 1376
		if (!req->outstanding_cmds)
			continue;
		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1377
			sp = req->outstanding_cmds[cnt];
1378
			if (sp) {
1379
				req->outstanding_cmds[cnt] = NULL;
1380
				sp->done(vha, sp, res);
1381
			}
1382 1383 1384 1385 1386
		}
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

已提交
1387 1388
static int
qla2xxx_slave_alloc(struct scsi_device *sdev)
L
Linus Torvalds 已提交
1389
{
1390
	struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
L
Linus Torvalds 已提交
1391

1392
	if (!rport || fc_remote_port_chkready(rport))
已提交
1393
		return -ENXIO;
1394

1395
	sdev->hostdata = *(fc_port_t **)rport->dd_data;
L
Linus Torvalds 已提交
1396

已提交
1397 1398
	return 0;
}
L
Linus Torvalds 已提交
1399

已提交
1400 1401 1402
static int
qla2xxx_slave_configure(struct scsi_device *sdev)
{
1403
	scsi_qla_host_t *vha = shost_priv(sdev->host);
1404
	struct req_que *req = vha->req;
已提交
1405

1406 1407 1408
	if (IS_T10_PI_CAPABLE(vha->hw))
		blk_queue_update_dma_alignment(sdev->request_queue, 0x7);

1409
	scsi_change_queue_depth(sdev, req->max_q_depth);
已提交
1410 1411
	return 0;
}
L
Linus Torvalds 已提交
1412

已提交
1413 1414 1415 1416
static void
qla2xxx_slave_destroy(struct scsi_device *sdev)
{
	sdev->hostdata = NULL;
L
Linus Torvalds 已提交
1417 1418 1419 1420 1421 1422 1423 1424 1425 1426
}

/**
 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
 * @ha: HA context
 *
 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
 * supported addressing method.
 */
static void
1427
qla2x00_config_dma_addressing(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
1428
{
1429
	/* Assume a 32bit DMA mask. */
L
Linus Torvalds 已提交
1430 1431
	ha->flags.enable_64bit_addressing = 0;

1432
	if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1433 1434
		/* Any upper-dword bits set? */
		if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1435
		    !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1436
			/* Ok, a 64bit DMA mask is applicable. */
L
Linus Torvalds 已提交
1437
			ha->flags.enable_64bit_addressing = 1;
1438 1439
			ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
			ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1440
			return;
L
Linus Torvalds 已提交
1441 1442
		}
	}
1443

1444 1445
	dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
	pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
L
Linus Torvalds 已提交
1446 1447
}

1448
static void
1449
qla2x00_enable_intrs(struct qla_hw_data *ha)
1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	/* enable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

}

static void
1464
qla2x00_disable_intrs(struct qla_hw_data *ha)
1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	/* disable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, 0);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1478
qla24xx_enable_intrs(struct qla_hw_data *ha)
1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1491
qla24xx_disable_intrs(struct qla_hw_data *ha)
1492 1493 1494 1495
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

1496 1497
	if (IS_NOPOLLING_TYPE(ha))
		return;
1498 1499 1500 1501 1502 1503 1504
	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	WRT_REG_DWORD(&reg->ictrl, 0);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613
static int
qla2x00_iospace_config(struct qla_hw_data *ha)
{
	resource_size_t pio;
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (!(ha->bars & 1))
		goto skip_pio;

	/* We only need PIO for Flash operations on ISP2312 v2 chips. */
	pio = pci_resource_start(ha->pdev, 0);
	if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
		if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
			ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
			    "Invalid pci I/O region size (%s).\n",
			    pci_name(ha->pdev));
			pio = 0;
		}
	} else {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
		    "Region #0 no a PIO resource (%s).\n",
		    pci_name(ha->pdev));
		pio = 0;
	}
	ha->pio_address = pio;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
	    "PIO address=%llu.\n",
	    (unsigned long long)ha->pio_address);

skip_pio:
	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
		    "Region #1 not an MMIO resource (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
		    "Invalid PCI mem region size (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* Determine queue resources */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
		(ql2xmaxqueues > 1 && ql2xmultique_tag) ||
		(!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
		goto mqiobase_exit;

	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
			pci_resource_len(ha->pdev, 3));
	if (ha->mqiobase) {
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
		    "MQIO Base=%p.\n", ha->mqiobase);
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
			    QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x001a,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x001b,
		    "BAR 3 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
	    "MSIX Count:%d.\n", ha->msix_count);
	return (0);

iospace_error_exit:
	return (-ENOMEM);
}


1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695
static int
qla83xx_iospace_config(struct qla_hw_data *ha)
{
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));

		goto iospace_error_exit;
	}

	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
		    "Invalid pci I/O region size (%s).\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
		    "Invalid PCI mem region size (%s), aborting\n",
			pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* 64bit PCI BAR - BAR2 will correspoond to region 4 */
	/* 83XX 26XX always use MQ type access for queues
	 * - mbar 2, a.k.a region 4 */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
			pci_resource_len(ha->pdev, 4));

	if (!ha->mqiobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
		    "BAR2/region4 not enabled\n");
		goto mqiobase_exit;
	}

	ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
			pci_resource_len(ha->pdev, 2));
	if (ha->msixbase) {
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev,
		    QLA_83XX_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
						QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x011c,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x011e,
		    "BAR 1 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
1696 1697 1698

	qlt_83xx_iospace_config(ha);

1699 1700 1701 1702 1703 1704 1705 1706
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
	    "MSIX Count:%d.\n", ha->msix_count);
	return 0;

iospace_error_exit:
	return -ENOMEM;
}

1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721
static struct isp_operations qla2100_isp_ops = {
	.pci_config		= qla2100_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2100_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1722 1723
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2100_fw_dump,
	.beacon_on		= NULL,
	.beacon_off		= NULL,
	.beacon_blink		= NULL,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1739
	.start_scsi		= qla2x00_start_scsi,
1740
	.abort_isp		= qla2x00_abort_isp,
1741
	.iospace_config     	= qla2x00_iospace_config,
1742
	.initialize_adapter	= qla2x00_initialize_adapter,
1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759
};

static struct isp_operations qla2300_isp_ops = {
	.pci_config		= qla2300_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2300_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1760 1761
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2300_fw_dump,
	.beacon_on		= qla2x00_beacon_on,
	.beacon_off		= qla2x00_beacon_off,
	.beacon_blink		= qla2x00_beacon_blink,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1777
	.start_scsi		= qla2x00_start_scsi,
1778
	.abort_isp		= qla2x00_abort_isp,
1779
	.iospace_config		= qla2x00_iospace_config,
1780
	.initialize_adapter	= qla2x00_initialize_adapter,
1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797
};

static struct isp_operations qla24xx_isp_ops = {
	.pci_config		= qla24xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1798 1799
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1815
	.start_scsi		= qla24xx_start_scsi,
1816
	.abort_isp		= qla2x00_abort_isp,
1817
	.iospace_config		= qla2x00_iospace_config,
1818
	.initialize_adapter	= qla2x00_initialize_adapter,
1819 1820
};

1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835
static struct isp_operations qla25xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1836 1837
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla25xx_read_nvram_data,
	.write_nvram		= qla25xx_write_nvram_data,
	.fw_dump		= qla25xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
1850
	.read_optrom		= qla25xx_read_optrom_data,
1851 1852
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1853
	.start_scsi		= qla24xx_dif_start_scsi,
1854
	.abort_isp		= qla2x00_abort_isp,
1855
	.iospace_config		= qla2x00_iospace_config,
1856
	.initialize_adapter	= qla2x00_initialize_adapter,
1857 1858
};

1859 1860 1861 1862 1863 1864 1865 1866
static struct isp_operations qla81xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
1867
	.load_risc		= qla81xx_load_risc,
1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
1882 1883
	.read_nvram		= NULL,
	.write_nvram		= NULL,
1884 1885 1886
	.fw_dump		= qla81xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
1887
	.beacon_blink		= qla83xx_beacon_blink,
1888 1889 1890
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1891
	.start_scsi		= qla24xx_dif_start_scsi,
1892
	.abort_isp		= qla2x00_abort_isp,
1893
	.iospace_config		= qla2x00_iospace_config,
1894
	.initialize_adapter	= qla2x00_initialize_adapter,
1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905
};

static struct isp_operations qla82xx_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
1906
	.pci_info_str		= qla24xx_pci_info_str,
1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla82xx_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
1922
	.fw_dump		= qla82xx_fw_dump,
1923 1924 1925
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
1926 1927
	.read_optrom		= qla82xx_read_optrom_data,
	.write_optrom		= qla82xx_write_optrom_data,
1928
	.get_flash_version	= qla82xx_get_flash_version,
1929 1930
	.start_scsi             = qla82xx_start_scsi,
	.abort_isp		= qla82xx_abort_isp,
1931
	.iospace_config     	= qla82xx_iospace_config,
1932
	.initialize_adapter	= qla2x00_initialize_adapter,
1933 1934
};

1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959
static struct isp_operations qla8044_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla8044_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
1960
	.fw_dump		= qla8044_fw_dump,
1961 1962 1963
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
1964
	.read_optrom		= qla8044_read_optrom_data,
1965 1966 1967 1968 1969 1970 1971 1972
	.write_optrom		= qla8044_write_optrom_data,
	.get_flash_version	= qla82xx_get_flash_version,
	.start_scsi             = qla82xx_start_scsi,
	.abort_isp		= qla8044_abort_isp,
	.iospace_config		= qla82xx_iospace_config,
	.initialize_adapter	= qla2x00_initialize_adapter,
};

1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007
static struct isp_operations qla83xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla83xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024
	.initialize_adapter	= qla2x00_initialize_adapter,
};

static struct isp_operations qlafx00_isp_ops = {
	.pci_config		= qlafx00_pci_config,
	.reset_chip		= qlafx00_soft_reset,
	.chip_diag		= qlafx00_chip_diag,
	.config_rings		= qlafx00_config_rings,
	.reset_adapter		= qlafx00_soft_reset,
	.nvram_config		= NULL,
	.update_fw_options	= NULL,
	.load_risc		= NULL,
	.pci_info_str		= qlafx00_pci_info_str,
	.fw_version_str		= qlafx00_fw_version_str,
	.intr_handler		= qlafx00_intr_handler,
	.enable_intrs		= qlafx00_enable_intrs,
	.disable_intrs		= qlafx00_disable_intrs,
2025
	.abort_command		= qla24xx_async_abort_command,
2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046
	.target_reset		= qlafx00_abort_target,
	.lun_reset		= qlafx00_lun_reset,
	.fabric_login		= NULL,
	.fabric_logout		= NULL,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= NULL,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= NULL,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qlafx00_start_scsi,
	.abort_isp		= qlafx00_abort_isp,
	.iospace_config		= qlafx00_iospace_config,
	.initialize_adapter	= qlafx00_initialize_adapter,
2047 2048
};

2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086
static struct isp_operations qla27xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla27xx_fwdump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
	.initialize_adapter	= qla2x00_initialize_adapter,
};

2087
static inline void
2088
qla2x00_set_isp_flags(struct qla_hw_data *ha)
2089 2090 2091 2092 2093 2094
{
	ha->device_type = DT_EXTENDED_IDS;
	switch (ha->pdev->device) {
	case PCI_DEVICE_ID_QLOGIC_ISP2100:
		ha->device_type |= DT_ISP2100;
		ha->device_type &= ~DT_EXTENDED_IDS;
2095
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2096 2097 2098 2099
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2200:
		ha->device_type |= DT_ISP2200;
		ha->device_type &= ~DT_EXTENDED_IDS;
2100
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2101 2102 2103
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2300:
		ha->device_type |= DT_ISP2300;
2104
		ha->device_type |= DT_ZIO_SUPPORTED;
2105
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2106 2107 2108
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2312:
		ha->device_type |= DT_ISP2312;
2109
		ha->device_type |= DT_ZIO_SUPPORTED;
2110
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2111 2112 2113
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2322:
		ha->device_type |= DT_ISP2322;
2114
		ha->device_type |= DT_ZIO_SUPPORTED;
2115 2116 2117
		if (ha->pdev->subsystem_vendor == 0x1028 &&
		    ha->pdev->subsystem_device == 0x0170)
			ha->device_type |= DT_OEM_001;
2118
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2119 2120 2121
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6312:
		ha->device_type |= DT_ISP6312;
2122
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2123 2124 2125
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6322:
		ha->device_type |= DT_ISP6322;
2126
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2127 2128 2129
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2422:
		ha->device_type |= DT_ISP2422;
2130
		ha->device_type |= DT_ZIO_SUPPORTED;
2131
		ha->device_type |= DT_FWI2;
2132
		ha->device_type |= DT_IIDMA;
2133
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2134 2135 2136
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2432:
		ha->device_type |= DT_ISP2432;
2137
		ha->device_type |= DT_ZIO_SUPPORTED;
2138
		ha->device_type |= DT_FWI2;
2139
		ha->device_type |= DT_IIDMA;
2140
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2141
		break;
2142 2143 2144 2145 2146 2147 2148
	case PCI_DEVICE_ID_QLOGIC_ISP8432:
		ha->device_type |= DT_ISP8432;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2149 2150
	case PCI_DEVICE_ID_QLOGIC_ISP5422:
		ha->device_type |= DT_ISP5422;
2151
		ha->device_type |= DT_FWI2;
2152
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2153
		break;
2154 2155
	case PCI_DEVICE_ID_QLOGIC_ISP5432:
		ha->device_type |= DT_ISP5432;
2156
		ha->device_type |= DT_FWI2;
2157
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2158
		break;
2159 2160 2161 2162 2163
	case PCI_DEVICE_ID_QLOGIC_ISP2532:
		ha->device_type |= DT_ISP2532;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2164
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2165
		break;
2166 2167 2168 2169 2170 2171 2172
	case PCI_DEVICE_ID_QLOGIC_ISP8001:
		ha->device_type |= DT_ISP8001;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2173 2174 2175 2176 2177 2178 2179 2180
	case PCI_DEVICE_ID_QLOGIC_ISP8021:
		ha->device_type |= DT_ISP8021;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2181 2182 2183 2184 2185 2186 2187 2188
	 case PCI_DEVICE_ID_QLOGIC_ISP8044:
		ha->device_type |= DT_ISP8044;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204
	case PCI_DEVICE_ID_QLOGIC_ISP2031:
		ha->device_type |= DT_ISP2031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP8031:
		ha->device_type |= DT_ISP8031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2205 2206 2207
	case PCI_DEVICE_ID_QLOGIC_ISPF001:
		ha->device_type |= DT_ISPFX00;
		break;
2208 2209 2210 2211 2212 2213 2214
	case PCI_DEVICE_ID_QLOGIC_ISP2071:
		ha->device_type |= DT_ISP2071;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2215 2216 2217 2218 2219 2220 2221
	case PCI_DEVICE_ID_QLOGIC_ISP2271:
		ha->device_type |= DT_ISP2271;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2222 2223 2224 2225 2226 2227 2228
	case PCI_DEVICE_ID_QLOGIC_ISP2261:
		ha->device_type |= DT_ISP2261;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2229
	}
2230

2231
	if (IS_QLA82XX(ha))
2232
		ha->port_no = ha->portnum & 1;
2233
	else {
2234 2235
		/* Get adapter physical port no from interrupt pin register. */
		pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2236 2237 2238 2239 2240
		if (IS_QLA27XX(ha))
			ha->port_no--;
		else
			ha->port_no = !(ha->port_no & 1);
	}
2241

2242
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2243
	    "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2244
	    ha->device_type, ha->port_no, ha->fw_srisc_address);
2245 2246
}

2247 2248 2249
static void
qla2xxx_scan_start(struct Scsi_Host *shost)
{
2250
	scsi_qla_host_t *vha = shost_priv(shost);
2251

2252 2253 2254
	if (vha->hw->flags.running_gold_fw)
		return;

2255 2256 2257 2258
	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	set_bit(RSCN_UPDATE, &vha->dpc_flags);
	set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2259 2260 2261 2262 2263
}

static int
qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
{
2264
	scsi_qla_host_t *vha = shost_priv(shost);
2265

2266
	if (!vha->host)
2267
		return 1;
2268
	if (time > vha->hw->loop_reset_delay * HZ)
2269 2270
		return 1;

2271
	return atomic_read(&vha->loop_state) == LOOP_READY;
2272 2273
}

L
Linus Torvalds 已提交
2274 2275 2276
/*
 * PCI driver interface
 */
2277
static int
2278
qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
L
Linus Torvalds 已提交
2279
{
2280
	int	ret = -ENODEV;
L
Linus Torvalds 已提交
2281
	struct Scsi_Host *host;
2282 2283
	scsi_qla_host_t *base_vha = NULL;
	struct qla_hw_data *ha;
2284
	char pci_info[30];
2285
	char fw_str[30], wq_name[30];
2286
	struct scsi_host_template *sht;
2287
	int bars, mem_only = 0;
2288
	uint16_t req_length = 0, rsp_length = 0;
2289 2290
	struct req_que *req = NULL;
	struct rsp_que *rsp = NULL;
2291
	bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2292
	sht = &qla2xxx_driver_template;
2293
	if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2294
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2295
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2296
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2297
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2298
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2299
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2300 2301
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2302
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2303
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2304
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2305
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2306 2307
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2308
		bars = pci_select_bars(pdev, IORESOURCE_MEM);
2309
		mem_only = 1;
2310 2311
		ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
		    "Mem only adapter.\n");
2312
	}
2313 2314
	ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
	    "Bars=%d.\n", bars);
2315

2316 2317 2318 2319 2320 2321 2322
	if (mem_only) {
		if (pci_enable_device_mem(pdev))
			goto probe_out;
	} else {
		if (pci_enable_device(pdev))
			goto probe_out;
	}
2323

2324 2325
	/* This may fail but that's ok */
	pci_enable_pcie_error_reporting(pdev);
2326

2327 2328
	ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
	if (!ha) {
2329 2330
		ql_log_pci(ql_log_fatal, pdev, 0x0009,
		    "Unable to allocate memory for ha.\n");
2331
		goto probe_out;
L
Linus Torvalds 已提交
2332
	}
2333 2334
	ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
	    "Memory allocated for ha=%p.\n", ha);
2335
	ha->pdev = pdev;
2336
	ha->tgt.enable_class_2 = ql2xenableclass2;
2337 2338
	INIT_LIST_HEAD(&ha->tgt.q_full_list);
	spin_lock_init(&ha->tgt.q_full_lock);
L
Linus Torvalds 已提交
2339 2340

	/* Clear our data area */
2341
	ha->bars = bars;
2342
	ha->mem_only = mem_only;
2343
	spin_lock_init(&ha->hardware_lock);
2344
	spin_lock_init(&ha->vport_slock);
2345
	mutex_init(&ha->selflogin_lock);
2346
	mutex_init(&ha->optrom_mutex);
L
Linus Torvalds 已提交
2347

2348 2349
	/* Set ISP-type information. */
	qla2x00_set_isp_flags(ha);
2350 2351

	/* Set EEH reset type to fundamental if required by hba */
2352
	if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2353
	    IS_QLA83XX(ha) || IS_QLA27XX(ha))
2354 2355
		pdev->needs_freset = 1;

2356 2357 2358 2359 2360
	ha->prev_topology = 0;
	ha->init_cb_size = sizeof(init_cb_t);
	ha->link_data_rate = PORT_SPEED_UNKNOWN;
	ha->optrom_size = OPTROM_SIZE_2300;

2361
	/* Assign ISP specific operations. */
L
Linus Torvalds 已提交
2362
	if (IS_QLA2100(ha)) {
2363
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2364
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2365 2366 2367
		req_length = REQUEST_ENTRY_CNT_2100;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2368
		ha->gid_list_info_size = 4;
2369 2370 2371 2372
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2373
		ha->isp_ops = &qla2100_isp_ops;
L
Linus Torvalds 已提交
2374
	} else if (IS_QLA2200(ha)) {
2375
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2376
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2377 2378 2379
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2380
		ha->gid_list_info_size = 4;
2381 2382 2383 2384
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2385
		ha->isp_ops = &qla2100_isp_ops;
2386
	} else if (IS_QLA23XX(ha)) {
2387
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2388
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2389 2390 2391
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2392
		ha->gid_list_info_size = 6;
2393 2394
		if (IS_QLA2322(ha) || IS_QLA6322(ha))
			ha->optrom_size = OPTROM_SIZE_2322;
2395 2396 2397 2398
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2399
		ha->isp_ops = &qla2300_isp_ops;
2400
	} else if (IS_QLA24XX_TYPE(ha)) {
2401
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2402
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2403 2404
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2405
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2406
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2407
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2408
		ha->gid_list_info_size = 8;
2409
		ha->optrom_size = OPTROM_SIZE_24XX;
2410
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2411
		ha->isp_ops = &qla24xx_isp_ops;
2412 2413 2414 2415
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2416
	} else if (IS_QLA25XX(ha)) {
2417
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2418
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2419 2420
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2421
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2422
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2423 2424 2425
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_25XX;
2426
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2427
		ha->isp_ops = &qla25xx_isp_ops;
2428 2429 2430 2431 2432
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
	} else if (IS_QLA81XX(ha)) {
2433
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2434 2435 2436
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2437
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2438 2439 2440 2441
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_81XX;
2442
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2443 2444 2445 2446 2447
		ha->isp_ops = &qla81xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2448
	} else if (IS_QLA82XX(ha)) {
2449
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2450 2451 2452 2453 2454 2455 2456
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_82XX;
2457
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2458 2459 2460 2461 2462
		ha->isp_ops = &qla82xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477
	} else if (IS_QLA8044(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla8044_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2478
	} else if (IS_QLA83XX(ha)) {
2479
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
2480
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2481
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2482
		req_length = REQUEST_ENTRY_CNT_83XX;
2483
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2484
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2485 2486 2487 2488 2489 2490 2491 2492 2493 2494
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla83xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2495 2496 2497 2498 2499 2500 2501 2502 2503 2504
	}  else if (IS_QLAFX00(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
		ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
		ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
		req_length = REQUEST_ENTRY_CNT_FX00;
		rsp_length = RESPONSE_ENTRY_CNT_FX00;
		ha->isp_ops = &qlafx00_isp_ops;
		ha->port_down_retry_count = 30; /* default value */
		ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
		ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2505
		ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2506
		ha->mr.fw_hbt_en = 1;
2507 2508
		ha->mr.host_info_resend = false;
		ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2509 2510 2511 2512 2513 2514
	} else if (IS_QLA27XX(ha)) {
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2515
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2516 2517 2518 2519 2520 2521 2522 2523 2524 2525
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla27xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
L
Linus Torvalds 已提交
2526
	}
2527

2528 2529 2530
	ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
	    "mbx_count=%d, req_length=%d, "
	    "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2531 2532
	    "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
	    "max_fibre_devices=%d.\n",
2533 2534
	    ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
	    ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2535
	    ha->nvram_npiv_size, ha->max_fibre_devices);
2536 2537 2538 2539 2540
	ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
	    "isp_ops=%p, flash_conf_off=%d, "
	    "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
	    ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
	    ha->nvram_conf_off, ha->nvram_data_off);
2541 2542 2543 2544

	/* Configure PCI I/O space */
	ret = ha->isp_ops->iospace_config(ha);
	if (ret)
2545
		goto iospace_config_failed;
2546 2547 2548 2549

	ql_log_pci(ql_log_info, pdev, 0x001d,
	    "Found an ISP%04X irq %d iobase 0x%p.\n",
	    pdev->device, pdev->irq, ha->iobase);
2550
	mutex_init(&ha->vport_lock);
2551 2552 2553
	init_completion(&ha->mbx_cmd_comp);
	complete(&ha->mbx_cmd_comp);
	init_completion(&ha->mbx_intr_comp);
2554
	init_completion(&ha->dcbx_comp);
2555
	init_completion(&ha->lb_portup_comp);
L
Linus Torvalds 已提交
2556

2557
	set_bit(0, (unsigned long *) ha->vp_idx_map);
L
Linus Torvalds 已提交
2558

2559
	qla2x00_config_dma_addressing(ha);
2560 2561 2562 2563
	ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
	    "64 Bit addressing is %s.\n",
	    ha->flags.enable_64bit_addressing ? "enable" :
	    "disable");
2564
	ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2565
	if (ret) {
2566 2567
		ql_log_pci(ql_log_fatal, pdev, 0x0031,
		    "Failed to allocate memory for adapter, aborting.\n");
L
Linus Torvalds 已提交
2568

2569 2570 2571
		goto probe_hw_failed;
	}

2572
	req->max_q_depth = MAX_Q_DEPTH;
2573
	if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2574 2575
		req->max_q_depth = ql2xmaxqdepth;

2576 2577 2578

	base_vha = qla2x00_create_host(sht, ha);
	if (!base_vha) {
2579
		ret = -ENOMEM;
2580
		qla2x00_mem_free(ha);
2581 2582
		qla2x00_free_req_que(ha, req);
		qla2x00_free_rsp_que(ha, rsp);
2583
		goto probe_hw_failed;
L
Linus Torvalds 已提交
2584 2585
	}

2586
	pci_set_drvdata(pdev, base_vha);
2587
	set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2588 2589

	host = base_vha->host;
2590
	base_vha->req = req;
2591
	if (IS_QLA2XXX_MIDTYPE(ha))
2592
		base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2593
	else
2594 2595
		base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
						base_vha->vp_idx;
2596

2597 2598 2599 2600 2601 2602 2603 2604
	/* Setup fcport template structure. */
	ha->mr.fcport.vha = base_vha;
	ha->mr.fcport.port_type = FCT_UNKNOWN;
	ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
	qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
	ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
	ha->mr.fcport.scan_state = 1;

2605 2606 2607 2608 2609 2610 2611 2612
	/* Set the SG table size based on ISP type */
	if (!IS_FWI2_CAPABLE(ha)) {
		if (IS_QLA2100(ha))
			host->sg_tablesize = 32;
	} else {
		if (!IS_QLA82XX(ha))
			host->sg_tablesize = QLA_SG_ALL;
	}
2613
	host->max_id = ha->max_fibre_devices;
2614 2615
	host->cmd_per_lun = 3;
	host->unique_id = host->host_no;
2616
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2617 2618 2619
		host->max_cmd_len = 32;
	else
		host->max_cmd_len = MAX_CMDSZ;
2620
	host->max_channel = MAX_BUSES - 1;
2621 2622 2623 2624 2625 2626
	/* Older HBAs support only 16-bit LUNs */
	if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
	    ql2xmaxlun > 0xffff)
		host->max_lun = 0xffff;
	else
		host->max_lun = ql2xmaxlun;
2627
	host->transportt = qla2xxx_transport_template;
2628
	sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2629

2630 2631 2632
	ql_dbg(ql_dbg_init, base_vha, 0x0033,
	    "max_id=%d this_id=%d "
	    "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2633
	    "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2634 2635 2636 2637
	    host->this_id, host->cmd_per_lun, host->unique_id,
	    host->max_cmd_len, host->max_channel, host->max_lun,
	    host->transportt, sht->vendor_id);

2638 2639 2640 2641 2642 2643 2644 2645 2646
que_init:
	/* Alloc arrays of request and response ring ptrs */
	if (!qla2x00_alloc_queues(ha, req, rsp)) {
		ql_log(ql_log_fatal, base_vha, 0x003d,
		    "Failed to allocate memory for queue pointers..."
		    "aborting.\n");
		goto probe_init_failed;
	}

2647
	qlt_probe_one_stage1(base_vha, ha);
2648

2649 2650 2651
	/* Set up the irqs */
	ret = qla2x00_request_irqs(ha, rsp);
	if (ret)
2652
		goto probe_init_failed;
2653 2654 2655

	pci_save_state(pdev);

2656
	/* Assign back pointers */
2657 2658
	rsp->req = req;
	req->rsp = rsp;
2659

2660 2661 2662 2663 2664 2665 2666
	if (IS_QLAFX00(ha)) {
		ha->rsp_q_map[0] = rsp;
		ha->req_q_map[0] = req;
		set_bit(0, ha->req_qid_map);
		set_bit(0, ha->rsp_qid_map);
	}

2667 2668 2669 2670 2671
	/* FWI2-capable only. */
	req->req_q_in = &ha->iobase->isp24.req_q_in;
	req->req_q_out = &ha->iobase->isp24.req_q_out;
	rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
	rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2672
	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2673 2674 2675 2676
		req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
		req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
		rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
		rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2677 2678
	}

2679 2680 2681 2682 2683 2684 2685
	if (IS_QLAFX00(ha)) {
		req->req_q_in = &ha->iobase->ispfx00.req_q_in;
		req->req_q_out = &ha->iobase->ispfx00.req_q_out;
		rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
		rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
	}

2686
	if (IS_P3P_TYPE(ha)) {
2687 2688 2689 2690 2691
		req->req_q_out = &ha->iobase->isp82.req_q_out[0];
		rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
		rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
	}

2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705
	ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
	    "req->req_q_in=%p req->req_q_out=%p "
	    "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out,
	    rsp->rsp_q_in, rsp->rsp_q_out);
	ql_dbg(ql_dbg_init, base_vha, 0x003e,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_init, base_vha, 0x003f,
	    "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
L
Linus Torvalds 已提交
2706

2707
	if (ha->isp_ops->initialize_adapter(base_vha)) {
2708 2709 2710
		ql_log(ql_log_fatal, base_vha, 0x00d6,
		    "Failed to initialize adapter - Adapter flags %x.\n",
		    base_vha->device_flags);
L
Linus Torvalds 已提交
2711

2712 2713 2714
		if (IS_QLA82XX(ha)) {
			qla82xx_idc_lock(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2715
				QLA8XXX_DEV_FAILED);
2716
			qla82xx_idc_unlock(ha);
2717 2718
			ql_log(ql_log_fatal, base_vha, 0x00d7,
			    "HW State: FAILED.\n");
2719 2720 2721 2722 2723 2724 2725 2726
		} else if (IS_QLA8044(ha)) {
			qla8044_idc_lock(ha);
			qla8044_wr_direct(base_vha,
				QLA8044_CRB_DEV_STATE_INDEX,
				QLA8XXX_DEV_FAILED);
			qla8044_idc_unlock(ha);
			ql_log(ql_log_fatal, base_vha, 0x0150,
			    "HW State: FAILED.\n");
2727 2728
		}

2729
		ret = -ENODEV;
L
Linus Torvalds 已提交
2730 2731 2732
		goto probe_failed;
	}

2733 2734 2735 2736 2737 2738 2739 2740 2741 2742
	if (IS_QLAFX00(ha))
		host->can_queue = QLAFX00_MAX_CANQUEUE;
	else
		host->can_queue = req->num_outstanding_cmds - 10;

	ql_dbg(ql_dbg_init, base_vha, 0x0032,
	    "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
	    host->can_queue, base_vha->req,
	    base_vha->mgmt_svr_loop_id, host->sg_tablesize);

2743 2744
	if (ha->mqenable) {
		if (qla25xx_setup_mode(base_vha)) {
2745 2746
			ql_log(ql_log_warn, base_vha, 0x00ec,
			    "Failed to create queues, falling back to single queue mode.\n");
2747 2748 2749
			goto que_init;
		}
	}
2750

2751 2752 2753
	if (ha->flags.running_gold_fw)
		goto skip_dpc;

L
Linus Torvalds 已提交
2754 2755 2756
	/*
	 * Startup the kernel thread for this host adapter
	 */
2757
	ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2758
	    "%s_dpc", base_vha->host_str);
2759
	if (IS_ERR(ha->dpc_thread)) {
2760 2761
		ql_log(ql_log_fatal, base_vha, 0x00ed,
		    "Failed to start DPC thread.\n");
2762
		ret = PTR_ERR(ha->dpc_thread);
L
Linus Torvalds 已提交
2763 2764
		goto probe_failed;
	}
2765 2766
	ql_dbg(ql_dbg_init, base_vha, 0x00ee,
	    "DPC thread started successfully.\n");
L
Linus Torvalds 已提交
2767

2768 2769 2770 2771 2772 2773 2774 2775
	/*
	 * If we're not coming up in initiator mode, we might sit for
	 * a while without waking up the dpc thread, which leads to a
	 * stuck process warning.  So just kick the dpc once here and
	 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
	 */
	qla2xxx_wake_dpc(base_vha);

2776 2777
	INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);

2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791
	if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
		sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
		ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);

		sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
		ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
		INIT_WORK(&ha->idc_state_handler,
		    qla83xx_idc_state_handler_work);
		INIT_WORK(&ha->nic_core_unrecoverable,
		    qla83xx_nic_core_unrecoverable_work);
	}

2792
skip_dpc:
2793 2794
	list_add_tail(&base_vha->list, &ha->vp_list);
	base_vha->host->irq = ha->pdev->irq;
L
Linus Torvalds 已提交
2795 2796

	/* Initialized the timer */
2797
	qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2798 2799 2800 2801 2802 2803
	ql_dbg(ql_dbg_init, base_vha, 0x00ef,
	    "Started qla2x00_timer with "
	    "interval=%d.\n", WATCH_INTERVAL);
	ql_dbg(ql_dbg_init, base_vha, 0x00f0,
	    "Detected hba at address=%p.\n",
	    ha);
2804

2805
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2806
		if (ha->fw_attributes & BIT_4) {
2807
			int prot = 0, guard;
2808
			base_vha->flags.difdix_supported = 1;
2809 2810
			ql_dbg(ql_dbg_init, base_vha, 0x00f1,
			    "Registering for DIF/DIX type 1 and 3 protection.\n");
2811 2812
			if (ql2xenabledif == 1)
				prot = SHOST_DIX_TYPE0_PROTECTION;
2813
			scsi_host_set_prot(host,
2814
			    prot | SHOST_DIF_TYPE1_PROTECTION
2815
			    | SHOST_DIF_TYPE2_PROTECTION
2816 2817
			    | SHOST_DIF_TYPE3_PROTECTION
			    | SHOST_DIX_TYPE1_PROTECTION
2818
			    | SHOST_DIX_TYPE2_PROTECTION
2819
			    | SHOST_DIX_TYPE3_PROTECTION);
2820 2821 2822 2823 2824 2825 2826 2827

			guard = SHOST_DIX_GUARD_CRC;

			if (IS_PI_IPGUARD_CAPABLE(ha) &&
			    (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
				guard |= SHOST_DIX_GUARD_IP;

			scsi_host_set_guard(host, guard);
2828 2829 2830 2831
		} else
			base_vha->flags.difdix_supported = 0;
	}

2832 2833
	ha->isp_ops->enable_intrs(ha);

2834 2835 2836 2837 2838 2839 2840
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
		host->sg_tablesize = (ha->mr.extended_io_enabled) ?
		    QLA_SG_ALL : 128;
	}

2841 2842 2843 2844
	ret = scsi_add_host(host, &pdev->dev);
	if (ret)
		goto probe_failed;

2845 2846
	base_vha->flags.init_done = 1;
	base_vha->flags.online = 1;
2847
	ha->prev_minidump_failed = 0;
2848

2849 2850 2851
	ql_dbg(ql_dbg_init, base_vha, 0x00f2,
	    "Init done and hba is online.\n");

2852 2853 2854 2855 2856
	if (qla_ini_mode_enabled(base_vha))
		scsi_scan_host(host);
	else
		ql_dbg(ql_dbg_init, base_vha, 0x0122,
			"skipping scsi_scan_host() for non-initiator port\n");
2857

2858
	qla2x00_alloc_sysfs_attr(base_vha);
2859

2860 2861 2862 2863 2864 2865 2866 2867 2868
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);

		/* Register system information */
		ret =  qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
	}

2869
	qla2x00_init_host_attr(base_vha);
2870

2871
	qla2x00_dfs_setup(base_vha);
2872

2873 2874
	ql_log(ql_log_info, base_vha, 0x00fb,
	    "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2875 2876 2877 2878 2879
	ql_log(ql_log_info, base_vha, 0x00fc,
	    "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
	    pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
	    pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
	    base_vha->host_no,
2880
	    ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
L
Linus Torvalds 已提交
2881

2882 2883
	qlt_add_target(ha, base_vha);

2884
	clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
L
Linus Torvalds 已提交
2885 2886
	return 0;

2887
probe_init_failed:
2888
	qla2x00_free_req_que(ha, req);
2889 2890
	ha->req_q_map[0] = NULL;
	clear_bit(0, ha->req_qid_map);
2891
	qla2x00_free_rsp_que(ha, rsp);
2892 2893
	ha->rsp_q_map[0] = NULL;
	clear_bit(0, ha->rsp_qid_map);
2894
	ha->max_req_queues = ha->max_rsp_queues = 0;
2895

L
Linus Torvalds 已提交
2896
probe_failed:
2897 2898 2899 2900 2901 2902 2903 2904 2905 2906
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);
	base_vha->flags.online = 0;
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		ha->dpc_thread = NULL;
		kthread_stop(t);
	}

2907
	qla2x00_free_device(base_vha);
L
Linus Torvalds 已提交
2908

2909
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
2910

2911
probe_hw_failed:
2912 2913
	qla2x00_clear_drv_active(ha);

2914
iospace_config_failed:
2915
	if (IS_P3P_TYPE(ha)) {
2916
		if (!ha->nx_pcibase)
2917
			iounmap((device_reg_t *)ha->nx_pcibase);
2918
		if (!ql2xdbwr)
2919
			iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2920 2921 2922
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
2923 2924
		if (ha->cregbase)
			iounmap(ha->cregbase);
2925
	}
2926 2927 2928
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
2929

2930
probe_out:
2931
	pci_disable_device(pdev);
2932
	return ret;
L
Linus Torvalds 已提交
2933 2934
}

2935 2936 2937 2938 2939 2940
static void
qla2x00_shutdown(struct pci_dev *pdev)
{
	scsi_qla_host_t *vha;
	struct qla_hw_data  *ha;

2941 2942 2943
	if (!atomic_read(&pdev->enable_cnt))
		return;

2944 2945 2946
	vha = pci_get_drvdata(pdev);
	ha = vha->hw;

2947 2948 2949 2950
	/* Notify ISPFX00 firmware */
	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(vha, 20);

2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975
	/* Turn-off FCE trace */
	if (ha->flags.fce_enabled) {
		qla2x00_disable_fce_trace(vha, NULL, NULL);
		ha->flags.fce_enabled = 0;
	}

	/* Turn-off EFT trace */
	if (ha->eft)
		qla2x00_disable_eft_trace(vha);

	/* Stop currently executing firmware. */
	qla2x00_try_to_stop_firmware(vha);

	/* Turn adapter off line */
	vha->flags.online = 0;

	/* turn-off interrupts on the card */
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
		ha->isp_ops->disable_intrs(ha);
	}

	qla2x00_free_irqs(vha);

	qla2x00_free_fw_dump(ha);
2976 2977 2978

	pci_disable_pcie_error_reporting(pdev);
	pci_disable_device(pdev);
2979 2980
}

2981
/* Deletes all the virtual ports for a given ha */
A
Adrian Bunk 已提交
2982
static void
2983
qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
L
Linus Torvalds 已提交
2984
{
2985
	scsi_qla_host_t *vha;
2986
	unsigned long flags;
2987

2988 2989 2990
	mutex_lock(&ha->vport_lock);
	while (ha->cur_vport_count) {
		spin_lock_irqsave(&ha->vport_slock, flags);
2991

2992 2993 2994
		BUG_ON(base_vha->list.next == &ha->vp_list);
		/* This assumes first entry in ha->vp_list is always base vha */
		vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2995
		scsi_host_get(vha->host);
2996

2997 2998 2999 3000 3001
		spin_unlock_irqrestore(&ha->vport_slock, flags);
		mutex_unlock(&ha->vport_lock);

		fc_vport_terminate(vha->fc_vport);
		scsi_host_put(vha->host);
3002

3003
		mutex_lock(&ha->vport_lock);
3004
	}
3005
	mutex_unlock(&ha->vport_lock);
3006
}
L
Linus Torvalds 已提交
3007

3008 3009 3010 3011
/* Stops all deferred work threads */
static void
qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
{
3012 3013 3014 3015 3016 3017 3018
	/* Flush the work queue and remove it */
	if (ha->wq) {
		flush_workqueue(ha->wq);
		destroy_workqueue(ha->wq);
		ha->wq = NULL;
	}

3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033
	/* Cancel all work and destroy DPC workqueues */
	if (ha->dpc_lp_wq) {
		cancel_work_sync(&ha->idc_aen);
		destroy_workqueue(ha->dpc_lp_wq);
		ha->dpc_lp_wq = NULL;
	}

	if (ha->dpc_hp_wq) {
		cancel_work_sync(&ha->nic_core_reset);
		cancel_work_sync(&ha->idc_state_handler);
		cancel_work_sync(&ha->nic_core_unrecoverable);
		destroy_workqueue(ha->dpc_hp_wq);
		ha->dpc_hp_wq = NULL;
	}

3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044
	/* Kill the kernel thread for this host */
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		/*
		 * qla2xxx_wake_dpc checks for ->dpc_thread
		 * so we need to zero it out.
		 */
		ha->dpc_thread = NULL;
		kthread_stop(t);
	}
3045
}
L
Linus Torvalds 已提交
3046

3047 3048 3049
static void
qla2x00_unmap_iobases(struct qla_hw_data *ha)
{
3050
	if (IS_QLA82XX(ha)) {
3051

3052
		iounmap((device_reg_t *)ha->nx_pcibase);
3053
		if (!ql2xdbwr)
3054
			iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3055 3056 3057
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
L
Linus Torvalds 已提交
3058

3059 3060 3061
		if (ha->cregbase)
			iounmap(ha->cregbase);

3062 3063
		if (ha->mqiobase)
			iounmap(ha->mqiobase);
3064

3065
		if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3066
			iounmap(ha->msixbase);
3067
	}
3068 3069 3070
}

static void
3071
qla2x00_clear_drv_active(struct qla_hw_data *ha)
3072 3073 3074
{
	if (IS_QLA8044(ha)) {
		qla8044_idc_lock(ha);
3075
		qla8044_clear_drv_active(ha);
3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089
		qla8044_idc_unlock(ha);
	} else if (IS_QLA82XX(ha)) {
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);
	}
}

static void
qla2x00_remove_one(struct pci_dev *pdev)
{
	scsi_qla_host_t *base_vha;
	struct qla_hw_data  *ha;

3090 3091 3092 3093 3094 3095 3096 3097
	base_vha = pci_get_drvdata(pdev);
	ha = base_vha->hw;

	/* Indicate device removal to prevent future board_disable and wait
	 * until any pending board_disable has completed. */
	set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
	cancel_work_sync(&ha->board_disable);

3098
	/*
3099 3100 3101
	 * If the PCI device is disabled then there was a PCI-disconnect and
	 * qla2x00_disable_board_on_pci_error has taken care of most of the
	 * resources.
3102
	 */
3103 3104 3105 3106
	if (!atomic_read(&pdev->enable_cnt)) {
		scsi_host_put(base_vha->host);
		kfree(ha);
		pci_set_drvdata(pdev, NULL);
3107
		return;
3108
	}
3109

3110 3111
	qla2x00_wait_for_hba_ready(base_vha);

3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132
	set_bit(UNLOADING, &base_vha->dpc_flags);

	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(base_vha, 20);

	qla2x00_delete_all_vps(ha, base_vha);

	if (IS_QLA8031(ha)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
		    "Clearing fcoe driver presence.\n");
		if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
			ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
			    "Error while clearing DRV-Presence.\n");
	}

	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

	qla2x00_dfs_remove(base_vha);

	qla84xx_put_chip(base_vha);

3133 3134 3135 3136
	/* Laser should be disabled only for ISP2031 */
	if (IS_QLA2031(ha))
		qla83xx_disable_laser(base_vha);

3137 3138 3139 3140 3141 3142
	/* Disable timer */
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

3143 3144 3145 3146
	/* free DMA memory */
	if (ha->exlogin_buf)
		qla2x00_free_exlogin_buffer(ha);

3147 3148 3149 3150
	/* free DMA memory */
	if (ha->exchoffld_buf)
		qla2x00_free_exchoffld_buffer(ha);

3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162
	qla2x00_destroy_deferred_work(ha);

	qlt_remove_target(ha, base_vha);

	qla2x00_free_sysfs_attr(base_vha, true);

	fc_remove_host(base_vha->host);

	scsi_remove_host(base_vha->host);

	qla2x00_free_device(base_vha);

3163
	qla2x00_clear_drv_active(ha);
3164

3165 3166
	scsi_host_put(base_vha->host);

3167
	qla2x00_unmap_iobases(ha);
3168

3169 3170 3171
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
3172

3173 3174
	pci_disable_pcie_error_reporting(pdev);

3175
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
3176 3177 3178
}

static void
3179
qla2x00_free_device(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
3180
{
3181
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
3182

3183 3184 3185 3186 3187 3188
	qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);

	/* Disable timer */
	if (vha->timer_active)
		qla2x00_stop_timer(vha);

3189
	qla25xx_delete_queues(vha);
3190

3191
	if (ha->flags.fce_enabled)
3192
		qla2x00_disable_fce_trace(vha, NULL, NULL);
3193

3194
	if (ha->eft)
3195
		qla2x00_disable_eft_trace(vha);
3196

3197
	/* Stop currently executing firmware. */
3198
	qla2x00_try_to_stop_firmware(vha);
L
Linus Torvalds 已提交
3199

3200 3201
	vha->flags.online = 0;

3202
	/* turn-off interrupts on the card */
3203 3204
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
3205
		ha->isp_ops->disable_intrs(ha);
3206
	}
3207

3208
	qla2x00_free_irqs(vha);
L
Linus Torvalds 已提交
3209

3210 3211
	qla2x00_free_fcports(vha);

3212
	qla2x00_mem_free(ha);
3213

3214 3215
	qla82xx_md_free(vha);

3216
	qla2x00_free_queues(ha);
L
Linus Torvalds 已提交
3217 3218
}

3219 3220 3221 3222 3223 3224
void qla2x00_free_fcports(struct scsi_qla_host *vha)
{
	fc_port_t *fcport, *tfcport;

	list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
		list_del(&fcport->list);
3225
		qla2x00_clear_loop_id(fcport);
3226 3227 3228 3229 3230
		kfree(fcport);
		fcport = NULL;
	}
}

3231
static inline void
3232
qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3233 3234 3235
    int defer)
{
	struct fc_rport *rport;
3236
	scsi_qla_host_t *base_vha;
3237
	unsigned long flags;
3238 3239 3240 3241 3242 3243

	if (!fcport->rport)
		return;

	rport = fcport->rport;
	if (defer) {
3244
		base_vha = pci_get_drvdata(vha->hw->pdev);
3245
		spin_lock_irqsave(vha->host->host_lock, flags);
3246
		fcport->drport = rport;
3247
		spin_unlock_irqrestore(vha->host->host_lock, flags);
3248
		qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3249 3250
		set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
		qla2xxx_wake_dpc(base_vha);
3251
	} else {
3252
		int now;
3253 3254
		if (rport)
			fc_remote_port_delete(rport);
3255 3256
		qlt_do_generation_tick(vha, &now);
		qlt_fc_port_deleted(vha, fcport, now);
3257
	}
3258 3259
}

L
Linus Torvalds 已提交
3260 3261 3262 3263 3264 3265 3266 3267 3268
/*
 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
 *
 * Input: ha = adapter block pointer.  fcport = port structure pointer.
 *
 * Return: None.
 *
 * Context:
 */
3269
void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3270
    int do_login, int defer)
L
Linus Torvalds 已提交
3271
{
3272 3273 3274 3275 3276 3277
	if (IS_QLAFX00(vha->hw)) {
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
		qla2x00_schedule_rport_del(vha, fcport, defer);
		return;
	}

3278
	if (atomic_read(&fcport->state) == FCS_ONLINE &&
3279
	    vha->vp_idx == fcport->vha->vp_idx) {
3280
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3281 3282
		qla2x00_schedule_rport_del(vha, fcport, defer);
	}
A
Andrew Vasquez 已提交
3283
	/*
L
Linus Torvalds 已提交
3284 3285 3286 3287
	 * We may need to retry the login, so don't change the state of the
	 * port but do the retries.
	 */
	if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3288
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
L
Linus Torvalds 已提交
3289 3290 3291 3292

	if (!do_login)
		return;

3293 3294
	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);

L
Linus Torvalds 已提交
3295
	if (fcport->login_retry == 0) {
3296
		fcport->login_retry = vha->hw->login_retry_count;
L
Linus Torvalds 已提交
3297

3298
		ql_dbg(ql_dbg_disc, vha, 0x2067,
3299 3300
		    "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
		    fcport->port_name, fcport->loop_id, fcport->login_retry);
L
Linus Torvalds 已提交
3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317
	}
}

/*
 * qla2x00_mark_all_devices_lost
 *	Updates fcport state when device goes offline.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fcport = port structure pointer.
 *
 * Return:
 *	None.
 *
 * Context:
 */
void
3318
qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
L
Linus Torvalds 已提交
3319 3320 3321
{
	fc_port_t *fcport;

3322
	list_for_each_entry(fcport, &vha->vp_fcports, list) {
3323
		if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
L
Linus Torvalds 已提交
3324
			continue;
3325

L
Linus Torvalds 已提交
3326 3327 3328 3329 3330 3331
		/*
		 * No point in marking the device as lost, if the device is
		 * already DEAD.
		 */
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
			continue;
3332
		if (atomic_read(&fcport->state) == FCS_ONLINE) {
3333
			qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3334 3335
			if (defer)
				qla2x00_schedule_rport_del(vha, fcport, defer);
3336
			else if (vha->vp_idx == fcport->vha->vp_idx)
3337 3338
				qla2x00_schedule_rport_del(vha, fcport, defer);
		}
L
Linus Torvalds 已提交
3339 3340 3341 3342 3343 3344 3345 3346 3347
	}
}

/*
* qla2x00_mem_alloc
*      Allocates adapter memory.
*
* Returns:
*      0  = success.
3348
*      !0  = failure.
L
Linus Torvalds 已提交
3349
*/
3350
static int
3351 3352
qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
	struct req_que **req, struct rsp_que **rsp)
L
Linus Torvalds 已提交
3353 3354 3355
{
	char	name[16];

3356
	ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3357
		&ha->init_cb_dma, GFP_KERNEL);
3358
	if (!ha->init_cb)
3359
		goto fail;
3360

3361 3362 3363
	if (qlt_mem_alloc(ha) < 0)
		goto fail_free_init_cb;

3364 3365
	ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
		qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3366
	if (!ha->gid_list)
3367
		goto fail_free_tgt_mem;
L
Linus Torvalds 已提交
3368

3369 3370
	ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
	if (!ha->srb_mempool)
3371
		goto fail_free_gid_list;
3372

3373
	if (IS_P3P_TYPE(ha)) {
3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385
		/* Allocate cache for CT6 Ctx. */
		if (!ctx_cachep) {
			ctx_cachep = kmem_cache_create("qla2xxx_ctx",
				sizeof(struct ct6_dsd), 0,
				SLAB_HWCACHE_ALIGN, NULL);
			if (!ctx_cachep)
				goto fail_free_gid_list;
		}
		ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
			ctx_cachep);
		if (!ha->ctx_mempool)
			goto fail_free_srb_mempool;
3386 3387 3388
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
		    "ctx_cachep=%p ctx_mempool=%p.\n",
		    ctx_cachep, ha->ctx_mempool);
3389 3390
	}

3391 3392 3393
	/* Get memory for cached NVRAM */
	ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
	if (!ha->nvram)
3394
		goto fail_free_ctx_mempool;
3395

3396 3397 3398 3399 3400 3401 3402
	snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
		ha->pdev->device);
	ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
		DMA_POOL_SIZE, 8, 0);
	if (!ha->s_dma_pool)
		goto fail_free_nvram;

3403 3404 3405 3406
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
	    "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
	    ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);

3407
	if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3408 3409 3410
		ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			DSD_LIST_DMA_POOL_SIZE, 8, 0);
		if (!ha->dl_dma_pool) {
3411 3412
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
			    "Failed to allocate memory for dl_dma_pool.\n");
3413 3414 3415 3416 3417 3418
			goto fail_s_dma_pool;
		}

		ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			FCP_CMND_DMA_POOL_SIZE, 8, 0);
		if (!ha->fcp_cmnd_dma_pool) {
3419 3420
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
			    "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3421 3422
			goto fail_dl_dma_pool;
		}
3423 3424 3425
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
		    "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
		    ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3426 3427
	}

3428 3429
	/* Allocate memory for SNS commands */
	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3430
	/* Get consistent memory allocated for SNS commands */
3431
		ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3432
		sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3433
		if (!ha->sns_cmd)
3434
			goto fail_dma_pool;
3435
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3436
		    "sns_cmd: %p.\n", ha->sns_cmd);
3437
	} else {
3438
	/* Get consistent memory allocated for MS IOCB */
3439
		ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3440
			&ha->ms_iocb_dma);
3441
		if (!ha->ms_iocb)
3442 3443
			goto fail_dma_pool;
	/* Get consistent memory allocated for CT SNS commands */
3444
		ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3445
			sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3446 3447
		if (!ha->ct_sns)
			goto fail_free_ms_iocb;
3448 3449 3450
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
		    "ms_iocb=%p ct_sns=%p.\n",
		    ha->ms_iocb, ha->ct_sns);
L
Linus Torvalds 已提交
3451 3452
	}

3453
	/* Allocate memory for request ring */
3454 3455
	*req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
	if (!*req) {
3456 3457
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
		    "Failed to allocate memory for req.\n");
3458 3459
		goto fail_req;
	}
3460 3461 3462 3463 3464
	(*req)->length = req_len;
	(*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*req)->length + 1) * sizeof(request_t),
		&(*req)->dma, GFP_KERNEL);
	if (!(*req)->ring) {
3465 3466
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
		    "Failed to allocate memory for req_ring.\n");
3467 3468 3469
		goto fail_req_ring;
	}
	/* Allocate memory for response ring */
3470 3471
	*rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
	if (!*rsp) {
3472 3473
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
		    "Failed to allocate memory for rsp.\n");
3474 3475
		goto fail_rsp;
	}
3476 3477 3478 3479 3480 3481
	(*rsp)->hw = ha;
	(*rsp)->length = rsp_len;
	(*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*rsp)->length + 1) * sizeof(response_t),
		&(*rsp)->dma, GFP_KERNEL);
	if (!(*rsp)->ring) {
3482 3483
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
		    "Failed to allocate memory for rsp_ring.\n");
3484 3485
		goto fail_rsp_ring;
	}
3486 3487
	(*req)->rsp = *rsp;
	(*rsp)->req = *req;
3488 3489 3490 3491 3492
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
	    "req=%p req->length=%d req->ring=%p rsp=%p "
	    "rsp->length=%d rsp->ring=%p.\n",
	    *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
	    (*rsp)->ring);
3493 3494 3495
	/* Allocate memory for NVRAM data for vports */
	if (ha->nvram_npiv_size) {
		ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3496
		    ha->nvram_npiv_size, GFP_KERNEL);
3497
		if (!ha->npiv_info) {
3498 3499
			ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
			    "Failed to allocate memory for npiv_info.\n");
3500 3501 3502 3503
			goto fail_npiv_info;
		}
	} else
		ha->npiv_info = NULL;
3504

3505
	/* Get consistent memory allocated for EX-INIT-CB. */
3506
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3507 3508 3509 3510
		ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
		    &ha->ex_init_cb_dma);
		if (!ha->ex_init_cb)
			goto fail_ex_init_cb;
3511 3512
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
		    "ex_init_cb=%p.\n", ha->ex_init_cb);
3513 3514
	}

3515 3516
	INIT_LIST_HEAD(&ha->gbl_dsd_list);

3517 3518 3519 3520 3521 3522
	/* Get consistent memory allocated for Async Port-Database. */
	if (!IS_FWI2_CAPABLE(ha)) {
		ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
			&ha->async_pd_dma);
		if (!ha->async_pd)
			goto fail_async_pd;
3523 3524
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
		    "async_pd=%p.\n", ha->async_pd);
3525 3526
	}

3527
	INIT_LIST_HEAD(&ha->vp_list);
3528 3529 3530 3531 3532 3533 3534 3535 3536

	/* Allocate memory for our loop_id bitmap */
	ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
	    GFP_KERNEL);
	if (!ha->loop_id_map)
		goto fail_async_pd;
	else {
		qla2x00_set_reserved_loop_ids(ha);
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3537
		    "loop_id_map=%p.\n", ha->loop_id_map);
3538 3539
	}

3540
	return 0;
3541

3542 3543
fail_async_pd:
	dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3544 3545
fail_ex_init_cb:
	kfree(ha->npiv_info);
3546 3547 3548 3549 3550
fail_npiv_info:
	dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
		sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
	(*rsp)->ring = NULL;
	(*rsp)->dma = 0;
3551
fail_rsp_ring:
3552
	kfree(*rsp);
3553
fail_rsp:
3554 3555 3556 3557
	dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
		sizeof(request_t), (*req)->ring, (*req)->dma);
	(*req)->ring = NULL;
	(*req)->dma = 0;
3558
fail_req_ring:
3559
	kfree(*req);
3560 3561 3562 3563 3564
fail_req:
	dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
		ha->ct_sns, ha->ct_sns_dma);
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
3565 3566 3567 3568
fail_free_ms_iocb:
	dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
3569
fail_dma_pool:
3570
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3571 3572 3573 3574
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);
		ha->fcp_cmnd_dma_pool = NULL;
	}
fail_dl_dma_pool:
3575
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3576 3577 3578 3579
		dma_pool_destroy(ha->dl_dma_pool);
		ha->dl_dma_pool = NULL;
	}
fail_s_dma_pool:
3580 3581
	dma_pool_destroy(ha->s_dma_pool);
	ha->s_dma_pool = NULL;
3582 3583 3584
fail_free_nvram:
	kfree(ha->nvram);
	ha->nvram = NULL;
3585 3586 3587
fail_free_ctx_mempool:
	mempool_destroy(ha->ctx_mempool);
	ha->ctx_mempool = NULL;
3588 3589 3590 3591
fail_free_srb_mempool:
	mempool_destroy(ha->srb_mempool);
	ha->srb_mempool = NULL;
fail_free_gid_list:
3592 3593
	dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
	ha->gid_list,
3594
	ha->gid_list_dma);
3595 3596
	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3597 3598
fail_free_tgt_mem:
	qlt_mem_free(ha);
3599 3600 3601 3602 3603
fail_free_init_cb:
	dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
	ha->init_cb_dma);
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3604
fail:
3605 3606
	ql_log(ql_log_fatal, NULL, 0x0030,
	    "Memory allocation failure.\n");
3607
	return -ENOMEM;
L
Linus Torvalds 已提交
3608 3609
}

3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675
int
qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
{
	int rval;
	uint16_t	size, max_cnt, temp;
	struct qla_hw_data *ha = vha->hw;

	/* Return if we don't need to alloacate any extended logins */
	if (!ql2xexlogins)
		return QLA_SUCCESS;

	ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
	max_cnt = 0;
	rval = qla_get_exlogin_status(vha, &size, &max_cnt);
	if (rval != QLA_SUCCESS) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
		    "Failed to get exlogin status.\n");
		return rval;
	}

	temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
	ha->exlogin_size = (size * temp);
	ql_log(ql_log_info, vha, 0xd024,
		"EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
		max_cnt, size, temp);

	ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
		ha->exlogin_size);

	/* Get consistent memory for extended logins */
	ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
	    ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
	if (!ha->exlogin_buf) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
		    "Failed to allocate memory for exlogin_buf_dma.\n");
		return -ENOMEM;
	}

	/* Now configure the dma buffer */
	rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
	if (rval) {
		ql_log(ql_log_fatal, vha, 0x00cf,
		    "Setup extended login buffer  ****FAILED****.\n");
		qla2x00_free_exlogin_buffer(ha);
	}

	return rval;
}

/*
* qla2x00_free_exlogin_buffer
*
* Input:
*	ha = adapter block pointer
*/
void
qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
{
	if (ha->exlogin_buf) {
		dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
		    ha->exlogin_buf, ha->exlogin_buf_dma);
		ha->exlogin_buf = NULL;
		ha->exlogin_size = 0;
	}
}

3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743
int
qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
{
	int rval;
	uint16_t	size, max_cnt, temp;
	struct qla_hw_data *ha = vha->hw;

	/* Return if we don't need to alloacate any extended logins */
	if (!ql2xexchoffld)
		return QLA_SUCCESS;

	ql_log(ql_log_info, vha, 0xd014,
	    "Exchange offload count: %d.\n", ql2xexlogins);

	max_cnt = 0;
	rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
	if (rval != QLA_SUCCESS) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
		    "Failed to get exlogin status.\n");
		return rval;
	}

	temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
	ha->exchoffld_size = (size * temp);
	ql_log(ql_log_info, vha, 0xd016,
		"Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
		max_cnt, size, temp);

	ql_log(ql_log_info, vha, 0xd017,
	    "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);

	/* Get consistent memory for extended logins */
	ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
	    ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
	if (!ha->exchoffld_buf) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
		    "Failed to allocate memory for exchoffld_buf_dma.\n");
		return -ENOMEM;
	}

	/* Now configure the dma buffer */
	rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
	if (rval) {
		ql_log(ql_log_fatal, vha, 0xd02e,
		    "Setup exchange offload buffer ****FAILED****.\n");
		qla2x00_free_exchoffld_buffer(ha);
	}

	return rval;
}

/*
* qla2x00_free_exchoffld_buffer
*
* Input:
*	ha = adapter block pointer
*/
void
qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
{
	if (ha->exchoffld_buf) {
		dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
		    ha->exchoffld_buf, ha->exchoffld_buf_dma);
		ha->exchoffld_buf = NULL;
		ha->exchoffld_size = 0;
	}
}

L
Linus Torvalds 已提交
3744
/*
3745 3746
* qla2x00_free_fw_dump
*	Frees fw dump stuff.
L
Linus Torvalds 已提交
3747 3748
*
* Input:
3749
*	ha = adapter block pointer
L
Linus Torvalds 已提交
3750
*/
A
Adrian Bunk 已提交
3751
static void
3752
qla2x00_free_fw_dump(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
3753
{
3754
	if (ha->fce)
3755 3756
		dma_free_coherent(&ha->pdev->dev,
		    FCE_SIZE, ha->fce, ha->fce_dma);
3757

3758 3759 3760 3761 3762
	if (ha->eft)
		dma_free_coherent(&ha->pdev->dev,
		    EFT_SIZE, ha->eft, ha->eft_dma);

	if (ha->fw_dump)
3763
		vfree(ha->fw_dump);
3764 3765 3766
	if (ha->fw_dump_template)
		vfree(ha->fw_dump_template);

3767 3768 3769 3770 3771
	ha->fce = NULL;
	ha->fce_dma = 0;
	ha->eft = NULL;
	ha->eft_dma = 0;
	ha->fw_dumped = 0;
3772
	ha->fw_dump_cap_flags = 0;
3773
	ha->fw_dump_reading = 0;
3774 3775 3776 3777
	ha->fw_dump = NULL;
	ha->fw_dump_len = 0;
	ha->fw_dump_template = NULL;
	ha->fw_dump_template_len = 0;
3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791
}

/*
* qla2x00_mem_free
*      Frees all adapter allocated memory.
*
* Input:
*      ha = adapter block pointer.
*/
static void
qla2x00_mem_free(struct qla_hw_data *ha)
{
	qla2x00_free_fw_dump(ha);

3792 3793 3794 3795
	if (ha->mctp_dump)
		dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
		    ha->mctp_dump_dma);

3796 3797
	if (ha->srb_mempool)
		mempool_destroy(ha->srb_mempool);
3798

3799 3800 3801 3802
	if (ha->dcbx_tlv)
		dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
		    ha->dcbx_tlv, ha->dcbx_tlv_dma);

3803 3804 3805 3806
	if (ha->xgmac_data)
		dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
		    ha->xgmac_data, ha->xgmac_data_dma);

L
Linus Torvalds 已提交
3807 3808
	if (ha->sns_cmd)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3809
		ha->sns_cmd, ha->sns_cmd_dma);
L
Linus Torvalds 已提交
3810 3811 3812

	if (ha->ct_sns)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3813
		ha->ct_sns, ha->ct_sns_dma);
L
Linus Torvalds 已提交
3814

3815 3816 3817
	if (ha->sfp_data)
		dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);

L
Linus Torvalds 已提交
3818 3819 3820
	if (ha->ms_iocb)
		dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);

3821
	if (ha->ex_init_cb)
3822 3823
		dma_pool_free(ha->s_dma_pool,
			ha->ex_init_cb, ha->ex_init_cb_dma);
3824

3825 3826 3827
	if (ha->async_pd)
		dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);

L
Linus Torvalds 已提交
3828 3829 3830 3831
	if (ha->s_dma_pool)
		dma_pool_destroy(ha->s_dma_pool);

	if (ha->gid_list)
3832 3833
		dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
		ha->gid_list, ha->gid_list_dma);
L
Linus Torvalds 已提交
3834

3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858
	if (IS_QLA82XX(ha)) {
		if (!list_empty(&ha->gbl_dsd_list)) {
			struct dsd_dma *dsd_ptr, *tdsd_ptr;

			/* clean up allocated prev pool */
			list_for_each_entry_safe(dsd_ptr,
				tdsd_ptr, &ha->gbl_dsd_list, list) {
				dma_pool_free(ha->dl_dma_pool,
				dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
				list_del(&dsd_ptr->list);
				kfree(dsd_ptr);
			}
		}
	}

	if (ha->dl_dma_pool)
		dma_pool_destroy(ha->dl_dma_pool);

	if (ha->fcp_cmnd_dma_pool)
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);

	if (ha->ctx_mempool)
		mempool_destroy(ha->ctx_mempool);

3859 3860
	qlt_mem_free(ha);

3861 3862
	if (ha->init_cb)
		dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3863
			ha->init_cb, ha->init_cb_dma);
3864 3865
	vfree(ha->optrom_buffer);
	kfree(ha->nvram);
3866
	kfree(ha->npiv_info);
3867
	kfree(ha->swl);
3868
	kfree(ha->loop_id_map);
L
Linus Torvalds 已提交
3869

3870
	ha->srb_mempool = NULL;
3871
	ha->ctx_mempool = NULL;
L
Linus Torvalds 已提交
3872 3873 3874 3875 3876 3877 3878 3879
	ha->sns_cmd = NULL;
	ha->sns_cmd_dma = 0;
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3880 3881
	ha->ex_init_cb = NULL;
	ha->ex_init_cb_dma = 0;
3882 3883
	ha->async_pd = NULL;
	ha->async_pd_dma = 0;
L
Linus Torvalds 已提交
3884 3885

	ha->s_dma_pool = NULL;
3886 3887
	ha->dl_dma_pool = NULL;
	ha->fcp_cmnd_dma_pool = NULL;
L
Linus Torvalds 已提交
3888 3889 3890

	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3891 3892 3893 3894

	ha->tgt.atio_ring = NULL;
	ha->tgt.atio_dma = 0;
	ha->tgt.tgt_vp_map = NULL;
3895
}
L
Linus Torvalds 已提交
3896

3897 3898 3899 3900 3901
struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
						struct qla_hw_data *ha)
{
	struct Scsi_Host *host;
	struct scsi_qla_host *vha = NULL;
3902

3903 3904
	host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
	if (host == NULL) {
3905 3906
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
		    "Failed to allocate host from the scsi layer, aborting.\n");
3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920
		goto fail;
	}

	/* Clear our data area */
	vha = shost_priv(host);
	memset(vha, 0, sizeof(scsi_qla_host_t));

	vha->host = host;
	vha->host_no = host->host_no;
	vha->hw = ha;

	INIT_LIST_HEAD(&vha->vp_fcports);
	INIT_LIST_HEAD(&vha->work_list);
	INIT_LIST_HEAD(&vha->list);
3921 3922
	INIT_LIST_HEAD(&vha->qla_cmd_list);
	INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
3923
	INIT_LIST_HEAD(&vha->logo_list);
3924

3925
	spin_lock_init(&vha->work_lock);
3926
	spin_lock_init(&vha->cmd_list_lock);
3927

3928
	sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3929 3930 3931 3932 3933
	ql_dbg(ql_dbg_init, vha, 0x0041,
	    "Allocated the host=%p hw=%p vha=%p dev_name=%s",
	    vha->host, vha->hw, vha,
	    dev_name(&(ha->pdev->dev)));

3934 3935 3936 3937
	return vha;

fail:
	return vha;
L
Linus Torvalds 已提交
3938 3939
}

3940
static struct qla_work_evt *
3941
qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3942 3943
{
	struct qla_work_evt *e;
3944 3945 3946 3947 3948
	uint8_t bail;

	QLA_VHA_MARK_BUSY(vha, bail);
	if (bail)
		return NULL;
3949

3950
	e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3951 3952
	if (!e) {
		QLA_VHA_MARK_NOT_BUSY(vha);
3953
		return NULL;
3954
	}
3955 3956 3957 3958 3959 3960 3961

	INIT_LIST_HEAD(&e->list);
	e->type = type;
	e->flags = QLA_EVT_FLAG_FREE;
	return e;
}

3962
static int
3963
qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3964
{
3965
	unsigned long flags;
3966

3967
	spin_lock_irqsave(&vha->work_lock, flags);
3968
	list_add_tail(&e->list, &vha->work_list);
3969
	spin_unlock_irqrestore(&vha->work_lock, flags);
3970
	qla2xxx_wake_dpc(vha);
3971

3972 3973 3974 3975
	return QLA_SUCCESS;
}

int
3976
qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3977 3978 3979 3980
    u32 data)
{
	struct qla_work_evt *e;

3981
	e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3982 3983 3984 3985 3986
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aen.code = code;
	e->u.aen.data = data;
3987
	return qla2x00_post_work(vha, e);
3988 3989
}

3990 3991 3992 3993 3994
int
qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
{
	struct qla_work_evt *e;

3995
	e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3996 3997 3998 3999
	if (!e)
		return QLA_FUNCTION_FAILED;

	memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4000
	return qla2x00_post_work(vha, e);
4001 4002
}

4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025
#define qla2x00_post_async_work(name, type)	\
int qla2x00_post_async_##name##_work(		\
    struct scsi_qla_host *vha,			\
    fc_port_t *fcport, uint16_t *data)		\
{						\
	struct qla_work_evt *e;			\
						\
	e = qla2x00_alloc_work(vha, type);	\
	if (!e)					\
		return QLA_FUNCTION_FAILED;	\
						\
	e->u.logio.fcport = fcport;		\
	if (data) {				\
		e->u.logio.data[0] = data[0];	\
		e->u.logio.data[1] = data[1];	\
	}					\
	return qla2x00_post_work(vha, e);	\
}

qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4026 4027
qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4028

4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059
int
qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.uevent.code = code;
	return qla2x00_post_work(vha, e);
}

static void
qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
{
	char event_string[40];
	char *envp[] = { event_string, NULL };

	switch (code) {
	case QLA_UEVENT_CODE_FW_DUMP:
		snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
		    vha->host_no);
		break;
	default:
		/* do nothing */
		break;
	}
	kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
}

4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075
int
qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
			uint32_t *data, int cnt)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aenfx.evtcode = evtcode;
	e->u.aenfx.count = cnt;
	memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
	return qla2x00_post_work(vha, e);
}

4076
void
4077
qla2x00_do_work(struct scsi_qla_host *vha)
4078
{
4079 4080 4081
	struct qla_work_evt *e, *tmp;
	unsigned long flags;
	LIST_HEAD(work);
4082

4083 4084 4085 4086 4087
	spin_lock_irqsave(&vha->work_lock, flags);
	list_splice_init(&vha->work_list, &work);
	spin_unlock_irqrestore(&vha->work_lock, flags);

	list_for_each_entry_safe(e, tmp, &work, list) {
4088 4089 4090 4091
		list_del_init(&e->list);

		switch (e->type) {
		case QLA_EVT_AEN:
4092
			fc_host_post_event(vha->host, fc_get_event_number(),
4093 4094
			    e->u.aen.code, e->u.aen.data);
			break;
4095 4096 4097
		case QLA_EVT_IDC_ACK:
			qla81xx_idc_ack(vha, e->u.idc_ack.mb);
			break;
4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112
		case QLA_EVT_ASYNC_LOGIN:
			qla2x00_async_login(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGIN_DONE:
			qla2x00_async_login_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGOUT:
			qla2x00_async_logout(vha, e->u.logio.fcport);
			break;
		case QLA_EVT_ASYNC_LOGOUT_DONE:
			qla2x00_async_logout_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
4113 4114 4115 4116 4117 4118 4119 4120
		case QLA_EVT_ASYNC_ADISC:
			qla2x00_async_adisc(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_ADISC_DONE:
			qla2x00_async_adisc_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
4121 4122 4123
		case QLA_EVT_UEVENT:
			qla2x00_uevent_emit(vha, e->u.uevent.code);
			break;
4124 4125 4126
		case QLA_EVT_AENFX:
			qlafx00_process_aen(vha, e);
			break;
4127 4128 4129
		}
		if (e->flags & QLA_EVT_FLAG_FREE)
			kfree(e);
4130 4131 4132

		/* For each work completed decrement vha ref count */
		QLA_VHA_MARK_NOT_BUSY(vha);
4133 4134
	}
}
4135

4136 4137 4138 4139 4140 4141
/* Relogins all the fcports of a vport
 * Context: dpc thread
 */
void qla2x00_relogin(struct scsi_qla_host *vha)
{
	fc_port_t       *fcport;
4142
	int status;
4143 4144
	uint16_t        next_loopid = 0;
	struct qla_hw_data *ha = vha->hw;
4145
	uint16_t data[2];
4146 4147 4148 4149 4150 4151

	list_for_each_entry(fcport, &vha->vp_fcports, list) {
	/*
	 * If the port is not ONLINE then try to login
	 * to it if we haven't run out of retries.
	 */
4152 4153
		if (atomic_read(&fcport->state) != FCS_ONLINE &&
		    fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4154
			fcport->login_retry--;
4155
			if (fcport->flags & FCF_FABRIC_DEVICE) {
4156
				if (fcport->flags & FCF_FCP2_DEVICE)
4157 4158 4159 4160 4161 4162
					ha->isp_ops->fabric_logout(vha,
							fcport->loop_id,
							fcport->d_id.b.domain,
							fcport->d_id.b.area,
							fcport->d_id.b.al_pa);

4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173
				if (fcport->loop_id == FC_NO_LOOP_ID) {
					fcport->loop_id = next_loopid =
					    ha->min_external_loopid;
					status = qla2x00_find_new_loop_id(
					    vha, fcport);
					if (status != QLA_SUCCESS) {
						/* Ran out of IDs to use */
						break;
					}
				}

4174
				if (IS_ALOGIO_CAPABLE(ha)) {
4175
					fcport->flags |= FCF_ASYNC_SENT;
4176 4177 4178 4179 4180 4181 4182 4183
					data[0] = 0;
					data[1] = QLA_LOGIO_LOGIN_RETRIED;
					status = qla2x00_post_async_login_work(
					    vha, fcport, data);
					if (status == QLA_SUCCESS)
						continue;
					/* Attempt a retry. */
					status = 1;
4184
				} else {
4185 4186
					status = qla2x00_fabric_login(vha,
					    fcport, &next_loopid);
4187 4188 4189 4190 4191 4192 4193 4194
					if (status ==  QLA_SUCCESS) {
						int status2;
						uint8_t opts;

						opts = 0;
						if (fcport->flags &
						    FCF_FCP2_DEVICE)
							opts |= BIT_1;
4195 4196 4197
						status2 =
						    qla2x00_get_port_database(
							vha, fcport, opts);
4198 4199 4200 4201
						if (status2 != QLA_SUCCESS)
							status = 1;
					}
				}
4202 4203 4204 4205 4206 4207 4208
			} else
				status = qla2x00_local_device_login(vha,
								fcport);

			if (status == QLA_SUCCESS) {
				fcport->old_loop_id = fcport->loop_id;

4209 4210 4211
				ql_dbg(ql_dbg_disc, vha, 0x2003,
				    "Port login OK: logged in ID 0x%x.\n",
				    fcport->loop_id);
4212 4213 4214 4215 4216 4217

				qla2x00_update_fcport(vha, fcport);

			} else if (status == 1) {
				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
				/* retry the login again */
4218 4219 4220
				ql_dbg(ql_dbg_disc, vha, 0x2007,
				    "Retrying %d login again loop_id 0x%x.\n",
				    fcport->login_retry, fcport->loop_id);
4221 4222 4223 4224 4225
			} else {
				fcport->login_retry = 0;
			}

			if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4226
				qla2x00_clear_loop_id(fcport);
4227 4228 4229
		}
		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
			break;
4230 4231 4232
	}
}

4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263
/* Schedule work on any of the dpc-workqueues */
void
qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
{
	struct qla_hw_data *ha = base_vha->hw;

	switch (work_code) {
	case MBA_IDC_AEN: /* 0x8200 */
		if (ha->dpc_lp_wq)
			queue_work(ha->dpc_lp_wq, &ha->idc_aen);
		break;

	case QLA83XX_NIC_CORE_RESET: /* 0x1 */
		if (!ha->flags.nic_core_reset_hdlr_active) {
			if (ha->dpc_hp_wq)
				queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
		} else
			ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
			    "NIC Core reset is already active. Skip "
			    "scheduling it again.\n");
		break;
	case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
		break;
	case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
		break;
	default:
		ql_log(ql_log_warn, base_vha, 0xb05f,
4264
		    "Unknown work-code=0x%x.\n", work_code);
4265 4266 4267 4268 4269 4270 4271 4272 4273 4274
	}

	return;
}

/* Work: Perform NIC Core Unrecoverable state handling */
void
qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4275
		container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_reset_ownership(base_vha);
	if (ha->flags.nic_core_reset_owner) {
		ha->flags.nic_core_reset_owner = 0;
		qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
		    QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
	qla83xx_idc_unlock(base_vha, 0);
}

/* Work: Execute IDC state handler */
void
qla83xx_idc_state_handler_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4297
		container_of(work, struct qla_hw_data, idc_state_handler);
4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
		qla83xx_idc_state_handler(base_vha);
	qla83xx_idc_unlock(base_vha, 0);
}

4309
static int
4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346
qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	unsigned long heart_beat_wait = jiffies + (1 * HZ);
	uint32_t heart_beat_counter1, heart_beat_counter2;

	do {
		if (time_after(jiffies, heart_beat_wait)) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
			    "Nic Core f/w is not alive.\n");
			rval = QLA_FUNCTION_FAILED;
			break;
		}

		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter1);
		qla83xx_idc_unlock(base_vha, 0);
		msleep(100);
		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter2);
		qla83xx_idc_unlock(base_vha, 0);
	} while (heart_beat_counter1 == heart_beat_counter2);

	return rval;
}

/* Work: Perform NIC Core Reset handling */
void
qla83xx_nic_core_reset_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, nic_core_reset);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

4347 4348 4349 4350 4351 4352 4353
	if (IS_QLA2031(ha)) {
		if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
			ql_log(ql_log_warn, base_vha, 0xb081,
			    "Failed to dump mctp\n");
		return;
	}

4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426
	if (!ha->flags.nic_core_reset_hdlr_active) {
		if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
			qla83xx_idc_lock(base_vha, 0);
			qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
			    &dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			if (dev_state != QLA8XXX_DEV_NEED_RESET) {
				ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
				    "Nic Core f/w is alive.\n");
				return;
			}
		}

		ha->flags.nic_core_reset_hdlr_active = 1;
		if (qla83xx_nic_core_reset(base_vha)) {
			/* NIC Core reset failed. */
			ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
			    "NIC Core reset failed.\n");
		}
		ha->flags.nic_core_reset_hdlr_active = 0;
	}
}

/* Work: Handle 8200 IDC aens */
void
qla83xx_service_idc_aen(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, idc_aen);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state, idc_control;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
	qla83xx_idc_unlock(base_vha, 0);
	if (dev_state == QLA8XXX_DEV_NEED_RESET) {
		if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
			    "Application requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		} else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
		    QLA_SUCCESS) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
			    "Other protocol driver requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		}
	} else if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
}

static void
qla83xx_wait_logic(void)
{
	int i;

	/* Yield CPU */
	if (!in_interrupt()) {
		/*
		 * Wait about 200ms before retrying again.
		 * This controls the number of retries for single
		 * lock operation.
		 */
		msleep(100);
		schedule();
	} else {
		for (i = 0; i < 20; i++)
			cpu_relax(); /* This a nop instr on i386 */
	}
}

4427
static int
4428 4429 4430 4431 4432 4433 4434
qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval;
	uint32_t data;
	uint32_t idc_lck_rcvry_stage_mask = 0x3;
	uint32_t idc_lck_rcvry_owner_mask = 0x3c;
	struct qla_hw_data *ha = base_vha->hw;
4435 4436
	ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
	    "Trying force recovery of the IDC lock.\n");
4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487

	rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
	if (rval)
		return rval;

	if ((data & idc_lck_rcvry_stage_mask) > 0) {
		return QLA_SUCCESS;
	} else {
		data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
		rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    data);
		if (rval)
			return rval;

		msleep(200);

		rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    &data);
		if (rval)
			return rval;

		if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
			data &= (IDC_LOCK_RECOVERY_STAGE2 |
					~(idc_lck_rcvry_stage_mask));
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, data);
			if (rval)
				return rval;

			/* Forcefully perform IDC UnLock */
			rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
			    &data);
			if (rval)
				return rval;
			/* Clear lock-id by setting 0xff */
			rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    0xff);
			if (rval)
				return rval;
			/* Clear lock-recovery by setting 0x0 */
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, 0x0);
			if (rval)
				return rval;
		} else
			return QLA_SUCCESS;
	}

	return rval;
}

4488
static int
4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527
qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	uint32_t o_drv_lockid, n_drv_lockid;
	unsigned long lock_recovery_timeout;

	lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
retry_lockid:
	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
	if (rval)
		goto exit;

	/* MAX wait time before forcing IDC Lock recovery = 2 secs */
	if (time_after_eq(jiffies, lock_recovery_timeout)) {
		if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
			return QLA_SUCCESS;
		else
			return QLA_FUNCTION_FAILED;
	}

	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
	if (rval)
		goto exit;

	if (o_drv_lockid == n_drv_lockid) {
		qla83xx_wait_logic();
		goto retry_lockid;
	} else
		return QLA_SUCCESS;

exit:
	return rval;
}

void
qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_6;
	uint32_t data;
4528
	uint32_t lock_owner;
4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-lock implementation using driver-lock/lock-id remote registers */
retry_lock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
	    == QLA_SUCCESS) {
		if (data) {
			/* Setting lock-id to our function-number */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    ha->portnum);
		} else {
4540 4541
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    &lock_owner);
4542
			ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4543 4544
			    "Failed to acquire IDC lock, acquired by %d, "
			    "retrying...\n", lock_owner);
4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579

			/* Retry/Perform IDC-Lock recovery */
			if (qla83xx_idc_lock_recovery(base_vha)
			    == QLA_SUCCESS) {
				qla83xx_wait_logic();
				goto retry_lock;
			} else
				ql_log(ql_log_warn, base_vha, 0xb075,
				    "IDC Lock recovery FAILED.\n");
		}

	}

	return;

	/* XXX: IDC-lock implementation using access-control mbx */
retry_lock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
		    "Failed to acquire IDC lock. retrying...\n");
		/* Retry/Perform IDC-Lock recovery */
		if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
			qla83xx_wait_logic();
			goto retry_lock2;
		} else
			ql_log(ql_log_warn, base_vha, 0xb076,
			    "IDC Lock recovery FAILED.\n");
	}

	return;
}

void
qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
4580 4581 4582 4583
#if 0
	uint16_t options = (requester_id << 15) | BIT_7;
#endif
	uint16_t retry;
4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618
	uint32_t data;
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-unlock implementation using driver-unlock/lock-id
	 * remote registers
	 */
	retry = 0;
retry_unlock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
	    == QLA_SUCCESS) {
		if (data == ha->portnum) {
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
			/* Clearing lock-id by setting 0xff */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
		} else if (retry < 10) {
			/* SV: XXX: IDC unlock retrying needed here? */

			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock;
		}
	} else if (retry < 10) {
		/* Retry for IDC-unlock */
		qla83xx_wait_logic();
		retry++;
		ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
		    "Failed to read drv-lockid, retyring=%d\n", retry);
		goto retry_unlock;
	}

	return;

4619
#if 0
4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634
	/* XXX: IDC-unlock implementation using access-control mbx */
	retry = 0;
retry_unlock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		if (retry < 10) {
			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock2;
		}
	}

	return;
4635
#endif
4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695
}

int
__qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence |= (1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_set_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

int
__qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence &= ~(1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_clear_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

4696
static void
4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707
qla83xx_need_reset_handler(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_ack, drv_presence;
	unsigned long ack_timeout;

	/* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
	ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
	while (1) {
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4708
		if ((drv_ack & drv_presence) == drv_presence)
4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734
			break;

		if (time_after_eq(jiffies, ack_timeout)) {
			ql_log(ql_log_warn, vha, 0xb067,
			    "RESET ACK TIMEOUT! drv_presence=0x%x "
			    "drv_ack=0x%x\n", drv_presence, drv_ack);
			/*
			 * The function(s) which did not ack in time are forced
			 * to withdraw any further participation in the IDC
			 * reset.
			 */
			if (drv_ack != drv_presence)
				qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
				    drv_ack);
			break;
		}

		qla83xx_idc_unlock(vha, 0);
		msleep(1000);
		qla83xx_idc_lock(vha, 0);
	}

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
	ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
}

4735
static int
4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868
qla83xx_device_bootstrap(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	uint32_t idc_control;

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
	ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");

	/* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
	__qla83xx_get_idc_control(vha, &idc_control);
	idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
	__qla83xx_set_idc_control(vha, 0);

	qla83xx_idc_unlock(vha, 0);
	rval = qla83xx_restart_nic_firmware(vha);
	qla83xx_idc_lock(vha, 0);

	if (rval != QLA_SUCCESS) {
		ql_log(ql_log_fatal, vha, 0xb06a,
		    "Failed to restart NIC f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
	} else {
		ql_dbg(ql_dbg_p3p, vha, 0xb06c,
		    "Success in restarting nic f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
		ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
	}

	return rval;
}

/* Assumes idc_lock always held on entry */
int
qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
{
	struct qla_hw_data *ha = base_vha->hw;
	int rval = QLA_SUCCESS;
	unsigned long dev_init_timeout;
	uint32_t dev_state;

	/* Wait for MAX-INIT-TIMEOUT for the device to go ready */
	dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);

	while (1) {

		if (time_after_eq(jiffies, dev_init_timeout)) {
			ql_log(ql_log_warn, base_vha, 0xb06e,
			    "Initialization TIMEOUT!\n");
			/* Init timeout. Disable further NIC Core
			 * communication.
			 */
			qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
				QLA8XXX_DEV_FAILED);
			ql_log(ql_log_info, base_vha, 0xb06f,
			    "HW State: FAILED.\n");
		}

		qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
		switch (dev_state) {
		case QLA8XXX_DEV_READY:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
			    "Reset_owner reset by 0x%x.\n",
			    ha->portnum);
			goto exit;
		case QLA8XXX_DEV_COLD:
			if (ha->flags.nic_core_reset_owner)
				rval = qla83xx_device_bootstrap(base_vha);
			else {
			/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			break;
		case QLA8XXX_DEV_INITIALIZING:
			/* Wait for AEN to change device-state */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_NEED_RESET:
			if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
				qla83xx_need_reset_handler(base_vha);
			else {
				/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			/* reset timeout value after need reset handler */
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_NEED_QUIESCENT:
			/* XXX: DEBUG for now */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_QUIESCENT:
			/* XXX: DEBUG for now */
			if (ha->flags.quiesce_owner)
				goto exit;

			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_FAILED:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			__qla83xx_clear_drv_presence(base_vha);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		case QLA8XXX_BAD_VALUE:
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		default:
			ql_log(ql_log_warn, base_vha, 0xb071,
4869
			    "Unknown Device State: %x.\n", dev_state);
4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		}
	}

exit:
	return rval;
}

4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933
void
qla2x00_disable_board_on_pci_error(struct work_struct *work)
{
	struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
	    board_disable);
	struct pci_dev *pdev = ha->pdev;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	ql_log(ql_log_warn, base_vha, 0x015b,
	    "Disabling adapter.\n");

	set_bit(UNLOADING, &base_vha->dpc_flags);

	qla2x00_delete_all_vps(ha, base_vha);

	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

	qla2x00_dfs_remove(base_vha);

	qla84xx_put_chip(base_vha);

	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

	qla2x00_destroy_deferred_work(ha);

	/*
	 * Do not try to stop beacon blink as it will issue a mailbox
	 * command.
	 */
	qla2x00_free_sysfs_attr(base_vha, false);

	fc_remove_host(base_vha->host);

	scsi_remove_host(base_vha->host);

	base_vha->flags.init_done = 0;
	qla25xx_delete_queues(base_vha);
	qla2x00_free_irqs(base_vha);
	qla2x00_free_fcports(base_vha);
	qla2x00_mem_free(ha);
	qla82xx_md_free(base_vha);
	qla2x00_free_queues(ha);

	qla2x00_unmap_iobases(ha);

	pci_release_selected_regions(ha->pdev, ha->bars);
	pci_disable_pcie_error_reporting(pdev);
	pci_disable_device(pdev);

4934 4935 4936
	/*
	 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
	 */
4937 4938
}

L
Linus Torvalds 已提交
4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954
/**************************************************************************
* qla2x00_do_dpc
*   This kernel thread is a task that is schedule by the interrupt handler
*   to perform the background processing for interrupts.
*
* Notes:
* This task always run in the context of a kernel thread.  It
* is kick-off by the driver's detect code and starts up
* up one per adapter. It immediately goes to sleep and waits for
* some fibre event.  When either the interrupt handler or
* the timer routine detects a event it will one of the task
* bits then wake us up.
**************************************************************************/
static int
qla2x00_do_dpc(void *data)
{
4955 4956
	scsi_qla_host_t *base_vha;
	struct qla_hw_data *ha;
L
Linus Torvalds 已提交
4957

4958 4959
	ha = (struct qla_hw_data *)data;
	base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
4960

4961
	set_user_nice(current, MIN_NICE);
L
Linus Torvalds 已提交
4962

4963
	set_current_state(TASK_INTERRUPTIBLE);
4964
	while (!kthread_should_stop()) {
4965 4966
		ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
		    "DPC handler sleeping.\n");
L
Linus Torvalds 已提交
4967

4968
		schedule();
L
Linus Torvalds 已提交
4969

4970 4971
		if (!base_vha->flags.init_done || ha->flags.mbox_busy)
			goto end_loop;
L
Linus Torvalds 已提交
4972

4973
		if (ha->flags.eeh_busy) {
4974 4975
			ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
			    "eeh_busy=%d.\n", ha->flags.eeh_busy);
4976
			goto end_loop;
4977 4978
		}

L
Linus Torvalds 已提交
4979 4980
		ha->dpc_active = 1;

4981 4982 4983
		ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
		    "DPC handler waking up, dpc_flags=0x%lx.\n",
		    base_vha->dpc_flags);
L
Linus Torvalds 已提交
4984

4985
		qla2x00_do_work(base_vha);
4986

4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013
		if (IS_P3P_TYPE(ha)) {
			if (IS_QLA8044(ha)) {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla8044_idc_lock(ha);
					qla8044_wr_direct(base_vha,
						QLA8044_CRB_DEV_STATE_INDEX,
						QLA8XXX_DEV_FAILED);
					qla8044_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x4004,
						"HW State: FAILED.\n");
					qla8044_device_state_handler(base_vha);
					continue;
				}

			} else {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla82xx_idc_lock(ha);
					qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
						QLA8XXX_DEV_FAILED);
					qla82xx_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x0151,
						"HW State: FAILED.\n");
					qla82xx_device_state_handler(base_vha);
					continue;
				}
5014 5015 5016 5017 5018
			}

			if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
				&base_vha->dpc_flags)) {

5019 5020
				ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
				    "FCoE context reset scheduled.\n");
5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033
				if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
					&base_vha->dpc_flags))) {
					if (qla82xx_fcoe_ctx_reset(base_vha)) {
						/* FCoE-ctx reset failed.
						 * Escalate to chip-reset
						 */
						set_bit(ISP_ABORT_NEEDED,
							&base_vha->dpc_flags);
					}
					clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
				}

5034 5035
				ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
				    "FCoE context reset end.\n");
5036
			}
5037 5038 5039 5040 5041 5042 5043 5044
		} else if (IS_QLAFX00(ha)) {
			if (test_and_clear_bit(ISP_UNRECOVERABLE,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
				    "Firmware Reset Recovery\n");
				if (qlafx00_reset_initialize(base_vha)) {
					/* Failed. Abort isp later. */
					if (!test_bit(UNLOADING,
5045
					    &base_vha->dpc_flags)) {
5046 5047 5048 5049 5050
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
						ql_dbg(ql_dbg_dpc, base_vha,
						    0x4021,
						    "Reset Recovery Failed\n");
5051
					}
5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069
				}
			}

			if (test_and_clear_bit(FX00_TARGET_SCAN,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
				    "ISPFx00 Target Scan scheduled\n");
				if (qlafx00_rescan_isp(base_vha)) {
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
					ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
					    "ISPFx00 Target Scan Failed\n");
				}
				ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
				    "ISPFx00 Target Scan End\n");
			}
5070 5071 5072 5073 5074 5075 5076 5077
			if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
				    "ISPFx00 Host Info resend scheduled\n");
				qlafx00_fx_disc(base_vha,
				    &base_vha->hw->mr.fcport,
				    FXDISC_REG_HOST_INFO);
			}
5078 5079
		}

5080 5081
		if (test_and_clear_bit(ISP_ABORT_NEEDED,
						&base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
5082

5083 5084
			ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
			    "ISP abort scheduled.\n");
L
Linus Torvalds 已提交
5085
			if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5086
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
5087

5088
				if (ha->isp_ops->abort_isp(base_vha)) {
L
Linus Torvalds 已提交
5089 5090
					/* failed. retry later */
					set_bit(ISP_ABORT_NEEDED,
5091
					    &base_vha->dpc_flags);
5092
				}
5093 5094
				clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
5095 5096
			}

5097 5098
			ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
			    "ISP abort end.\n");
L
Linus Torvalds 已提交
5099 5100
		}

5101 5102
		if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
		    &base_vha->dpc_flags)) {
5103
			qla2x00_update_fcports(base_vha);
5104
		}
5105

5106 5107 5108 5109 5110 5111 5112 5113 5114 5115
		if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
			int ret;
			ret = qla2x00_send_change_request(base_vha, 0x3, 0);
			if (ret != QLA_SUCCESS)
				ql_log(ql_log_warn, base_vha, 0x121,
				    "Failed to enable receiving of RSCN "
				    "requests: 0x%x.\n", ret);
			clear_bit(SCR_PENDING, &base_vha->dpc_flags);
		}

5116 5117 5118
		if (IS_QLAFX00(ha))
			goto loop_resync_check;

5119
		if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5120 5121
			ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
			    "Quiescence mode scheduled.\n");
5122 5123 5124 5125 5126
			if (IS_P3P_TYPE(ha)) {
				if (IS_QLA82XX(ha))
					qla82xx_device_state_handler(base_vha);
				if (IS_QLA8044(ha))
					qla8044_device_state_handler(base_vha);
5127 5128 5129 5130
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				if (!ha->flags.quiesce_owner) {
					qla2x00_perform_loop_resync(base_vha);
5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141
					if (IS_QLA82XX(ha)) {
						qla82xx_idc_lock(ha);
						qla82xx_clear_qsnt_ready(
						    base_vha);
						qla82xx_idc_unlock(ha);
					} else if (IS_QLA8044(ha)) {
						qla8044_idc_lock(ha);
						qla8044_clear_qsnt_ready(
						    base_vha);
						qla8044_idc_unlock(ha);
					}
5142 5143 5144 5145 5146
				}
			} else {
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				qla2x00_quiesce_io(base_vha);
5147
			}
5148 5149
			ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
			    "Quiescence mode end.\n");
5150 5151
		}

5152
		if (test_and_clear_bit(RESET_MARKER_NEEDED,
5153
				&base_vha->dpc_flags) &&
5154
		    (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
L
Linus Torvalds 已提交
5155

5156 5157
			ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
			    "Reset marker scheduled.\n");
5158 5159
			qla2x00_rst_aen(base_vha);
			clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5160 5161
			ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
			    "Reset marker end.\n");
L
Linus Torvalds 已提交
5162 5163 5164
		}

		/* Retry each device up to login retry count */
5165 5166 5167 5168
		if ((test_and_clear_bit(RELOGIN_NEEDED,
						&base_vha->dpc_flags)) &&
		    !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
L
Linus Torvalds 已提交
5169

5170 5171
			ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
			    "Relogin scheduled.\n");
5172
			qla2x00_relogin(base_vha);
5173 5174
			ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
			    "Relogin end.\n");
L
Linus Torvalds 已提交
5175
		}
5176
loop_resync_check:
5177
		if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5178
		    &base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
5179

5180 5181
			ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
			    "Loop resync scheduled.\n");
L
Linus Torvalds 已提交
5182 5183

			if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5184
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
5185

5186
				qla2x00_loop_resync(base_vha);
L
Linus Torvalds 已提交
5187

5188 5189
				clear_bit(LOOP_RESYNC_ACTIVE,
						&base_vha->dpc_flags);
L
Linus Torvalds 已提交
5190 5191
			}

5192 5193
			ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
			    "Loop resync end.\n");
L
Linus Torvalds 已提交
5194 5195
		}

5196 5197 5198
		if (IS_QLAFX00(ha))
			goto intr_on_check;

5199 5200 5201 5202
		if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) == LOOP_READY) {
			clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
			qla2xxx_flash_npiv_conf(base_vha);
5203 5204
		}

5205
intr_on_check:
L
Linus Torvalds 已提交
5206
		if (!ha->interrupts_on)
5207
			ha->isp_ops->enable_intrs(ha);
L
Linus Torvalds 已提交
5208

5209
		if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5210 5211 5212 5213
					&base_vha->dpc_flags)) {
			if (ha->beacon_blink_led == 1)
				ha->isp_ops->beacon_blink(base_vha);
		}
5214

5215 5216
		if (!IS_QLAFX00(ha))
			qla2x00_do_dpc_all_vps(base_vha);
5217

L
Linus Torvalds 已提交
5218
		ha->dpc_active = 0;
5219
end_loop:
5220
		set_current_state(TASK_INTERRUPTIBLE);
L
Linus Torvalds 已提交
5221
	} /* End of while(1) */
5222
	__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
5223

5224 5225
	ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
	    "DPC handler exiting.\n");
L
Linus Torvalds 已提交
5226 5227 5228 5229 5230 5231

	/*
	 * Make sure that nobody tries to wake us up again.
	 */
	ha->dpc_active = 0;

5232 5233 5234
	/* Cleanup any residual CTX SRBs. */
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

5235 5236 5237 5238
	return 0;
}

void
5239
qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5240
{
5241
	struct qla_hw_data *ha = vha->hw;
5242 5243
	struct task_struct *t = ha->dpc_thread;

5244
	if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5245
		wake_up_process(t);
L
Linus Torvalds 已提交
5246 5247 5248 5249 5250 5251 5252 5253 5254 5255
}

/*
*  qla2x00_rst_aen
*      Processes asynchronous reset.
*
* Input:
*      ha  = adapter block pointer.
*/
static void
5256
qla2x00_rst_aen(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
5257
{
5258 5259 5260
	if (vha->flags.online && !vha->flags.reset_active &&
	    !atomic_read(&vha->loop_down_timer) &&
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
L
Linus Torvalds 已提交
5261
		do {
5262
			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
5263 5264 5265 5266 5267

			/*
			 * Issue marker command only when we are going to start
			 * the I/O.
			 */
5268 5269 5270
			vha->marker_needed = 1;
		} while (!atomic_read(&vha->loop_down_timer) &&
		    (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
L
Linus Torvalds 已提交
5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281
	}
}

/**************************************************************************
*   qla2x00_timer
*
* Description:
*   One second timer
*
* Context: Interrupt
***************************************************************************/
5282
void
5283
qla2x00_timer(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
5284 5285 5286 5287 5288
{
	unsigned long	cpu_flags = 0;
	int		start_dpc = 0;
	int		index;
	srb_t		*sp;
5289
	uint16_t        w;
5290
	struct qla_hw_data *ha = vha->hw;
5291
	struct req_que *req;
5292

5293
	if (ha->flags.eeh_busy) {
5294 5295 5296
		ql_dbg(ql_dbg_timer, vha, 0x6000,
		    "EEH = %d, restarting timer.\n",
		    ha->flags.eeh_busy);
5297 5298 5299 5300
		qla2x00_restart_timer(vha, WATCH_INTERVAL);
		return;
	}

5301 5302 5303 5304 5305
	/*
	 * Hardware read to raise pending EEH errors during mailbox waits. If
	 * the read returns -1 then disable the board.
	 */
	if (!pci_channel_offline(ha->pdev)) {
5306
		pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5307
		qla2x00_check_reg16_for_disconnect(vha, w);
5308
	}
L
Linus Torvalds 已提交
5309

5310
	/* Make sure qla82xx_watchdog is run only for physical port */
5311
	if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5312 5313
		if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
			start_dpc++;
5314 5315 5316 5317
		if (IS_QLA82XX(ha))
			qla82xx_watchdog(vha);
		else if (IS_QLA8044(ha))
			qla8044_watchdog(vha);
5318 5319
	}

5320 5321 5322
	if (!vha->vp_idx && IS_QLAFX00(ha))
		qlafx00_timer_routine(vha);

L
Linus Torvalds 已提交
5323
	/* Loop down handler. */
5324
	if (atomic_read(&vha->loop_down_timer) > 0 &&
5325 5326
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
	    !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5327
		&& vha->flags.online) {
L
Linus Torvalds 已提交
5328

5329 5330
		if (atomic_read(&vha->loop_down_timer) ==
		    vha->loop_down_abort_time) {
L
Linus Torvalds 已提交
5331

5332 5333
			ql_log(ql_log_info, vha, 0x6008,
			    "Loop down - aborting the queues before time expires.\n");
L
Linus Torvalds 已提交
5334

5335 5336
			if (!IS_QLA2100(ha) && vha->link_down_timeout)
				atomic_set(&vha->loop_state, LOOP_DEAD);
L
Linus Torvalds 已提交
5337

5338 5339 5340 5341
			/*
			 * Schedule an ISP abort to return any FCP2-device
			 * commands.
			 */
5342
			/* NPIV - scan physical port only */
5343
			if (!vha->vp_idx) {
5344 5345
				spin_lock_irqsave(&ha->hardware_lock,
				    cpu_flags);
5346
				req = ha->req_q_map[0];
5347
				for (index = 1;
5348
				    index < req->num_outstanding_cmds;
5349 5350 5351
				    index++) {
					fc_port_t *sfcp;

5352
					sp = req->outstanding_cmds[index];
5353 5354
					if (!sp)
						continue;
5355
					if (sp->type != SRB_SCSI_CMD)
5356
						continue;
5357
					sfcp = sp->fcport;
5358
					if (!(sfcp->flags & FCF_FCP2_DEVICE))
5359
						continue;
5360

5361 5362 5363 5364 5365
					if (IS_QLA82XX(ha))
						set_bit(FCOE_CTX_RESET_NEEDED,
							&vha->dpc_flags);
					else
						set_bit(ISP_ABORT_NEEDED,
5366
							&vha->dpc_flags);
5367 5368 5369
					break;
				}
				spin_unlock_irqrestore(&ha->hardware_lock,
5370
								cpu_flags);
L
Linus Torvalds 已提交
5371 5372 5373 5374 5375
			}
			start_dpc++;
		}

		/* if the loop has been down for 4 minutes, reinit adapter */
5376
		if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5377
			if (!(vha->device_flags & DFLG_NO_CABLE)) {
5378
				ql_log(ql_log_warn, vha, 0x6009,
L
Linus Torvalds 已提交
5379 5380
				    "Loop down - aborting ISP.\n");

5381 5382 5383 5384 5385 5386
				if (IS_QLA82XX(ha))
					set_bit(FCOE_CTX_RESET_NEEDED,
						&vha->dpc_flags);
				else
					set_bit(ISP_ABORT_NEEDED,
						&vha->dpc_flags);
L
Linus Torvalds 已提交
5387 5388
			}
		}
5389 5390 5391
		ql_dbg(ql_dbg_timer, vha, 0x600a,
		    "Loop down - seconds remaining %d.\n",
		    atomic_read(&vha->loop_down_timer));
L
Linus Torvalds 已提交
5392
	}
5393 5394
	/* Check if beacon LED needs to be blinked for physical host only */
	if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5395
		/* There is no beacon_blink function for ISP82xx */
5396
		if (!IS_P3P_TYPE(ha)) {
5397 5398 5399
			set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
			start_dpc++;
		}
5400 5401
	}

5402
	/* Process any deferred work. */
5403
	if (!list_empty(&vha->work_list))
5404 5405
		start_dpc++;

L
Linus Torvalds 已提交
5406
	/* Schedule the DPC routine if needed */
5407 5408 5409
	if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
	    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
	    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
L
Linus Torvalds 已提交
5410
	    start_dpc ||
5411 5412
	    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
	    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5413 5414
	    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
	    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5415
	    test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5416
	    test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428
		ql_dbg(ql_dbg_timer, vha, 0x600b,
		    "isp_abort_needed=%d loop_resync_needed=%d "
		    "fcport_update_needed=%d start_dpc=%d "
		    "reset_marker_needed=%d",
		    test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
		    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
		    start_dpc,
		    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
		ql_dbg(ql_dbg_timer, vha, 0x600c,
		    "beacon_blink_needed=%d isp_unrecoverable=%d "
		    "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5429
		    "relogin_needed=%d.\n",
5430 5431 5432 5433
		    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
		    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
		    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
		    test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5434
		    test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5435
		qla2xxx_wake_dpc(vha);
5436
	}
L
Linus Torvalds 已提交
5437

5438
	qla2x00_restart_timer(vha, WATCH_INTERVAL);
L
Linus Torvalds 已提交
5439 5440
}

5441 5442
/* Firmware interface routines. */

5443
#define FW_BLOBS	11
5444 5445 5446 5447
#define FW_ISP21XX	0
#define FW_ISP22XX	1
#define FW_ISP2300	2
#define FW_ISP2322	3
5448
#define FW_ISP24XX	4
5449
#define FW_ISP25XX	5
5450
#define FW_ISP81XX	6
5451
#define FW_ISP82XX	7
5452 5453
#define FW_ISP2031	8
#define FW_ISP8031	9
5454
#define FW_ISP27XX	10
5455

5456 5457 5458 5459 5460
#define FW_FILE_ISP21XX	"ql2100_fw.bin"
#define FW_FILE_ISP22XX	"ql2200_fw.bin"
#define FW_FILE_ISP2300	"ql2300_fw.bin"
#define FW_FILE_ISP2322	"ql2322_fw.bin"
#define FW_FILE_ISP24XX	"ql2400_fw.bin"
5461
#define FW_FILE_ISP25XX	"ql2500_fw.bin"
5462
#define FW_FILE_ISP81XX	"ql8100_fw.bin"
5463
#define FW_FILE_ISP82XX	"ql8200_fw.bin"
5464 5465
#define FW_FILE_ISP2031	"ql2600_fw.bin"
#define FW_FILE_ISP8031	"ql8300_fw.bin"
5466
#define FW_FILE_ISP27XX	"ql2700_fw.bin"
5467

5468

5469
static DEFINE_MUTEX(qla_fw_lock);
5470 5471

static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5472 5473 5474 5475 5476
	{ .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
	{ .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
	{ .name = FW_FILE_ISP24XX, },
5477
	{ .name = FW_FILE_ISP25XX, },
5478
	{ .name = FW_FILE_ISP81XX, },
5479
	{ .name = FW_FILE_ISP82XX, },
5480 5481
	{ .name = FW_FILE_ISP2031, },
	{ .name = FW_FILE_ISP8031, },
5482
	{ .name = FW_FILE_ISP27XX, },
5483 5484 5485
};

struct fw_blob *
5486
qla2x00_request_firmware(scsi_qla_host_t *vha)
5487
{
5488
	struct qla_hw_data *ha = vha->hw;
5489 5490 5491 5492 5493 5494
	struct fw_blob *blob;

	if (IS_QLA2100(ha)) {
		blob = &qla_fw_blobs[FW_ISP21XX];
	} else if (IS_QLA2200(ha)) {
		blob = &qla_fw_blobs[FW_ISP22XX];
5495
	} else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5496
		blob = &qla_fw_blobs[FW_ISP2300];
5497
	} else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5498
		blob = &qla_fw_blobs[FW_ISP2322];
5499
	} else if (IS_QLA24XX_TYPE(ha)) {
5500
		blob = &qla_fw_blobs[FW_ISP24XX];
5501 5502
	} else if (IS_QLA25XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP25XX];
5503 5504
	} else if (IS_QLA81XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP81XX];
5505 5506
	} else if (IS_QLA82XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP82XX];
5507 5508 5509 5510
	} else if (IS_QLA2031(ha)) {
		blob = &qla_fw_blobs[FW_ISP2031];
	} else if (IS_QLA8031(ha)) {
		blob = &qla_fw_blobs[FW_ISP8031];
5511 5512
	} else if (IS_QLA27XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP27XX];
5513 5514
	} else {
		return NULL;
5515 5516
	}

5517
	mutex_lock(&qla_fw_lock);
5518 5519 5520 5521
	if (blob->fw)
		goto out;

	if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5522 5523
		ql_log(ql_log_warn, vha, 0x0063,
		    "Failed to load firmware image (%s).\n", blob->name);
5524 5525 5526 5527 5528 5529
		blob->fw = NULL;
		blob = NULL;
		goto out;
	}

out:
5530
	mutex_unlock(&qla_fw_lock);
5531 5532 5533 5534 5535 5536 5537 5538
	return blob;
}

static void
qla2x00_release_firmware(void)
{
	int idx;

5539
	mutex_lock(&qla_fw_lock);
5540
	for (idx = 0; idx < FW_BLOBS; idx++)
5541
		release_firmware(qla_fw_blobs[idx].fw);
5542
	mutex_unlock(&qla_fw_lock);
5543 5544
}

5545 5546 5547
static pci_ers_result_t
qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
5548 5549 5550
	scsi_qla_host_t *vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = vha->hw;

5551 5552
	ql_dbg(ql_dbg_aer, vha, 0x9000,
	    "PCI error detected, state %x.\n", state);
5553

5554 5555
	switch (state) {
	case pci_channel_io_normal:
5556
		ha->flags.eeh_busy = 0;
5557 5558
		return PCI_ERS_RESULT_CAN_RECOVER;
	case pci_channel_io_frozen:
5559
		ha->flags.eeh_busy = 1;
5560 5561
		/* For ISP82XX complete any pending mailbox cmd */
		if (IS_QLA82XX(ha)) {
5562
			ha->flags.isp82xx_fw_hung = 1;
5563 5564
			ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
			qla82xx_clear_pending_mbx(vha);
5565
		}
5566
		qla2x00_free_irqs(vha);
5567
		pci_disable_device(pdev);
5568 5569
		/* Return back all IOs */
		qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5570 5571
		return PCI_ERS_RESULT_NEED_RESET;
	case pci_channel_io_perm_failure:
5572 5573
		ha->flags.pci_channel_io_perm_failure = 1;
		qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584
		return PCI_ERS_RESULT_DISCONNECT;
	}
	return PCI_ERS_RESULT_NEED_RESET;
}

static pci_ers_result_t
qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
{
	int risc_paused = 0;
	uint32_t stat;
	unsigned long flags;
5585 5586
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5587 5588 5589
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
	struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;

5590 5591 5592
	if (IS_QLA82XX(ha))
		return PCI_ERS_RESULT_RECOVERED;

5593 5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609
	spin_lock_irqsave(&ha->hardware_lock, flags);
	if (IS_QLA2100(ha) || IS_QLA2200(ha)){
		stat = RD_REG_DWORD(&reg->hccr);
		if (stat & HCCR_RISC_PAUSE)
			risc_paused = 1;
	} else if (IS_QLA23XX(ha)) {
		stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
		if (stat & HSR_RISC_PAUSED)
			risc_paused = 1;
	} else if (IS_FWI2_CAPABLE(ha)) {
		stat = RD_REG_DWORD(&reg24->host_status);
		if (stat & HSRX_RISC_PAUSED)
			risc_paused = 1;
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

	if (risc_paused) {
5610 5611
		ql_log(ql_log_info, base_vha, 0x9003,
		    "RISC paused -- mmio_enabled, Dumping firmware.\n");
5612
		ha->isp_ops->fw_dump(base_vha, 0);
5613 5614 5615 5616 5617 5618

		return PCI_ERS_RESULT_NEED_RESET;
	} else
		return PCI_ERS_RESULT_RECOVERED;
}

5619 5620
static uint32_t
qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5621 5622 5623 5624 5625 5626 5627
{
	uint32_t rval = QLA_FUNCTION_FAILED;
	uint32_t drv_active = 0;
	struct qla_hw_data *ha = base_vha->hw;
	int fn;
	struct pci_dev *other_pdev = NULL;

5628 5629
	ql_dbg(ql_dbg_aer, base_vha, 0x9006,
	    "Entered %s.\n", __func__);
5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642

	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	if (base_vha->flags.online) {
		/* Abort all outstanding commands,
		 * so as to be requeued later */
		qla2x00_abort_isp_cleanup(base_vha);
	}


	fn = PCI_FUNC(ha->pdev->devfn);
	while (fn > 0) {
		fn--;
5643 5644
		ql_dbg(ql_dbg_aer, base_vha, 0x9007,
		    "Finding pci device at function = 0x%x.\n", fn);
5645 5646 5647 5648 5649 5650 5651 5652
		other_pdev =
		    pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
		    ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
		    fn));

		if (!other_pdev)
			continue;
		if (atomic_read(&other_pdev->enable_cnt)) {
5653 5654 5655
			ql_dbg(ql_dbg_aer, base_vha, 0x9008,
			    "Found PCI func available and enable at 0x%x.\n",
			    fn);
5656 5657 5658 5659 5660 5661 5662 5663
			pci_dev_put(other_pdev);
			break;
		}
		pci_dev_put(other_pdev);
	}

	if (!fn) {
		/* Reset owner */
5664 5665 5666
		ql_dbg(ql_dbg_aer, base_vha, 0x9009,
		    "This devfn is reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5667 5668 5669
		qla82xx_idc_lock(ha);

		qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5670
		    QLA8XXX_DEV_INITIALIZING);
5671 5672 5673 5674 5675

		qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
		    QLA82XX_IDC_VERSION);

		drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5676 5677
		ql_dbg(ql_dbg_aer, base_vha, 0x900a,
		    "drv_active = 0x%x.\n", drv_active);
5678 5679 5680 5681 5682 5683 5684 5685 5686 5687 5688 5689

		qla82xx_idc_unlock(ha);
		/* Reset if device is not already reset
		 * drv_active would be 0 if a reset has already been done
		 */
		if (drv_active)
			rval = qla82xx_start_firmware(base_vha);
		else
			rval = QLA_SUCCESS;
		qla82xx_idc_lock(ha);

		if (rval != QLA_SUCCESS) {
5690 5691
			ql_log(ql_log_info, base_vha, 0x900b,
			    "HW State: FAILED.\n");
5692 5693
			qla82xx_clear_drv_active(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5694
			    QLA8XXX_DEV_FAILED);
5695
		} else {
5696 5697
			ql_log(ql_log_info, base_vha, 0x900c,
			    "HW State: READY.\n");
5698
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5699
			    QLA8XXX_DEV_READY);
5700
			qla82xx_idc_unlock(ha);
5701
			ha->flags.isp82xx_fw_hung = 0;
5702 5703 5704 5705 5706 5707 5708 5709
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			/* Clear driver state register */
			qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
			qla82xx_set_drv_active(base_vha);
		}
		qla82xx_idc_unlock(ha);
	} else {
5710 5711 5712
		ql_dbg(ql_dbg_aer, base_vha, 0x900d,
		    "This devfn is not reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5713
		if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5714
		    QLA8XXX_DEV_READY)) {
5715
			ha->flags.isp82xx_fw_hung = 0;
5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			qla82xx_set_drv_active(base_vha);
			qla82xx_idc_unlock(ha);
		}
	}
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	return rval;
}

5727 5728 5729 5730
static pci_ers_result_t
qla2xxx_pci_slot_reset(struct pci_dev *pdev)
{
	pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5731 5732
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5733 5734
	struct rsp_que *rsp;
	int rc, retries = 10;
5735

5736 5737
	ql_dbg(ql_dbg_aer, base_vha, 0x9004,
	    "Slot Reset.\n");
5738

5739 5740 5741 5742 5743 5744 5745 5746
	/* Workaround: qla2xxx driver which access hardware earlier
	 * needs error state to be pci_channel_io_online.
	 * Otherwise mailbox command timesout.
	 */
	pdev->error_state = pci_channel_io_normal;

	pci_restore_state(pdev);

5747 5748 5749 5750 5751
	/* pci_restore_state() clears the saved_state flag of the device
	 * save restored state which resets saved_state flag
	 */
	pci_save_state(pdev);

5752 5753 5754 5755
	if (ha->mem_only)
		rc = pci_enable_device_mem(pdev);
	else
		rc = pci_enable_device(pdev);
5756

5757
	if (rc) {
5758
		ql_log(ql_log_warn, base_vha, 0x9005,
5759
		    "Can't re-enable PCI device after reset.\n");
5760
		goto exit_slot_reset;
5761 5762
	}

5763 5764
	rsp = ha->rsp_q_map[0];
	if (qla2x00_request_irqs(ha, rsp))
5765
		goto exit_slot_reset;
5766

5767
	if (ha->isp_ops->pci_config(base_vha))
5768 5769 5770 5771 5772 5773 5774 5775 5776
		goto exit_slot_reset;

	if (IS_QLA82XX(ha)) {
		if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
			ret = PCI_ERS_RESULT_RECOVERED;
			goto exit_slot_reset;
		} else
			goto exit_slot_reset;
	}
5777

5778 5779
	while (ha->flags.mbox_busy && retries--)
		msleep(1000);
5780

5781
	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5782
	if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5783
		ret =  PCI_ERS_RESULT_RECOVERED;
5784
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5785

5786

5787
exit_slot_reset:
5788 5789
	ql_dbg(ql_dbg_aer, base_vha, 0x900e,
	    "slot_reset return %x.\n", ret);
5790

5791 5792 5793 5794 5795 5796
	return ret;
}

static void
qla2xxx_pci_resume(struct pci_dev *pdev)
{
5797 5798
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5799 5800
	int ret;

5801 5802
	ql_dbg(ql_dbg_aer, base_vha, 0x900f,
	    "pci_resume.\n");
5803

5804
	ret = qla2x00_wait_for_hba_online(base_vha);
5805
	if (ret != QLA_SUCCESS) {
5806 5807
		ql_log(ql_log_fatal, base_vha, 0x9002,
		    "The device failed to resume I/O from slot/link_reset.\n");
5808
	}
5809

5810 5811
	pci_cleanup_aer_uncorrect_error_status(pdev);

5812
	ha->flags.eeh_busy = 0;
5813 5814
}

5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840
static void
qla83xx_disable_laser(scsi_qla_host_t *vha)
{
	uint32_t reg, data, fn;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;

	/* pci func #/port # */
	ql_dbg(ql_dbg_init, vha, 0x004b,
	    "Disabling Laser for hba: %p\n", vha);

	fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
		(BIT_15|BIT_14|BIT_13|BIT_12));

	fn = (fn >> 12);

	if (fn & 1)
		reg = PORT_1_2031;
	else
		reg = PORT_0_2031;

	data = LASER_OFF_2031;

	qla83xx_wr_reg(vha, reg, data);
}

5841
static const struct pci_error_handlers qla2xxx_err_handler = {
5842 5843 5844 5845 5846 5847
	.error_detected = qla2xxx_pci_error_detected,
	.mmio_enabled = qla2xxx_pci_mmio_enabled,
	.slot_reset = qla2xxx_pci_slot_reset,
	.resume = qla2xxx_pci_resume,
};

5848
static struct pci_device_id qla2xxx_pci_tbl[] = {
5849 5850 5851 5852 5853 5854 5855 5856 5857
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5858
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5859 5860
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5861
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5862
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5863
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5864
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5865
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5866
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5867
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5868
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5869
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5870
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
5871 5872 5873 5874
	{ 0 },
};
MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);

5875
static struct pci_driver qla2xxx_pci_driver = {
5876
	.name		= QLA2XXX_DRIVER_NAME,
5877 5878 5879
	.driver		= {
		.owner		= THIS_MODULE,
	},
5880
	.id_table	= qla2xxx_pci_tbl,
5881
	.probe		= qla2x00_probe_one,
A
Adrian Bunk 已提交
5882
	.remove		= qla2x00_remove_one,
5883
	.shutdown	= qla2x00_shutdown,
5884
	.err_handler	= &qla2xxx_err_handler,
5885 5886
};

5887
static const struct file_operations apidev_fops = {
5888
	.owner = THIS_MODULE,
5889
	.llseek = noop_llseek,
5890 5891
};

L
Linus Torvalds 已提交
5892 5893 5894 5895 5896 5897
/**
 * qla2x00_module_init - Module initialization.
 **/
static int __init
qla2x00_module_init(void)
{
5898 5899
	int ret = 0;

L
Linus Torvalds 已提交
5900
	/* Allocate cache for SRBs. */
5901
	srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5902
	    SLAB_HWCACHE_ALIGN, NULL);
L
Linus Torvalds 已提交
5903
	if (srb_cachep == NULL) {
5904 5905
		ql_log(ql_log_fatal, NULL, 0x0001,
		    "Unable to allocate SRB cache...Failing load!.\n");
L
Linus Torvalds 已提交
5906 5907 5908
		return -ENOMEM;
	}

5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923
	/* Initialize target kmem_cache and mem_pools */
	ret = qlt_init();
	if (ret < 0) {
		kmem_cache_destroy(srb_cachep);
		return ret;
	} else if (ret > 0) {
		/*
		 * If initiator mode is explictly disabled by qlt_init(),
		 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
		 * performing scsi_scan_target() during LOOP UP event.
		 */
		qla2xxx_transport_functions.disable_target_scan = 1;
		qla2xxx_transport_vport_functions.disable_target_scan = 1;
	}

L
Linus Torvalds 已提交
5924 5925
	/* Derive version string. */
	strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5926
	if (ql2xextended_error_logging)
5927 5928
		strcat(qla2x00_version_str, "-debug");

5929 5930
	qla2xxx_transport_template =
	    fc_attach_transport(&qla2xxx_transport_functions);
5931 5932
	if (!qla2xxx_transport_template) {
		kmem_cache_destroy(srb_cachep);
5933 5934
		ql_log(ql_log_fatal, NULL, 0x0002,
		    "fc_attach_transport failed...Failing load!.\n");
5935
		qlt_exit();
L
Linus Torvalds 已提交
5936
		return -ENODEV;
5937
	}
5938 5939 5940

	apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
	if (apidev_major < 0) {
5941 5942
		ql_log(ql_log_fatal, NULL, 0x0003,
		    "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5943 5944
	}

5945 5946 5947 5948
	qla2xxx_transport_vport_template =
	    fc_attach_transport(&qla2xxx_transport_vport_functions);
	if (!qla2xxx_transport_vport_template) {
		kmem_cache_destroy(srb_cachep);
5949
		qlt_exit();
5950
		fc_release_transport(qla2xxx_transport_template);
5951 5952
		ql_log(ql_log_fatal, NULL, 0x0004,
		    "fc_attach_transport vport failed...Failing load!.\n");
L
Linus Torvalds 已提交
5953
		return -ENODEV;
5954
	}
5955 5956
	ql_log(ql_log_info, NULL, 0x0005,
	    "QLogic Fibre Channel HBA Driver: %s.\n",
5957
	    qla2x00_version_str);
5958
	ret = pci_register_driver(&qla2xxx_pci_driver);
5959 5960
	if (ret) {
		kmem_cache_destroy(srb_cachep);
5961
		qlt_exit();
5962
		fc_release_transport(qla2xxx_transport_template);
5963
		fc_release_transport(qla2xxx_transport_vport_template);
5964 5965 5966
		ql_log(ql_log_fatal, NULL, 0x0006,
		    "pci_register_driver failed...ret=%d Failing load!.\n",
		    ret);
5967 5968
	}
	return ret;
L
Linus Torvalds 已提交
5969 5970 5971 5972 5973 5974 5975 5976
}

/**
 * qla2x00_module_exit - Module cleanup.
 **/
static void __exit
qla2x00_module_exit(void)
{
5977
	unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5978
	pci_unregister_driver(&qla2xxx_pci_driver);
5979
	qla2x00_release_firmware();
5980
	kmem_cache_destroy(srb_cachep);
5981
	qlt_exit();
5982 5983
	if (ctx_cachep)
		kmem_cache_destroy(ctx_cachep);
L
Linus Torvalds 已提交
5984
	fc_release_transport(qla2xxx_transport_template);
5985
	fc_release_transport(qla2xxx_transport_vport_template);
L
Linus Torvalds 已提交
5986 5987 5988 5989 5990 5991 5992 5993 5994
}

module_init(qla2x00_module_init);
module_exit(qla2x00_module_exit);

MODULE_AUTHOR("QLogic Corporation");
MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(QLA2XXX_VERSION);
5995 5996 5997 5998 5999
MODULE_FIRMWARE(FW_FILE_ISP21XX);
MODULE_FIRMWARE(FW_FILE_ISP22XX);
MODULE_FIRMWARE(FW_FILE_ISP2300);
MODULE_FIRMWARE(FW_FILE_ISP2322);
MODULE_FIRMWARE(FW_FILE_ISP24XX);
6000
MODULE_FIRMWARE(FW_FILE_ISP25XX);
6001 6002 6003
MODULE_FIRMWARE(FW_FILE_ISP2031);
MODULE_FIRMWARE(FW_FILE_ISP8031);
MODULE_FIRMWARE(FW_FILE_ISP27XX);