mce.c 58.8 KB
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/*
 * Machine check handler.
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 *
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 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
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 * Rest from unknown author(s).
 * 2004 Andi Kleen. Rewrote most of it.
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 * Copyright 2008 Intel Corporation
 * Author: Andi Kleen
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 */
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/thread_info.h>
#include <linux/capability.h>
#include <linux/miscdevice.h>
#include <linux/ratelimit.h>
#include <linux/kallsyms.h>
#include <linux/rcupdate.h>
#include <linux/kobject.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
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#include <linux/string.h>
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#include <linux/device.h>
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#include <linux/syscore_ops.h>
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#include <linux/delay.h>
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#include <linux/ctype.h>
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#include <linux/sched.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/init.h>
#include <linux/kmod.h>
#include <linux/poll.h>
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#include <linux/nmi.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/debugfs.h>
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#include <linux/irq_work.h>
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#include <linux/export.h>
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#include <asm/processor.h>
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#include <asm/mce.h>
#include <asm/msr.h>
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#include "mce-internal.h"
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static DEFINE_MUTEX(mce_chrdev_read_mutex);
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#define rcu_dereference_check_mce(p) \
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	rcu_dereference_index_check((p), \
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			      rcu_read_lock_sched_held() || \
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			      lockdep_is_held(&mce_chrdev_read_mutex))
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#define CREATE_TRACE_POINTS
#include <trace/events/mce.h>

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#define SPINUNIT 100	/* 100ns */

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DEFINE_PER_CPU(unsigned, mce_exception_count);

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struct mce_bank *mce_banks __read_mostly;
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struct mca_config mca_cfg __read_mostly = {
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	.bootlog  = -1,
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	/*
	 * Tolerant levels:
	 * 0: always panic on uncorrected errors, log corrected errors
	 * 1: panic or SIGBUS on uncorrected errors, log corrected errors
	 * 2: SIGBUS or log uncorrected errors (if possible), log corr. errors
	 * 3: never panic or SIGBUS, log all errors (for testing only)
	 */
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	.tolerant = 1,
	.monarch_timeout = -1
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};

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/* User mode helper program triggered by machine check event */
static unsigned long		mce_need_notify;
static char			mce_helper[128];
static char			*mce_helper_argv[2] = { mce_helper, NULL };
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static DECLARE_WAIT_QUEUE_HEAD(mce_chrdev_wait);

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static DEFINE_PER_CPU(struct mce, mces_seen);
static int			cpu_missing;

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/* CMCI storm detection filter */
static DEFINE_PER_CPU(unsigned long, mce_polled_error);

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/*
 * MCA banks polled by the period polling timer for corrected events.
 * With Intel CMCI, this only has MCA banks which do not support CMCI (if any).
 */
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DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
	[0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
};

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/*
 * MCA banks controlled through firmware first for corrected errors.
 * This is a global list of banks for which we won't enable CMCI and we
 * won't poll. Firmware controls these banks and is responsible for
 * reporting corrected errors through GHES. Uncorrected/recoverable
 * errors are still notified through a machine check.
 */
mce_banks_t mce_banks_ce_disabled;

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static DEFINE_PER_CPU(struct work_struct, mce_work);

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static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);

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/*
 * CPU/chipset specific EDAC code can register a notifier call here to print
 * MCE errors in a human-readable form.
 */
ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);

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/* Do initial initialization of a struct mce */
void mce_setup(struct mce *m)
{
	memset(m, 0, sizeof(struct mce));
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	m->cpu = m->extcpu = smp_processor_id();
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	rdtscll(m->tsc);
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	/* We hope get_seconds stays lockless */
	m->time = get_seconds();
	m->cpuvendor = boot_cpu_data.x86_vendor;
	m->cpuid = cpuid_eax(1);
	m->socketid = cpu_data(m->extcpu).phys_proc_id;
	m->apicid = cpu_data(m->extcpu).initial_apicid;
	rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
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}

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DEFINE_PER_CPU(struct mce, injectm);
EXPORT_PER_CPU_SYMBOL_GPL(injectm);

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/*
 * Lockless MCE logging infrastructure.
 * This avoids deadlocks on printk locks without having to break locks. Also
 * separate MCEs from kernel messages to avoid bogus bug reports.
 */

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static struct mce_log mcelog = {
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	.signature	= MCE_LOG_SIGNATURE,
	.len		= MCE_LOG_LEN,
	.recordlen	= sizeof(struct mce),
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};
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void mce_log(struct mce *mce)
{
	unsigned next, entry;
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	int ret = 0;
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	/* Emit the trace record: */
	trace_mce_record(mce);

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	ret = atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, mce);
	if (ret == NOTIFY_STOP)
		return;

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	mce->finished = 0;
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	wmb();
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	for (;;) {
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		entry = rcu_dereference_check_mce(mcelog.next);
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		for (;;) {
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			/*
			 * When the buffer fills up discard new entries.
			 * Assume that the earlier errors are the more
			 * interesting ones:
			 */
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			if (entry >= MCE_LOG_LEN) {
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				set_bit(MCE_OVERFLOW,
					(unsigned long *)&mcelog.flags);
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				return;
			}
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			/* Old left over entry. Skip: */
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			if (mcelog.entry[entry].finished) {
				entry++;
				continue;
			}
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			break;
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		}
		smp_rmb();
		next = entry + 1;
		if (cmpxchg(&mcelog.next, entry, next) == entry)
			break;
	}
	memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
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	wmb();
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	mcelog.entry[entry].finished = 1;
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	wmb();
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	mce->finished = 1;
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	set_bit(0, &mce_need_notify);
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}

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static void drain_mcelog_buffer(void)
{
	unsigned int next, i, prev = 0;

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	next = ACCESS_ONCE(mcelog.next);
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	do {
		struct mce *m;

		/* drain what was logged during boot */
		for (i = prev; i < next; i++) {
			unsigned long start = jiffies;
			unsigned retries = 1;

			m = &mcelog.entry[i];

			while (!m->finished) {
				if (time_after_eq(jiffies, start + 2*retries))
					retries++;

				cpu_relax();

				if (!m->finished && retries >= 4) {
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					pr_err("skipping error being logged currently!\n");
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					break;
				}
			}
			smp_rmb();
			atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, m);
		}

		memset(mcelog.entry + prev, 0, (next - prev) * sizeof(*m));
		prev = next;
		next = cmpxchg(&mcelog.next, prev, 0);
	} while (next != prev);
}


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void mce_register_decode_chain(struct notifier_block *nb)
{
	atomic_notifier_chain_register(&x86_mce_decoder_chain, nb);
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	drain_mcelog_buffer();
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}
EXPORT_SYMBOL_GPL(mce_register_decode_chain);

void mce_unregister_decode_chain(struct notifier_block *nb)
{
	atomic_notifier_chain_unregister(&x86_mce_decoder_chain, nb);
}
EXPORT_SYMBOL_GPL(mce_unregister_decode_chain);

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static void print_mce(struct mce *m)
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{
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	int ret = 0;

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	pr_emerg(HW_ERR "CPU %d: Machine Check Exception: %Lx Bank %d: %016Lx\n",
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	       m->extcpu, m->mcgstatus, m->bank, m->status);
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	if (m->ip) {
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		pr_emerg(HW_ERR "RIP%s %02x:<%016Lx> ",
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			!(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
				m->cs, m->ip);

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		if (m->cs == __KERNEL_CS)
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			print_symbol("{%s}", m->ip);
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		pr_cont("\n");
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	}
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	pr_emerg(HW_ERR "TSC %llx ", m->tsc);
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	if (m->addr)
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		pr_cont("ADDR %llx ", m->addr);
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	if (m->misc)
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		pr_cont("MISC %llx ", m->misc);
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	pr_cont("\n");
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	/*
	 * Note this output is parsed by external tools and old fields
	 * should not be changed.
	 */
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	pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
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		m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
		cpu_data(m->extcpu).microcode);
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	/*
	 * Print out human-readable details about the MCE error,
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	 * (if the CPU has an implementation for that)
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	 */
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	ret = atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, m);
	if (ret == NOTIFY_STOP)
		return;

	pr_emerg_ratelimited(HW_ERR "Run the above through 'mcelog --ascii'\n");
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}

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#define PANIC_TIMEOUT 5 /* 5 seconds */

static atomic_t mce_paniced;

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static int fake_panic;
static atomic_t mce_fake_paniced;

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/* Panic in progress. Enable interrupts and wait for final IPI */
static void wait_for_panic(void)
{
	long timeout = PANIC_TIMEOUT*USEC_PER_SEC;
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	preempt_disable();
	local_irq_enable();
	while (timeout-- > 0)
		udelay(1);
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	if (panic_timeout == 0)
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		panic_timeout = mca_cfg.panic_timeout;
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	panic("Panicing machine check CPU died");
}

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static void mce_panic(char *msg, struct mce *final, char *exp)
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{
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	int i, apei_err = 0;
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	if (!fake_panic) {
		/*
		 * Make sure only one CPU runs in machine check panic
		 */
		if (atomic_inc_return(&mce_paniced) > 1)
			wait_for_panic();
		barrier();
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		bust_spinlocks(1);
		console_verbose();
	} else {
		/* Don't log too much for fake panic */
		if (atomic_inc_return(&mce_fake_paniced) > 1)
			return;
	}
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	/* First print corrected ones that are still unlogged */
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	for (i = 0; i < MCE_LOG_LEN; i++) {
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		struct mce *m = &mcelog.entry[i];
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		if (!(m->status & MCI_STATUS_VAL))
			continue;
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		if (!(m->status & MCI_STATUS_UC)) {
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			print_mce(m);
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			if (!apei_err)
				apei_err = apei_write_mce(m);
		}
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	}
	/* Now print uncorrected but with the final one last */
	for (i = 0; i < MCE_LOG_LEN; i++) {
		struct mce *m = &mcelog.entry[i];
		if (!(m->status & MCI_STATUS_VAL))
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			continue;
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		if (!(m->status & MCI_STATUS_UC))
			continue;
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		if (!final || memcmp(m, final, sizeof(struct mce))) {
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			print_mce(m);
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			if (!apei_err)
				apei_err = apei_write_mce(m);
		}
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	}
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	if (final) {
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		print_mce(final);
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		if (!apei_err)
			apei_err = apei_write_mce(final);
	}
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	if (cpu_missing)
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		pr_emerg(HW_ERR "Some CPUs didn't answer in synchronization\n");
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	if (exp)
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		pr_emerg(HW_ERR "Machine check: %s\n", exp);
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	if (!fake_panic) {
		if (panic_timeout == 0)
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			panic_timeout = mca_cfg.panic_timeout;
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		panic(msg);
	} else
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		pr_emerg(HW_ERR "Fake kernel panic: %s\n", msg);
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}
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/* Support code for software error injection */

static int msr_to_offset(u32 msr)
{
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	unsigned bank = __this_cpu_read(injectm.bank);
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	if (msr == mca_cfg.rip_msr)
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		return offsetof(struct mce, ip);
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	if (msr == MSR_IA32_MCx_STATUS(bank))
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		return offsetof(struct mce, status);
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	if (msr == MSR_IA32_MCx_ADDR(bank))
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		return offsetof(struct mce, addr);
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	if (msr == MSR_IA32_MCx_MISC(bank))
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		return offsetof(struct mce, misc);
	if (msr == MSR_IA32_MCG_STATUS)
		return offsetof(struct mce, mcgstatus);
	return -1;
}

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/* MSR access wrappers used for error injection */
static u64 mce_rdmsrl(u32 msr)
{
	u64 v;
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	if (__this_cpu_read(injectm.finished)) {
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		int offset = msr_to_offset(msr);
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		if (offset < 0)
			return 0;
		return *(u64 *)((char *)&__get_cpu_var(injectm) + offset);
	}
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	if (rdmsrl_safe(msr, &v)) {
		WARN_ONCE(1, "mce: Unable to read msr %d!\n", msr);
		/*
		 * Return zero in case the access faulted. This should
		 * not happen normally but can happen if the CPU does
		 * something weird, or if the code is buggy.
		 */
		v = 0;
	}

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	return v;
}

static void mce_wrmsrl(u32 msr, u64 v)
{
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	if (__this_cpu_read(injectm.finished)) {
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		int offset = msr_to_offset(msr);
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		if (offset >= 0)
			*(u64 *)((char *)&__get_cpu_var(injectm) + offset) = v;
		return;
	}
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	wrmsrl(msr, v);
}

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/*
 * Collect all global (w.r.t. this processor) status about this machine
 * check into our "mce" struct so that we can use it later to assess
 * the severity of the problem as we read per-bank specific details.
 */
static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
{
	mce_setup(m);

	m->mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
	if (regs) {
		/*
		 * Get the address of the instruction at the time of
		 * the machine check error.
		 */
		if (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) {
			m->ip = regs->ip;
			m->cs = regs->cs;
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			/*
			 * When in VM86 mode make the cs look like ring 3
			 * always. This is a lie, but it's better than passing
			 * the additional vm86 bit around everywhere.
			 */
			if (v8086_mode(regs))
				m->cs |= 3;
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		}
		/* Use accurate RIP reporting if available. */
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		if (mca_cfg.rip_msr)
			m->ip = mce_rdmsrl(mca_cfg.rip_msr);
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	}
}

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/*
 * Simple lockless ring to communicate PFNs from the exception handler with the
 * process context work function. This is vastly simplified because there's
 * only a single reader and a single writer.
 */
#define MCE_RING_SIZE 16	/* we use one entry less */

struct mce_ring {
	unsigned short start;
	unsigned short end;
	unsigned long ring[MCE_RING_SIZE];
};
static DEFINE_PER_CPU(struct mce_ring, mce_ring);

/* Runs with CPU affinity in workqueue */
static int mce_ring_empty(void)
{
	struct mce_ring *r = &__get_cpu_var(mce_ring);

	return r->start == r->end;
}

static int mce_ring_get(unsigned long *pfn)
{
	struct mce_ring *r;
	int ret = 0;

	*pfn = 0;
	get_cpu();
	r = &__get_cpu_var(mce_ring);
	if (r->start == r->end)
		goto out;
	*pfn = r->ring[r->start];
	r->start = (r->start + 1) % MCE_RING_SIZE;
	ret = 1;
out:
	put_cpu();
	return ret;
}

/* Always runs in MCE context with preempt off */
static int mce_ring_add(unsigned long pfn)
{
	struct mce_ring *r = &__get_cpu_var(mce_ring);
	unsigned next;

	next = (r->end + 1) % MCE_RING_SIZE;
	if (next == r->start)
		return -1;
	r->ring[r->end] = pfn;
	wmb();
	r->end = next;
	return 0;
}

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int mce_available(struct cpuinfo_x86 *c)
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{
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	if (mca_cfg.disabled)
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		return 0;
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	return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
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}

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static void mce_schedule_work(void)
{
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	if (!mce_ring_empty())
		schedule_work(&__get_cpu_var(mce_work));
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}

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DEFINE_PER_CPU(struct irq_work, mce_irq_work);

static void mce_irq_work_cb(struct irq_work *entry)
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{
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	mce_notify_irq();
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	mce_schedule_work();
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}

static void mce_report_event(struct pt_regs *regs)
{
	if (regs->flags & (X86_VM_MASK|X86_EFLAGS_IF)) {
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		mce_notify_irq();
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		/*
		 * Triggering the work queue here is just an insurance
		 * policy in case the syscall exit notify handler
		 * doesn't run soon enough or ends up running on the
		 * wrong CPU (can happen when audit sleeps)
		 */
		mce_schedule_work();
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		return;
	}

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	irq_work_queue(&__get_cpu_var(mce_irq_work));
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}

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/*
 * Read ADDR and MISC registers.
 */
static void mce_read_aux(struct mce *m, int i)
{
	if (m->status & MCI_STATUS_MISCV)
		m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
	if (m->status & MCI_STATUS_ADDRV) {
		m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));

		/*
		 * Mask the reported address by the reported granularity.
		 */
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		if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) {
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			u8 shift = MCI_MISC_ADDR_LSB(m->misc);
			m->addr >>= shift;
			m->addr <<= shift;
		}
	}
}

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DEFINE_PER_CPU(unsigned, mce_poll_count);

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/*
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 * Poll for corrected events or events that happened before reset.
 * Those are just logged through /dev/mcelog.
 *
 * This is executed in standard interrupt context.
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 *
 * Note: spec recommends to panic for fatal unsignalled
 * errors here. However this would be quite problematic --
 * we would need to reimplement the Monarch handling and
 * it would mess up the exclusion between exception handler
 * and poll hander -- * so we skip this for now.
 * These cases should not happen anyways, or only when the CPU
 * is already totally * confused. In this case it's likely it will
 * not fully execute the machine check handler either.
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 */
595
void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
596 597 598 599
{
	struct mce m;
	int i;

600
	this_cpu_inc(mce_poll_count);
601

602
	mce_gather_info(&m, NULL);
603

604
	for (i = 0; i < mca_cfg.banks; i++) {
605
		if (!mce_banks[i].ctl || !test_bit(i, *b))
606 607 608 609 610 611 612 613
			continue;

		m.misc = 0;
		m.addr = 0;
		m.bank = i;
		m.tsc = 0;

		barrier();
614
		m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
615 616 617
		if (!(m.status & MCI_STATUS_VAL))
			continue;

I
Ingo Molnar 已提交
618
		this_cpu_write(mce_polled_error, 1);
619
		/*
A
Andi Kleen 已提交
620 621
		 * Uncorrected or signalled events are handled by the exception
		 * handler when it is enabled, so don't process those here.
622 623 624
		 *
		 * TBD do the same check for MCI_STATUS_EN here?
		 */
A
Andi Kleen 已提交
625
		if (!(flags & MCP_UC) &&
626
		    (m.status & (mca_cfg.ser ? MCI_STATUS_S : MCI_STATUS_UC)))
627 628
			continue;

629
		mce_read_aux(&m, i);
630 631 632 633 634 635 636

		if (!(flags & MCP_TIMESTAMP))
			m.tsc = 0;
		/*
		 * Don't get the IP here because it's unlikely to
		 * have anything to do with the actual error location.
		 */
637
		if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
A
Andi Kleen 已提交
638
			mce_log(&m);
639 640 641 642

		/*
		 * Clear state for this bank.
		 */
643
		mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
644 645 646 647 648 649
	}

	/*
	 * Don't clear MCG_STATUS here because it's only defined for
	 * exceptions.
	 */
650 651

	sync_core();
652
}
653
EXPORT_SYMBOL_GPL(machine_check_poll);
654

655 656 657 658
/*
 * Do a quick check if any of the events requires a panic.
 * This decides if we keep the events around or clear them.
 */
659 660
static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
			  struct pt_regs *regs)
661
{
662
	int i, ret = 0;
663

664
	for (i = 0; i < mca_cfg.banks; i++) {
665
		m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
666
		if (m->status & MCI_STATUS_VAL) {
667
			__set_bit(i, validp);
668 669 670
			if (quirk_no_way_out)
				quirk_no_way_out(i, m, regs);
		}
671
		if (mce_severity(m, mca_cfg.tolerant, msg) >= MCE_PANIC_SEVERITY)
672
			ret = 1;
673
	}
674
	return ret;
675 676
}

677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701
/*
 * Variable to establish order between CPUs while scanning.
 * Each CPU spins initially until executing is equal its number.
 */
static atomic_t mce_executing;

/*
 * Defines order of CPUs on entry. First CPU becomes Monarch.
 */
static atomic_t mce_callin;

/*
 * Check if a timeout waiting for other CPUs happened.
 */
static int mce_timed_out(u64 *t)
{
	/*
	 * The others already did panic for some reason.
	 * Bail out like in a timeout.
	 * rmb() to tell the compiler that system_state
	 * might have been modified by someone else.
	 */
	rmb();
	if (atomic_read(&mce_paniced))
		wait_for_panic();
702
	if (!mca_cfg.monarch_timeout)
703 704
		goto out;
	if ((s64)*t < SPINUNIT) {
705
		if (mca_cfg.tolerant <= 1)
706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728
			mce_panic("Timeout synchronizing machine check over CPUs",
				  NULL, NULL);
		cpu_missing = 1;
		return 1;
	}
	*t -= SPINUNIT;
out:
	touch_nmi_watchdog();
	return 0;
}

/*
 * The Monarch's reign.  The Monarch is the CPU who entered
 * the machine check handler first. It waits for the others to
 * raise the exception too and then grades them. When any
 * error is fatal panic. Only then let the others continue.
 *
 * The other CPUs entering the MCE handler will be controlled by the
 * Monarch. They are called Subjects.
 *
 * This way we prevent any potential data corruption in a unrecoverable case
 * and also makes sure always all CPU's errors are examined.
 *
729
 * Also this detects the case of a machine check event coming from outer
730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754
 * space (not detected by any CPUs) In this case some external agent wants
 * us to shut down, so panic too.
 *
 * The other CPUs might still decide to panic if the handler happens
 * in a unrecoverable place, but in this case the system is in a semi-stable
 * state and won't corrupt anything by itself. It's ok to let the others
 * continue for a bit first.
 *
 * All the spin loops have timeouts; when a timeout happens a CPU
 * typically elects itself to be Monarch.
 */
static void mce_reign(void)
{
	int cpu;
	struct mce *m = NULL;
	int global_worst = 0;
	char *msg = NULL;
	char *nmsg = NULL;

	/*
	 * This CPU is the Monarch and the other CPUs have run
	 * through their handlers.
	 * Grade the severity of the errors of all the CPUs.
	 */
	for_each_possible_cpu(cpu) {
755 756
		int severity = mce_severity(&per_cpu(mces_seen, cpu),
					    mca_cfg.tolerant,
757 758 759 760 761 762 763 764 765 766 767 768 769
					    &nmsg);
		if (severity > global_worst) {
			msg = nmsg;
			global_worst = severity;
			m = &per_cpu(mces_seen, cpu);
		}
	}

	/*
	 * Cannot recover? Panic here then.
	 * This dumps all the mces in the log buffer and stops the
	 * other CPUs.
	 */
770
	if (m && global_worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
771
		mce_panic("Fatal Machine check", m, msg);
772 773 774 775 776 777 778 779 780 781 782

	/*
	 * For UC somewhere we let the CPU who detects it handle it.
	 * Also must let continue the others, otherwise the handling
	 * CPU could deadlock on a lock.
	 */

	/*
	 * No machine check event found. Must be some external
	 * source or one CPU is hung. Panic.
	 */
783
	if (global_worst <= MCE_KEEP_SEVERITY && mca_cfg.tolerant < 3)
784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802
		mce_panic("Machine check from unknown source", NULL, NULL);

	/*
	 * Now clear all the mces_seen so that they don't reappear on
	 * the next mce.
	 */
	for_each_possible_cpu(cpu)
		memset(&per_cpu(mces_seen, cpu), 0, sizeof(struct mce));
}

static atomic_t global_nwo;

/*
 * Start of Monarch synchronization. This waits until all CPUs have
 * entered the exception handler and then determines if any of them
 * saw a fatal event that requires panic. Then it executes them
 * in the entry order.
 * TBD double check parallel CPU hotunplug
 */
H
Hidetoshi Seto 已提交
803
static int mce_start(int *no_way_out)
804
{
H
Hidetoshi Seto 已提交
805
	int order;
806
	int cpus = num_online_cpus();
807
	u64 timeout = (u64)mca_cfg.monarch_timeout * NSEC_PER_USEC;
808

H
Hidetoshi Seto 已提交
809 810
	if (!timeout)
		return -1;
811

H
Hidetoshi Seto 已提交
812
	atomic_add(*no_way_out, &global_nwo);
813 814 815 816
	/*
	 * global_nwo should be updated before mce_callin
	 */
	smp_wmb();
817
	order = atomic_inc_return(&mce_callin);
818 819 820 821 822 823 824

	/*
	 * Wait for everyone.
	 */
	while (atomic_read(&mce_callin) != cpus) {
		if (mce_timed_out(&timeout)) {
			atomic_set(&global_nwo, 0);
H
Hidetoshi Seto 已提交
825
			return -1;
826 827 828 829
		}
		ndelay(SPINUNIT);
	}

830 831 832 833
	/*
	 * mce_callin should be read before global_nwo
	 */
	smp_rmb();
834

H
Hidetoshi Seto 已提交
835 836 837 838
	if (order == 1) {
		/*
		 * Monarch: Starts executing now, the others wait.
		 */
839
		atomic_set(&mce_executing, 1);
H
Hidetoshi Seto 已提交
840 841 842 843 844 845 846 847 848 849 850 851 852 853
	} else {
		/*
		 * Subject: Now start the scanning loop one by one in
		 * the original callin order.
		 * This way when there are any shared banks it will be
		 * only seen by one CPU before cleared, avoiding duplicates.
		 */
		while (atomic_read(&mce_executing) < order) {
			if (mce_timed_out(&timeout)) {
				atomic_set(&global_nwo, 0);
				return -1;
			}
			ndelay(SPINUNIT);
		}
854 855 856
	}

	/*
H
Hidetoshi Seto 已提交
857
	 * Cache the global no_way_out state.
858
	 */
H
Hidetoshi Seto 已提交
859 860 861
	*no_way_out = atomic_read(&global_nwo);

	return order;
862 863 864 865 866 867 868 869 870
}

/*
 * Synchronize between CPUs after main scanning loop.
 * This invokes the bulk of the Monarch processing.
 */
static int mce_end(int order)
{
	int ret = -1;
871
	u64 timeout = (u64)mca_cfg.monarch_timeout * NSEC_PER_USEC;
872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930

	if (!timeout)
		goto reset;
	if (order < 0)
		goto reset;

	/*
	 * Allow others to run.
	 */
	atomic_inc(&mce_executing);

	if (order == 1) {
		/* CHECKME: Can this race with a parallel hotplug? */
		int cpus = num_online_cpus();

		/*
		 * Monarch: Wait for everyone to go through their scanning
		 * loops.
		 */
		while (atomic_read(&mce_executing) <= cpus) {
			if (mce_timed_out(&timeout))
				goto reset;
			ndelay(SPINUNIT);
		}

		mce_reign();
		barrier();
		ret = 0;
	} else {
		/*
		 * Subject: Wait for Monarch to finish.
		 */
		while (atomic_read(&mce_executing) != 0) {
			if (mce_timed_out(&timeout))
				goto reset;
			ndelay(SPINUNIT);
		}

		/*
		 * Don't reset anything. That's done by the Monarch.
		 */
		return 0;
	}

	/*
	 * Reset all global state.
	 */
reset:
	atomic_set(&global_nwo, 0);
	atomic_set(&mce_callin, 0);
	barrier();

	/*
	 * Let others run again.
	 */
	atomic_set(&mce_executing, 0);
	return ret;
}

931 932 933 934
/*
 * Check if the address reported by the CPU is in a format we can parse.
 * It would be possible to add code for most other cases, but all would
 * be somewhat complicated (e.g. segment offset would require an instruction
L
Lucas De Marchi 已提交
935
 * parser). So only support physical addresses up to page granuality for now.
936 937 938 939 940
 */
static int mce_usable_address(struct mce *m)
{
	if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
		return 0;
941
	if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
942
		return 0;
943
	if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
944 945 946 947
		return 0;
	return 1;
}

948 949 950 951
static void mce_clear_state(unsigned long *toclear)
{
	int i;

952
	for (i = 0; i < mca_cfg.banks; i++) {
953
		if (test_bit(i, toclear))
954
			mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
955 956 957
	}
}

958 959 960 961 962 963 964 965 966 967 968
/*
 * Need to save faulting physical address associated with a process
 * in the machine check handler some place where we can grab it back
 * later in mce_notify_process()
 */
#define	MCE_INFO_MAX	16

struct mce_info {
	atomic_t		inuse;
	struct task_struct	*t;
	__u64			paddr;
969
	int			restartable;
970 971
} mce_info[MCE_INFO_MAX];

972
static void mce_save_info(__u64 addr, int c)
973 974 975 976 977 978 979
{
	struct mce_info *mi;

	for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++) {
		if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) {
			mi->t = current;
			mi->paddr = addr;
980
			mi->restartable = c;
981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002
			return;
		}
	}

	mce_panic("Too many concurrent recoverable errors", NULL, NULL);
}

static struct mce_info *mce_find_info(void)
{
	struct mce_info *mi;

	for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++)
		if (atomic_read(&mi->inuse) && mi->t == current)
			return mi;
	return NULL;
}

static void mce_clear_info(struct mce_info *mi)
{
	atomic_set(&mi->inuse, 0);
}

1003 1004 1005 1006 1007 1008 1009
/*
 * The actual machine check handler. This only handles real
 * exceptions when something got corrupted coming in through int 18.
 *
 * This is executed in NMI context not subject to normal locking rules. This
 * implies that most kernel services cannot be safely used. Don't even
 * think about putting a printk in there!
1010 1011 1012 1013
 *
 * On Intel systems this is entered on all CPUs in parallel through
 * MCE broadcast. However some CPUs might be broken beyond repair,
 * so be always careful when synchronizing with others.
L
Linus Torvalds 已提交
1014
 */
I
Ingo Molnar 已提交
1015
void do_machine_check(struct pt_regs *regs, long error_code)
L
Linus Torvalds 已提交
1016
{
1017
	struct mca_config *cfg = &mca_cfg;
1018
	struct mce m, *final;
L
Linus Torvalds 已提交
1019
	int i;
1020 1021 1022 1023 1024 1025
	int worst = 0;
	int severity;
	/*
	 * Establish sequential order between the CPUs entering the machine
	 * check handler.
	 */
H
Hidetoshi Seto 已提交
1026
	int order;
1027 1028
	/*
	 * If no_way_out gets set, there is no safe way to recover from this
1029
	 * MCE.  If mca_cfg.tolerant is cranked up, we'll try anyway.
1030 1031 1032 1033 1034 1035 1036
	 */
	int no_way_out = 0;
	/*
	 * If kill_it gets set, there might be a way to recover from this
	 * error.
	 */
	int kill_it = 0;
1037
	DECLARE_BITMAP(toclear, MAX_NR_BANKS);
1038
	DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
1039
	char *msg = "Unknown";
L
Linus Torvalds 已提交
1040

1041
	this_cpu_inc(mce_exception_count);
1042

1043
	if (!cfg->banks)
1044
		goto out;
L
Linus Torvalds 已提交
1045

1046
	mce_gather_info(&m, regs);
1047

1048 1049 1050
	final = &__get_cpu_var(mces_seen);
	*final = m;

1051
	memset(valid_banks, 0, sizeof(valid_banks));
1052
	no_way_out = mce_no_way_out(&m, &msg, valid_banks, regs);
1053

L
Linus Torvalds 已提交
1054 1055
	barrier();

A
Andi Kleen 已提交
1056
	/*
1057 1058 1059
	 * When no restart IP might need to kill or panic.
	 * Assume the worst for now, but if we find the
	 * severity is MCE_AR_SEVERITY we have other options.
A
Andi Kleen 已提交
1060 1061 1062 1063
	 */
	if (!(m.mcgstatus & MCG_STATUS_RIPV))
		kill_it = 1;

1064 1065 1066 1067 1068
	/*
	 * Go through all the banks in exclusion of the other CPUs.
	 * This way we don't report duplicated events on shared banks
	 * because the first one to see it will clear it.
	 */
H
Hidetoshi Seto 已提交
1069
	order = mce_start(&no_way_out);
1070
	for (i = 0; i < cfg->banks; i++) {
1071
		__clear_bit(i, toclear);
1072 1073
		if (!test_bit(i, valid_banks))
			continue;
1074
		if (!mce_banks[i].ctl)
L
Linus Torvalds 已提交
1075
			continue;
1076 1077

		m.misc = 0;
L
Linus Torvalds 已提交
1078 1079 1080
		m.addr = 0;
		m.bank = i;

1081
		m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
L
Linus Torvalds 已提交
1082 1083 1084
		if ((m.status & MCI_STATUS_VAL) == 0)
			continue;

1085
		/*
A
Andi Kleen 已提交
1086 1087
		 * Non uncorrected or non signaled errors are handled by
		 * machine_check_poll. Leave them alone, unless this panics.
1088
		 */
1089
		if (!(m.status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
A
Andi Kleen 已提交
1090
			!no_way_out)
1091 1092 1093 1094 1095
			continue;

		/*
		 * Set taint even when machine check was not enabled.
		 */
1096
		add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
1097

1098
		severity = mce_severity(&m, cfg->tolerant, NULL);
1099

A
Andi Kleen 已提交
1100 1101 1102 1103 1104 1105 1106 1107
		/*
		 * When machine check was for corrected handler don't touch,
		 * unless we're panicing.
		 */
		if (severity == MCE_KEEP_SEVERITY && !no_way_out)
			continue;
		__set_bit(i, toclear);
		if (severity == MCE_NO_SEVERITY) {
1108 1109 1110 1111 1112
			/*
			 * Machine check event was not enabled. Clear, but
			 * ignore.
			 */
			continue;
L
Linus Torvalds 已提交
1113 1114
		}

1115
		mce_read_aux(&m, i);
L
Linus Torvalds 已提交
1116

1117 1118 1119 1120 1121
		/*
		 * Action optional error. Queue address for later processing.
		 * When the ring overflows we just ignore the AO error.
		 * RED-PEN add some logging mechanism when
		 * usable_address or mce_add_ring fails.
1122
		 * RED-PEN don't ignore overflow for mca_cfg.tolerant == 0
1123 1124 1125 1126
		 */
		if (severity == MCE_AO_SEVERITY && mce_usable_address(&m))
			mce_ring_add(m.addr >> PAGE_SHIFT);

1127
		mce_log(&m);
L
Linus Torvalds 已提交
1128

1129 1130 1131
		if (severity > worst) {
			*final = m;
			worst = severity;
L
Linus Torvalds 已提交
1132 1133 1134
		}
	}

1135 1136 1137
	/* mce_clear_state will clear *final, save locally for use later */
	m = *final;

1138 1139 1140
	if (!no_way_out)
		mce_clear_state(toclear);

I
Ingo Molnar 已提交
1141
	/*
1142 1143
	 * Do most of the synchronization with other CPUs.
	 * When there's any problem use only local no_way_out state.
I
Ingo Molnar 已提交
1144
	 */
1145 1146
	if (mce_end(order) < 0)
		no_way_out = worst >= MCE_PANIC_SEVERITY;
1147 1148

	/*
1149 1150 1151 1152
	 * At insane "tolerant" levels we take no action. Otherwise
	 * we only die if we have no other choice. For less serious
	 * issues we try to recover, or limit damage to the current
	 * process.
1153
	 */
1154
	if (cfg->tolerant < 3) {
1155 1156 1157 1158
		if (no_way_out)
			mce_panic("Fatal machine check on current CPU", &m, msg);
		if (worst == MCE_AR_SEVERITY) {
			/* schedule action before return to userland */
1159
			mce_save_info(m.addr, m.mcgstatus & MCG_STATUS_RIPV);
1160 1161 1162 1163 1164
			set_thread_flag(TIF_MCE_NOTIFY);
		} else if (kill_it) {
			force_sig(SIGBUS, current);
		}
	}
1165

1166 1167
	if (worst > 0)
		mce_report_event(regs);
1168
	mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
1169
out:
1170
	sync_core();
L
Linus Torvalds 已提交
1171
}
1172
EXPORT_SYMBOL_GPL(do_machine_check);
L
Linus Torvalds 已提交
1173

1174 1175
#ifndef CONFIG_MEMORY_FAILURE
int memory_failure(unsigned long pfn, int vector, int flags)
1176
{
1177 1178
	/* mce_severity() should not hand us an ACTION_REQUIRED error */
	BUG_ON(flags & MF_ACTION_REQUIRED);
1179 1180 1181
	pr_err("Uncorrected memory error in page 0x%lx ignored\n"
	       "Rebuild kernel with CONFIG_MEMORY_FAILURE=y for smarter handling\n",
	       pfn);
1182 1183

	return 0;
1184
}
1185
#endif
1186 1187

/*
1188 1189 1190 1191 1192 1193
 * Called in process context that interrupted by MCE and marked with
 * TIF_MCE_NOTIFY, just before returning to erroneous userland.
 * This code is allowed to sleep.
 * Attempt possible recovery such as calling the high level VM handler to
 * process any corrupted pages, and kill/signal current process if required.
 * Action required errors are handled here.
1194 1195 1196 1197
 */
void mce_notify_process(void)
{
	unsigned long pfn;
1198
	struct mce_info *mi = mce_find_info();
1199
	int flags = MF_ACTION_REQUIRED;
1200 1201 1202 1203 1204 1205 1206 1207 1208

	if (!mi)
		mce_panic("Lost physical address for unconsumed uncorrectable error", NULL, NULL);
	pfn = mi->paddr >> PAGE_SHIFT;

	clear_thread_flag(TIF_MCE_NOTIFY);

	pr_err("Uncorrected hardware memory error in user-access at %llx",
		 mi->paddr);
1209 1210 1211 1212 1213
	/*
	 * We must call memory_failure() here even if the current process is
	 * doomed. We still need to mark the page as poisoned and alert any
	 * other users of the page.
	 */
1214 1215 1216
	if (!mi->restartable)
		flags |= MF_MUST_KILL;
	if (memory_failure(pfn, MCE_VECTOR, flags) < 0) {
1217 1218 1219 1220
		pr_err("Memory error not recovered");
		force_sig(SIGBUS, current);
	}
	mce_clear_info(mi);
1221 1222
}

1223 1224 1225 1226 1227
/*
 * Action optional processing happens here (picking up
 * from the list of faulting pages that do_machine_check()
 * placed into the "ring").
 */
1228 1229
static void mce_process_work(struct work_struct *dummy)
{
1230 1231 1232 1233
	unsigned long pfn;

	while (mce_ring_get(&pfn))
		memory_failure(pfn, MCE_VECTOR, 0);
1234 1235
}

1236 1237 1238
#ifdef CONFIG_X86_MCE_INTEL
/***
 * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
S
Simon Arlott 已提交
1239
 * @cpu: The CPU on which the event occurred.
1240 1241 1242 1243 1244 1245 1246 1247 1248 1249
 * @status: Event status information
 *
 * This function should be called by the thermal interrupt after the
 * event has been processed and the decision was made to log the event
 * further.
 *
 * The status parameter will be saved to the 'status' field of 'struct mce'
 * and historically has been the register value of the
 * MSR_IA32_THERMAL_STATUS (Intel) msr.
 */
1250
void mce_log_therm_throt_event(__u64 status)
1251 1252 1253
{
	struct mce m;

1254
	mce_setup(&m);
1255 1256 1257 1258 1259 1260
	m.bank = MCE_THERMAL_BANK;
	m.status = status;
	mce_log(&m);
}
#endif /* CONFIG_X86_MCE_INTEL */

L
Linus Torvalds 已提交
1261
/*
1262 1263 1264
 * Periodic polling timer for "silent" machine check errors.  If the
 * poller finds an MCE, poll 2x faster.  When the poller finds no more
 * errors, poll 2x slower (up to check_interval seconds).
L
Linus Torvalds 已提交
1265
 */
T
Thomas Gleixner 已提交
1266
static unsigned long check_interval = 5 * 60; /* 5 minutes */
I
Ingo Molnar 已提交
1267

T
Thomas Gleixner 已提交
1268
static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */
1269
static DEFINE_PER_CPU(struct timer_list, mce_timer);
L
Linus Torvalds 已提交
1270

C
Chen Gong 已提交
1271 1272 1273 1274 1275 1276 1277 1278
static unsigned long mce_adjust_timer_default(unsigned long interval)
{
	return interval;
}

static unsigned long (*mce_adjust_timer)(unsigned long interval) =
	mce_adjust_timer_default;

1279 1280 1281 1282 1283 1284 1285
static int cmc_error_seen(void)
{
	unsigned long *v = &__get_cpu_var(mce_polled_error);

	return test_and_clear_bit(0, v);
}

T
Thomas Gleixner 已提交
1286
static void mce_timer_fn(unsigned long data)
L
Linus Torvalds 已提交
1287
{
T
Thomas Gleixner 已提交
1288 1289
	struct timer_list *t = &__get_cpu_var(mce_timer);
	unsigned long iv;
1290
	int notify;
1291 1292 1293

	WARN_ON(smp_processor_id() != data);

1294
	if (mce_available(__this_cpu_ptr(&cpu_info))) {
1295 1296
		machine_check_poll(MCP_TIMESTAMP,
				&__get_cpu_var(mce_poll_banks));
C
Chen Gong 已提交
1297
		mce_intel_cmci_poll();
I
Ingo Molnar 已提交
1298
	}
L
Linus Torvalds 已提交
1299 1300

	/*
1301 1302
	 * Alert userspace if needed.  If we logged an MCE, reduce the
	 * polling interval, otherwise increase the polling interval.
L
Linus Torvalds 已提交
1303
	 */
T
Thomas Gleixner 已提交
1304
	iv = __this_cpu_read(mce_next_interval);
1305 1306 1307
	notify = mce_notify_irq();
	notify |= cmc_error_seen();
	if (notify) {
1308
		iv = max(iv / 2, (unsigned long) HZ/100);
C
Chen Gong 已提交
1309
	} else {
T
Thomas Gleixner 已提交
1310
		iv = min(iv * 2, round_jiffies_relative(check_interval * HZ));
C
Chen Gong 已提交
1311 1312
		iv = mce_adjust_timer(iv);
	}
T
Thomas Gleixner 已提交
1313
	__this_cpu_write(mce_next_interval, iv);
C
Chen Gong 已提交
1314 1315 1316 1317 1318 1319
	/* Might have become 0 after CMCI storm subsided */
	if (iv) {
		t->expires = jiffies + iv;
		add_timer_on(t, smp_processor_id());
	}
}
1320

C
Chen Gong 已提交
1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338
/*
 * Ensure that the timer is firing in @interval from now.
 */
void mce_timer_kick(unsigned long interval)
{
	struct timer_list *t = &__get_cpu_var(mce_timer);
	unsigned long when = jiffies + interval;
	unsigned long iv = __this_cpu_read(mce_next_interval);

	if (timer_pending(t)) {
		if (time_before(when, t->expires))
			mod_timer_pinned(t, when);
	} else {
		t->expires = round_jiffies(when);
		add_timer_on(t, smp_processor_id());
	}
	if (interval < iv)
		__this_cpu_write(mce_next_interval, interval);
1339 1340
}

1341 1342 1343 1344 1345 1346 1347 1348 1349
/* Must not be called in IRQ context where del_timer_sync() can deadlock */
static void mce_timer_delete_all(void)
{
	int cpu;

	for_each_online_cpu(cpu)
		del_timer_sync(&per_cpu(mce_timer, cpu));
}

1350 1351
static void mce_do_trigger(struct work_struct *work)
{
1352
	call_usermodehelper(mce_helper, mce_helper_argv, NULL, UMH_NO_WAIT);
1353 1354 1355 1356
}

static DECLARE_WORK(mce_trigger_work, mce_do_trigger);

1357
/*
1358 1359 1360
 * Notify the user(s) about new machine check events.
 * Can be called from interrupt context, but not from machine check/NMI
 * context.
1361
 */
1362
int mce_notify_irq(void)
1363
{
1364 1365 1366
	/* Not more than two messages every minute */
	static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);

1367
	if (test_and_clear_bit(0, &mce_need_notify)) {
1368 1369
		/* wake processes polling /dev/mcelog */
		wake_up_interruptible(&mce_chrdev_wait);
1370

1371
		if (mce_helper[0])
1372
			schedule_work(&mce_trigger_work);
1373

1374
		if (__ratelimit(&ratelimit))
H
Huang Ying 已提交
1375
			pr_info(HW_ERR "Machine check events logged\n");
1376 1377

		return 1;
L
Linus Torvalds 已提交
1378
	}
1379 1380
	return 0;
}
1381
EXPORT_SYMBOL_GPL(mce_notify_irq);
1382

1383
static int __mcheck_cpu_mce_banks_init(void)
1384 1385
{
	int i;
1386
	u8 num_banks = mca_cfg.banks;
1387

1388
	mce_banks = kzalloc(num_banks * sizeof(struct mce_bank), GFP_KERNEL);
1389 1390
	if (!mce_banks)
		return -ENOMEM;
1391 1392

	for (i = 0; i < num_banks; i++) {
1393
		struct mce_bank *b = &mce_banks[i];
1394

1395 1396 1397 1398 1399 1400
		b->ctl = -1ULL;
		b->init = 1;
	}
	return 0;
}

1401
/*
L
Linus Torvalds 已提交
1402 1403
 * Initialize Machine Checks for a CPU.
 */
1404
static int __mcheck_cpu_cap_init(void)
L
Linus Torvalds 已提交
1405
{
1406
	unsigned b;
I
Ingo Molnar 已提交
1407
	u64 cap;
L
Linus Torvalds 已提交
1408 1409

	rdmsrl(MSR_IA32_MCG_CAP, cap);
1410 1411

	b = cap & MCG_BANKCNT_MASK;
1412
	if (!mca_cfg.banks)
1413
		pr_info("CPU supports %d MCE banks\n", b);
1414

1415
	if (b > MAX_NR_BANKS) {
1416
		pr_warn("Using only %u machine check banks out of %u\n",
1417 1418 1419 1420 1421
			MAX_NR_BANKS, b);
		b = MAX_NR_BANKS;
	}

	/* Don't support asymmetric configurations today */
1422 1423 1424
	WARN_ON(mca_cfg.banks != 0 && b != mca_cfg.banks);
	mca_cfg.banks = b;

1425
	if (!mce_banks) {
H
Hidetoshi Seto 已提交
1426
		int err = __mcheck_cpu_mce_banks_init();
1427

1428 1429
		if (err)
			return err;
L
Linus Torvalds 已提交
1430
	}
1431

1432
	/* Use accurate RIP reporting if available. */
1433
	if ((cap & MCG_EXT_P) && MCG_EXT_CNT(cap) >= 9)
1434
		mca_cfg.rip_msr = MSR_IA32_MCG_EIP;
L
Linus Torvalds 已提交
1435

A
Andi Kleen 已提交
1436
	if (cap & MCG_SER_P)
1437
		mca_cfg.ser = true;
A
Andi Kleen 已提交
1438

1439 1440 1441
	return 0;
}

1442
static void __mcheck_cpu_init_generic(void)
1443
{
1444
	enum mcp_flags m_fl = 0;
I
Ingo Molnar 已提交
1445
	mce_banks_t all_banks;
1446 1447 1448
	u64 cap;
	int i;

1449 1450 1451
	if (!mca_cfg.bootlog)
		m_fl = MCP_DONTLOG;

1452 1453 1454
	/*
	 * Log the machine checks left over from the previous reset.
	 */
1455
	bitmap_fill(all_banks, MAX_NR_BANKS);
1456
	machine_check_poll(MCP_UC | m_fl, &all_banks);
L
Linus Torvalds 已提交
1457 1458 1459

	set_in_cr4(X86_CR4_MCE);

1460
	rdmsrl(MSR_IA32_MCG_CAP, cap);
L
Linus Torvalds 已提交
1461 1462 1463
	if (cap & MCG_CTL_P)
		wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);

1464
	for (i = 0; i < mca_cfg.banks; i++) {
1465
		struct mce_bank *b = &mce_banks[i];
1466

1467
		if (!b->init)
1468
			continue;
1469 1470
		wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
		wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
1471
	}
L
Linus Torvalds 已提交
1472 1473
}

1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501
/*
 * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and
 * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM
 * Vol 3B Table 15-20). But this confuses both the code that determines
 * whether the machine check occurred in kernel or user mode, and also
 * the severity assessment code. Pretend that EIPV was set, and take the
 * ip/cs values from the pt_regs that mce_gather_info() ignored earlier.
 */
static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
{
	if (bank != 0)
		return;
	if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0)
		return;
	if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC|
		          MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV|
			  MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR|
			  MCACOD)) !=
			 (MCI_STATUS_UC|MCI_STATUS_EN|
			  MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S|
			  MCI_STATUS_AR|MCACOD_INSTR))
		return;

	m->mcgstatus |= MCG_STATUS_EIPV;
	m->ip = regs->ip;
	m->cs = regs->cs;
}

L
Linus Torvalds 已提交
1502
/* Add per CPU specific workarounds here */
1503
static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
1504
{
1505 1506
	struct mca_config *cfg = &mca_cfg;

1507
	if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
1508
		pr_info("unknown CPU type - not enabling MCE support\n");
1509 1510 1511
		return -EOPNOTSUPP;
	}

L
Linus Torvalds 已提交
1512
	/* This should be disabled by the BIOS, but isn't always */
1513
	if (c->x86_vendor == X86_VENDOR_AMD) {
1514
		if (c->x86 == 15 && cfg->banks > 4) {
I
Ingo Molnar 已提交
1515 1516 1517 1518 1519
			/*
			 * disable GART TBL walk error reporting, which
			 * trips off incorrectly with the IOMMU & 3ware
			 * & Cerberus:
			 */
1520
			clear_bit(10, (unsigned long *)&mce_banks[4].ctl);
I
Ingo Molnar 已提交
1521
		}
1522
		if (c->x86 <= 17 && cfg->bootlog < 0) {
I
Ingo Molnar 已提交
1523 1524 1525 1526
			/*
			 * Lots of broken BIOS around that don't clear them
			 * by default and leave crap in there. Don't log:
			 */
1527
			cfg->bootlog = 0;
I
Ingo Molnar 已提交
1528
		}
1529 1530 1531 1532
		/*
		 * Various K7s with broken bank 0 around. Always disable
		 * by default.
		 */
1533
		 if (c->x86 == 6 && cfg->banks > 0)
1534
			mce_banks[0].ctl = 0;
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561

		 /*
		  * Turn off MC4_MISC thresholding banks on those models since
		  * they're not supported there.
		  */
		 if (c->x86 == 0x15 &&
		     (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) {
			 int i;
			 u64 val, hwcr;
			 bool need_toggle;
			 u32 msrs[] = {
				0x00000413, /* MC4_MISC0 */
				0xc0000408, /* MC4_MISC1 */
			 };

			 rdmsrl(MSR_K7_HWCR, hwcr);

			 /* McStatusWrEn has to be set */
			 need_toggle = !(hwcr & BIT(18));

			 if (need_toggle)
				 wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));

			 for (i = 0; i < ARRAY_SIZE(msrs); i++) {
				 rdmsrl(msrs[i], val);

				 /* CntP bit set? */
B
Borislav Petkov 已提交
1562 1563 1564
				 if (val & BIT_64(62)) {
					val &= ~BIT_64(62);
					wrmsrl(msrs[i], val);
1565 1566 1567 1568 1569 1570 1571
				 }
			 }

			 /* restore old settings */
			 if (need_toggle)
				 wrmsrl(MSR_K7_HWCR, hwcr);
		 }
L
Linus Torvalds 已提交
1572
	}
1573

1574 1575 1576 1577 1578 1579 1580 1581 1582 1583
	if (c->x86_vendor == X86_VENDOR_INTEL) {
		/*
		 * SDM documents that on family 6 bank 0 should not be written
		 * because it aliases to another special BIOS controlled
		 * register.
		 * But it's not aliased anymore on model 0x1a+
		 * Don't ignore bank 0 completely because there could be a
		 * valid event later, merely don't write CTL0.
		 */

1584
		if (c->x86 == 6 && c->x86_model < 0x1A && cfg->banks > 0)
1585
			mce_banks[0].init = 0;
1586 1587 1588 1589 1590 1591

		/*
		 * All newer Intel systems support MCE broadcasting. Enable
		 * synchronization with a one second timeout.
		 */
		if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) &&
1592 1593
			cfg->monarch_timeout < 0)
			cfg->monarch_timeout = USEC_PER_SEC;
1594

1595 1596 1597 1598
		/*
		 * There are also broken BIOSes on some Pentium M and
		 * earlier systems:
		 */
1599 1600
		if (c->x86 == 6 && c->x86_model <= 13 && cfg->bootlog < 0)
			cfg->bootlog = 0;
1601 1602 1603

		if (c->x86 == 6 && c->x86_model == 45)
			quirk_no_way_out = quirk_sandybridge_ifu;
1604
	}
1605 1606 1607
	if (cfg->monarch_timeout < 0)
		cfg->monarch_timeout = 0;
	if (cfg->bootlog != 0)
1608
		cfg->panic_timeout = 30;
1609 1610

	return 0;
1611
}
L
Linus Torvalds 已提交
1612

1613
static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
1614 1615
{
	if (c->x86 != 5)
1616 1617
		return 0;

1618 1619
	switch (c->x86_vendor) {
	case X86_VENDOR_INTEL:
1620
		intel_p5_mcheck_init(c);
1621
		return 1;
1622 1623 1624
		break;
	case X86_VENDOR_CENTAUR:
		winchip_mcheck_init(c);
1625
		return 1;
1626 1627
		break;
	}
1628 1629

	return 0;
1630 1631
}

1632
static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
L
Linus Torvalds 已提交
1633 1634 1635 1636
{
	switch (c->x86_vendor) {
	case X86_VENDOR_INTEL:
		mce_intel_feature_init(c);
C
Chen Gong 已提交
1637
		mce_adjust_timer = mce_intel_adjust_timer;
L
Linus Torvalds 已提交
1638
		break;
1639 1640 1641
	case X86_VENDOR_AMD:
		mce_amd_feature_init(c);
		break;
L
Linus Torvalds 已提交
1642 1643 1644 1645 1646
	default:
		break;
	}
}

T
Thomas Gleixner 已提交
1647
static void mce_start_timer(unsigned int cpu, struct timer_list *t)
1648
{
1649
	unsigned long iv = check_interval * HZ;
1650

1651
	if (mca_cfg.ignore_ce || !iv)
1652 1653
		return;

1654 1655
	per_cpu(mce_next_interval, cpu) = iv;

T
Thomas Gleixner 已提交
1656
	t->expires = round_jiffies(jiffies + iv);
1657
	add_timer_on(t, cpu);
1658 1659
}

T
Thomas Gleixner 已提交
1660 1661 1662 1663 1664 1665 1666 1667 1668
static void __mcheck_cpu_init_timer(void)
{
	struct timer_list *t = &__get_cpu_var(mce_timer);
	unsigned int cpu = smp_processor_id();

	setup_timer(t, mce_timer_fn, cpu);
	mce_start_timer(cpu, t);
}

A
Andi Kleen 已提交
1669 1670 1671
/* Handle unconfigured int18 (should never happen) */
static void unexpected_machine_check(struct pt_regs *regs, long error_code)
{
1672
	pr_err("CPU#%d: Unexpected int18 (Machine Check)\n",
A
Andi Kleen 已提交
1673 1674 1675 1676 1677 1678 1679
	       smp_processor_id());
}

/* Call the installed machine check handler for this CPU setup. */
void (*machine_check_vector)(struct pt_regs *, long error_code) =
						unexpected_machine_check;

1680
/*
L
Linus Torvalds 已提交
1681
 * Called for each booted CPU to set up machine checks.
I
Ingo Molnar 已提交
1682
 * Must be called with preempt off:
L
Linus Torvalds 已提交
1683
 */
1684
void mcheck_cpu_init(struct cpuinfo_x86 *c)
L
Linus Torvalds 已提交
1685
{
1686
	if (mca_cfg.disabled)
1687 1688
		return;

1689 1690
	if (__mcheck_cpu_ancient_init(c))
		return;
1691

1692
	if (!mce_available(c))
L
Linus Torvalds 已提交
1693 1694
		return;

1695
	if (__mcheck_cpu_cap_init() < 0 || __mcheck_cpu_apply_quirks(c) < 0) {
1696
		mca_cfg.disabled = true;
1697 1698 1699
		return;
	}

1700 1701
	machine_check_vector = do_machine_check;

1702 1703 1704
	__mcheck_cpu_init_generic();
	__mcheck_cpu_init_vendor(c);
	__mcheck_cpu_init_timer();
1705
	INIT_WORK(&__get_cpu_var(mce_work), mce_process_work);
1706
	init_irq_work(&__get_cpu_var(mce_irq_work), &mce_irq_work_cb);
L
Linus Torvalds 已提交
1707 1708 1709
}

/*
1710
 * mce_chrdev: Character device /dev/mcelog to read and clear the MCE log.
L
Linus Torvalds 已提交
1711 1712
 */

1713 1714 1715
static DEFINE_SPINLOCK(mce_chrdev_state_lock);
static int mce_chrdev_open_count;	/* #times opened */
static int mce_chrdev_open_exclu;	/* already open exclusive? */
T
Tim Hockin 已提交
1716

1717
static int mce_chrdev_open(struct inode *inode, struct file *file)
T
Tim Hockin 已提交
1718
{
1719
	spin_lock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1720

1721 1722 1723
	if (mce_chrdev_open_exclu ||
	    (mce_chrdev_open_count && (file->f_flags & O_EXCL))) {
		spin_unlock(&mce_chrdev_state_lock);
I
Ingo Molnar 已提交
1724

T
Tim Hockin 已提交
1725 1726 1727 1728
		return -EBUSY;
	}

	if (file->f_flags & O_EXCL)
1729 1730
		mce_chrdev_open_exclu = 1;
	mce_chrdev_open_count++;
T
Tim Hockin 已提交
1731

1732
	spin_unlock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1733

1734
	return nonseekable_open(inode, file);
T
Tim Hockin 已提交
1735 1736
}

1737
static int mce_chrdev_release(struct inode *inode, struct file *file)
T
Tim Hockin 已提交
1738
{
1739
	spin_lock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1740

1741 1742
	mce_chrdev_open_count--;
	mce_chrdev_open_exclu = 0;
T
Tim Hockin 已提交
1743

1744
	spin_unlock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1745 1746 1747 1748

	return 0;
}

1749 1750
static void collect_tscs(void *data)
{
L
Linus Torvalds 已提交
1751
	unsigned long *cpu_tsc = (unsigned long *)data;
1752

L
Linus Torvalds 已提交
1753
	rdtscll(cpu_tsc[smp_processor_id()]);
1754
}
L
Linus Torvalds 已提交
1755

1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771
static int mce_apei_read_done;

/* Collect MCE record of previous boot in persistent storage via APEI ERST. */
static int __mce_read_apei(char __user **ubuf, size_t usize)
{
	int rc;
	u64 record_id;
	struct mce m;

	if (usize < sizeof(struct mce))
		return -EINVAL;

	rc = apei_read_mce(&m, &record_id);
	/* Error or no more MCE record */
	if (rc <= 0) {
		mce_apei_read_done = 1;
1772 1773 1774 1775 1776 1777
		/*
		 * When ERST is disabled, mce_chrdev_read() should return
		 * "no record" instead of "no device."
		 */
		if (rc == -ENODEV)
			return 0;
1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798
		return rc;
	}
	rc = -EFAULT;
	if (copy_to_user(*ubuf, &m, sizeof(struct mce)))
		return rc;
	/*
	 * In fact, we should have cleared the record after that has
	 * been flushed to the disk or sent to network in
	 * /sbin/mcelog, but we have no interface to support that now,
	 * so just clear it to avoid duplication.
	 */
	rc = apei_clear_mce(record_id);
	if (rc) {
		mce_apei_read_done = 1;
		return rc;
	}
	*ubuf += sizeof(struct mce);

	return 0;
}

1799 1800
static ssize_t mce_chrdev_read(struct file *filp, char __user *ubuf,
				size_t usize, loff_t *off)
L
Linus Torvalds 已提交
1801
{
I
Ingo Molnar 已提交
1802
	char __user *buf = ubuf;
1803
	unsigned long *cpu_tsc;
1804
	unsigned prev, next;
L
Linus Torvalds 已提交
1805 1806
	int i, err;

1807
	cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL);
1808 1809 1810
	if (!cpu_tsc)
		return -ENOMEM;

1811
	mutex_lock(&mce_chrdev_read_mutex);
1812 1813 1814 1815 1816 1817 1818

	if (!mce_apei_read_done) {
		err = __mce_read_apei(&buf, usize);
		if (err || buf != ubuf)
			goto out;
	}

1819
	next = rcu_dereference_check_mce(mcelog.next);
L
Linus Torvalds 已提交
1820 1821

	/* Only supports full reads right now */
1822 1823 1824
	err = -EINVAL;
	if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce))
		goto out;
L
Linus Torvalds 已提交
1825 1826

	err = 0;
1827 1828 1829 1830
	prev = 0;
	do {
		for (i = prev; i < next; i++) {
			unsigned long start = jiffies;
H
Hidetoshi Seto 已提交
1831
			struct mce *m = &mcelog.entry[i];
1832

H
Hidetoshi Seto 已提交
1833
			while (!m->finished) {
1834
				if (time_after_eq(jiffies, start + 2)) {
H
Hidetoshi Seto 已提交
1835
					memset(m, 0, sizeof(*m));
1836 1837 1838
					goto timeout;
				}
				cpu_relax();
1839
			}
1840
			smp_rmb();
H
Hidetoshi Seto 已提交
1841 1842
			err |= copy_to_user(buf, m, sizeof(*m));
			buf += sizeof(*m);
1843 1844
timeout:
			;
1845
		}
L
Linus Torvalds 已提交
1846

1847 1848 1849 1850 1851
		memset(mcelog.entry + prev, 0,
		       (next - prev) * sizeof(struct mce));
		prev = next;
		next = cmpxchg(&mcelog.next, prev, 0);
	} while (next != prev);
L
Linus Torvalds 已提交
1852

1853
	synchronize_sched();
L
Linus Torvalds 已提交
1854

1855 1856 1857 1858
	/*
	 * Collect entries that were still getting written before the
	 * synchronize.
	 */
1859
	on_each_cpu(collect_tscs, cpu_tsc, 1);
I
Ingo Molnar 已提交
1860

1861
	for (i = next; i < MCE_LOG_LEN; i++) {
H
Hidetoshi Seto 已提交
1862 1863 1864 1865
		struct mce *m = &mcelog.entry[i];

		if (m->finished && m->tsc < cpu_tsc[m->cpu]) {
			err |= copy_to_user(buf, m, sizeof(*m));
L
Linus Torvalds 已提交
1866
			smp_rmb();
H
Hidetoshi Seto 已提交
1867 1868
			buf += sizeof(*m);
			memset(m, 0, sizeof(*m));
L
Linus Torvalds 已提交
1869
		}
1870
	}
1871 1872 1873 1874 1875

	if (err)
		err = -EFAULT;

out:
1876
	mutex_unlock(&mce_chrdev_read_mutex);
1877
	kfree(cpu_tsc);
I
Ingo Molnar 已提交
1878

1879
	return err ? err : buf - ubuf;
L
Linus Torvalds 已提交
1880 1881
}

1882
static unsigned int mce_chrdev_poll(struct file *file, poll_table *wait)
1883
{
1884
	poll_wait(file, &mce_chrdev_wait, wait);
1885
	if (rcu_access_index(mcelog.next))
1886
		return POLLIN | POLLRDNORM;
1887 1888
	if (!mce_apei_read_done && apei_check_mce())
		return POLLIN | POLLRDNORM;
1889 1890 1891
	return 0;
}

1892 1893
static long mce_chrdev_ioctl(struct file *f, unsigned int cmd,
				unsigned long arg)
L
Linus Torvalds 已提交
1894 1895
{
	int __user *p = (int __user *)arg;
1896

L
Linus Torvalds 已提交
1897
	if (!capable(CAP_SYS_ADMIN))
1898
		return -EPERM;
I
Ingo Molnar 已提交
1899

L
Linus Torvalds 已提交
1900
	switch (cmd) {
1901
	case MCE_GET_RECORD_LEN:
L
Linus Torvalds 已提交
1902 1903
		return put_user(sizeof(struct mce), p);
	case MCE_GET_LOG_LEN:
1904
		return put_user(MCE_LOG_LEN, p);
L
Linus Torvalds 已提交
1905 1906
	case MCE_GETCLEAR_FLAGS: {
		unsigned flags;
1907 1908

		do {
L
Linus Torvalds 已提交
1909
			flags = mcelog.flags;
1910
		} while (cmpxchg(&mcelog.flags, flags, 0) != flags);
I
Ingo Molnar 已提交
1911

1912
		return put_user(flags, p);
L
Linus Torvalds 已提交
1913 1914
	}
	default:
1915 1916
		return -ENOTTY;
	}
L
Linus Torvalds 已提交
1917 1918
}

1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939
static ssize_t (*mce_write)(struct file *filp, const char __user *ubuf,
			    size_t usize, loff_t *off);

void register_mce_write_callback(ssize_t (*fn)(struct file *filp,
			     const char __user *ubuf,
			     size_t usize, loff_t *off))
{
	mce_write = fn;
}
EXPORT_SYMBOL_GPL(register_mce_write_callback);

ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,
			 size_t usize, loff_t *off)
{
	if (mce_write)
		return mce_write(filp, ubuf, usize, off);
	else
		return -EINVAL;
}

static const struct file_operations mce_chrdev_ops = {
1940 1941 1942
	.open			= mce_chrdev_open,
	.release		= mce_chrdev_release,
	.read			= mce_chrdev_read,
1943
	.write			= mce_chrdev_write,
1944 1945 1946
	.poll			= mce_chrdev_poll,
	.unlocked_ioctl		= mce_chrdev_ioctl,
	.llseek			= no_llseek,
L
Linus Torvalds 已提交
1947 1948
};

1949
static struct miscdevice mce_chrdev_device = {
L
Linus Torvalds 已提交
1950 1951 1952 1953 1954
	MISC_MCELOG_MINOR,
	"mcelog",
	&mce_chrdev_ops,
};

1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973
static void __mce_disable_bank(void *arg)
{
	int bank = *((int *)arg);
	__clear_bit(bank, __get_cpu_var(mce_poll_banks));
	cmci_disable_bank(bank);
}

void mce_disable_bank(int bank)
{
	if (bank >= mca_cfg.banks) {
		pr_warn(FW_BUG
			"Ignoring request to disable invalid MCA bank %d.\n",
			bank);
		return;
	}
	set_bit(bank, mce_banks_ce_disabled);
	on_each_cpu(__mce_disable_bank, &bank, 1);
}

H
Hidetoshi Seto 已提交
1974
/*
1975 1976 1977 1978
 * mce=off Disables machine check
 * mce=no_cmci Disables CMCI
 * mce=dont_log_ce Clears corrected events silently, no log created for CEs.
 * mce=ignore_ce Disables polling and CMCI, corrected events are not cleared.
1979 1980 1981
 * mce=TOLERANCELEVEL[,monarchtimeout] (number, see above)
 *	monarchtimeout is how long to wait for other CPUs on machine
 *	check, or 0 to not wait
H
Hidetoshi Seto 已提交
1982 1983
 * mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
 * mce=nobootlog Don't log MCEs from before booting.
1984
 * mce=bios_cmci_threshold Don't program the CMCI threshold
H
Hidetoshi Seto 已提交
1985
 */
L
Linus Torvalds 已提交
1986 1987
static int __init mcheck_enable(char *str)
{
1988 1989
	struct mca_config *cfg = &mca_cfg;

1990
	if (*str == 0) {
1991
		enable_p5_mce();
1992 1993
		return 1;
	}
1994 1995
	if (*str == '=')
		str++;
L
Linus Torvalds 已提交
1996
	if (!strcmp(str, "off"))
1997
		cfg->disabled = true;
1998
	else if (!strcmp(str, "no_cmci"))
1999
		cfg->cmci_disabled = true;
2000
	else if (!strcmp(str, "dont_log_ce"))
2001
		cfg->dont_log_ce = true;
2002
	else if (!strcmp(str, "ignore_ce"))
2003
		cfg->ignore_ce = true;
H
Hidetoshi Seto 已提交
2004
	else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
2005
		cfg->bootlog = (str[0] == 'b');
2006
	else if (!strcmp(str, "bios_cmci_threshold"))
2007
		cfg->bios_cmci_threshold = true;
2008
	else if (isdigit(str[0])) {
2009
		get_option(&str, &(cfg->tolerant));
2010 2011
		if (*str == ',') {
			++str;
2012
			get_option(&str, &(cfg->monarch_timeout));
2013 2014
		}
	} else {
2015
		pr_info("mce argument %s ignored. Please use /sys\n", str);
H
Hidetoshi Seto 已提交
2016 2017
		return 0;
	}
2018
	return 1;
L
Linus Torvalds 已提交
2019
}
2020
__setup("mce", mcheck_enable);
L
Linus Torvalds 已提交
2021

2022
int __init mcheck_init(void)
2023
{
2024 2025
	mcheck_intel_therm_init();

2026 2027 2028
	return 0;
}

2029
/*
2030
 * mce_syscore: PM support
2031
 */
L
Linus Torvalds 已提交
2032

2033 2034 2035 2036
/*
 * Disable machine checks on suspend and shutdown. We can't really handle
 * them later.
 */
2037
static int mce_disable_error_reporting(void)
2038 2039 2040
{
	int i;

2041
	for (i = 0; i < mca_cfg.banks; i++) {
2042
		struct mce_bank *b = &mce_banks[i];
2043

2044
		if (b->init)
2045
			wrmsrl(MSR_IA32_MCx_CTL(i), 0);
2046
	}
2047 2048 2049
	return 0;
}

2050
static int mce_syscore_suspend(void)
2051
{
2052
	return mce_disable_error_reporting();
2053 2054
}

2055
static void mce_syscore_shutdown(void)
2056
{
2057
	mce_disable_error_reporting();
2058 2059
}

I
Ingo Molnar 已提交
2060 2061 2062 2063 2064
/*
 * On resume clear all MCE state. Don't want to see leftovers from the BIOS.
 * Only one CPU is active at this time, the others get re-added later using
 * CPU hotplug:
 */
2065
static void mce_syscore_resume(void)
L
Linus Torvalds 已提交
2066
{
2067
	__mcheck_cpu_init_generic();
2068
	__mcheck_cpu_init_vendor(__this_cpu_ptr(&cpu_info));
L
Linus Torvalds 已提交
2069 2070
}

2071
static struct syscore_ops mce_syscore_ops = {
2072 2073 2074
	.suspend	= mce_syscore_suspend,
	.shutdown	= mce_syscore_shutdown,
	.resume		= mce_syscore_resume,
2075 2076
};

2077
/*
2078
 * mce_device: Sysfs support
2079 2080
 */

2081 2082
static void mce_cpu_restart(void *data)
{
2083
	if (!mce_available(__this_cpu_ptr(&cpu_info)))
2084
		return;
2085 2086
	__mcheck_cpu_init_generic();
	__mcheck_cpu_init_timer();
2087 2088
}

L
Linus Torvalds 已提交
2089
/* Reinit MCEs after user configuration changes */
2090 2091
static void mce_restart(void)
{
2092
	mce_timer_delete_all();
2093
	on_each_cpu(mce_cpu_restart, NULL, 1);
L
Linus Torvalds 已提交
2094 2095
}

2096
/* Toggle features for corrected errors */
2097
static void mce_disable_cmci(void *data)
2098
{
2099
	if (!mce_available(__this_cpu_ptr(&cpu_info)))
2100 2101 2102 2103 2104 2105
		return;
	cmci_clear();
}

static void mce_enable_ce(void *all)
{
2106
	if (!mce_available(__this_cpu_ptr(&cpu_info)))
2107 2108 2109 2110
		return;
	cmci_reenable();
	cmci_recheck();
	if (all)
2111
		__mcheck_cpu_init_timer();
2112 2113
}

2114
static struct bus_type mce_subsys = {
I
Ingo Molnar 已提交
2115
	.name		= "machinecheck",
2116
	.dev_name	= "machinecheck",
L
Linus Torvalds 已提交
2117 2118
};

2119
DEFINE_PER_CPU(struct device *, mce_device);
I
Ingo Molnar 已提交
2120 2121

void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
L
Linus Torvalds 已提交
2122

2123
static inline struct mce_bank *attr_to_bank(struct device_attribute *attr)
2124 2125 2126
{
	return container_of(attr, struct mce_bank, attr);
}
2127

2128
static ssize_t show_bank(struct device *s, struct device_attribute *attr,
2129 2130
			 char *buf)
{
2131
	return sprintf(buf, "%llx\n", attr_to_bank(attr)->ctl);
2132 2133
}

2134
static ssize_t set_bank(struct device *s, struct device_attribute *attr,
H
Hidetoshi Seto 已提交
2135
			const char *buf, size_t size)
2136
{
H
Hidetoshi Seto 已提交
2137
	u64 new;
I
Ingo Molnar 已提交
2138

2139
	if (kstrtou64(buf, 0, &new) < 0)
2140
		return -EINVAL;
I
Ingo Molnar 已提交
2141

2142
	attr_to_bank(attr)->ctl = new;
2143
	mce_restart();
I
Ingo Molnar 已提交
2144

H
Hidetoshi Seto 已提交
2145
	return size;
2146
}
2147

I
Ingo Molnar 已提交
2148
static ssize_t
2149
show_trigger(struct device *s, struct device_attribute *attr, char *buf)
2150
{
2151
	strcpy(buf, mce_helper);
2152
	strcat(buf, "\n");
2153
	return strlen(mce_helper) + 1;
2154 2155
}

2156
static ssize_t set_trigger(struct device *s, struct device_attribute *attr,
I
Ingo Molnar 已提交
2157
				const char *buf, size_t siz)
2158 2159
{
	char *p;
I
Ingo Molnar 已提交
2160

2161 2162 2163
	strncpy(mce_helper, buf, sizeof(mce_helper));
	mce_helper[sizeof(mce_helper)-1] = 0;
	p = strchr(mce_helper, '\n');
I
Ingo Molnar 已提交
2164

2165
	if (p)
I
Ingo Molnar 已提交
2166 2167
		*p = 0;

2168
	return strlen(mce_helper) + !!p;
2169 2170
}

2171 2172
static ssize_t set_ignore_ce(struct device *s,
			     struct device_attribute *attr,
2173 2174 2175 2176
			     const char *buf, size_t size)
{
	u64 new;

2177
	if (kstrtou64(buf, 0, &new) < 0)
2178 2179
		return -EINVAL;

2180
	if (mca_cfg.ignore_ce ^ !!new) {
2181 2182
		if (new) {
			/* disable ce features */
2183 2184
			mce_timer_delete_all();
			on_each_cpu(mce_disable_cmci, NULL, 1);
2185
			mca_cfg.ignore_ce = true;
2186 2187
		} else {
			/* enable ce features */
2188
			mca_cfg.ignore_ce = false;
2189 2190 2191 2192 2193 2194
			on_each_cpu(mce_enable_ce, (void *)1, 1);
		}
	}
	return size;
}

2195 2196
static ssize_t set_cmci_disabled(struct device *s,
				 struct device_attribute *attr,
2197 2198 2199 2200
				 const char *buf, size_t size)
{
	u64 new;

2201
	if (kstrtou64(buf, 0, &new) < 0)
2202 2203
		return -EINVAL;

2204
	if (mca_cfg.cmci_disabled ^ !!new) {
2205 2206
		if (new) {
			/* disable cmci */
2207
			on_each_cpu(mce_disable_cmci, NULL, 1);
2208
			mca_cfg.cmci_disabled = true;
2209 2210
		} else {
			/* enable cmci */
2211
			mca_cfg.cmci_disabled = false;
2212 2213 2214 2215 2216 2217
			on_each_cpu(mce_enable_ce, NULL, 1);
		}
	}
	return size;
}

2218 2219
static ssize_t store_int_with_restart(struct device *s,
				      struct device_attribute *attr,
2220 2221
				      const char *buf, size_t size)
{
2222
	ssize_t ret = device_store_int(s, attr, buf, size);
2223 2224 2225 2226
	mce_restart();
	return ret;
}

2227
static DEVICE_ATTR(trigger, 0644, show_trigger, set_trigger);
2228
static DEVICE_INT_ATTR(tolerant, 0644, mca_cfg.tolerant);
2229
static DEVICE_INT_ATTR(monarch_timeout, 0644, mca_cfg.monarch_timeout);
2230
static DEVICE_BOOL_ATTR(dont_log_ce, 0644, mca_cfg.dont_log_ce);
I
Ingo Molnar 已提交
2231

2232 2233
static struct dev_ext_attribute dev_attr_check_interval = {
	__ATTR(check_interval, 0644, device_show_int, store_int_with_restart),
2234 2235
	&check_interval
};
I
Ingo Molnar 已提交
2236

2237
static struct dev_ext_attribute dev_attr_ignore_ce = {
2238 2239
	__ATTR(ignore_ce, 0644, device_show_bool, set_ignore_ce),
	&mca_cfg.ignore_ce
2240 2241
};

2242
static struct dev_ext_attribute dev_attr_cmci_disabled = {
2243 2244
	__ATTR(cmci_disabled, 0644, device_show_bool, set_cmci_disabled),
	&mca_cfg.cmci_disabled
2245 2246
};

2247 2248 2249 2250 2251 2252 2253 2254
static struct device_attribute *mce_device_attrs[] = {
	&dev_attr_tolerant.attr,
	&dev_attr_check_interval.attr,
	&dev_attr_trigger,
	&dev_attr_monarch_timeout.attr,
	&dev_attr_dont_log_ce.attr,
	&dev_attr_ignore_ce.attr,
	&dev_attr_cmci_disabled.attr,
2255 2256
	NULL
};
L
Linus Torvalds 已提交
2257

2258
static cpumask_var_t mce_device_initialized;
2259

2260 2261 2262 2263 2264
static void mce_device_release(struct device *dev)
{
	kfree(dev);
}

2265
/* Per cpu device init. All of the cpus still share the same ctrl bank: */
2266
static int mce_device_create(unsigned int cpu)
L
Linus Torvalds 已提交
2267
{
2268
	struct device *dev;
L
Linus Torvalds 已提交
2269
	int err;
2270
	int i, j;
2271

A
Andreas Herrmann 已提交
2272
	if (!mce_available(&boot_cpu_data))
2273 2274
		return -EIO;

2275 2276 2277
	dev = kzalloc(sizeof *dev, GFP_KERNEL);
	if (!dev)
		return -ENOMEM;
2278 2279
	dev->id  = cpu;
	dev->bus = &mce_subsys;
2280
	dev->release = &mce_device_release;
2281

2282
	err = device_register(dev);
2283 2284
	if (err) {
		put_device(dev);
2285
		return err;
2286
	}
2287

2288 2289
	for (i = 0; mce_device_attrs[i]; i++) {
		err = device_create_file(dev, mce_device_attrs[i]);
2290 2291 2292
		if (err)
			goto error;
	}
2293
	for (j = 0; j < mca_cfg.banks; j++) {
2294
		err = device_create_file(dev, &mce_banks[j].attr);
2295 2296 2297
		if (err)
			goto error2;
	}
2298
	cpumask_set_cpu(cpu, mce_device_initialized);
2299
	per_cpu(mce_device, cpu) = dev;
2300

2301
	return 0;
2302
error2:
2303
	while (--j >= 0)
2304
		device_remove_file(dev, &mce_banks[j].attr);
2305
error:
I
Ingo Molnar 已提交
2306
	while (--i >= 0)
2307
		device_remove_file(dev, mce_device_attrs[i]);
I
Ingo Molnar 已提交
2308

2309
	device_unregister(dev);
2310

2311 2312 2313
	return err;
}

2314
static void mce_device_remove(unsigned int cpu)
2315
{
2316
	struct device *dev = per_cpu(mce_device, cpu);
2317 2318
	int i;

2319
	if (!cpumask_test_cpu(cpu, mce_device_initialized))
2320 2321
		return;

2322 2323
	for (i = 0; mce_device_attrs[i]; i++)
		device_remove_file(dev, mce_device_attrs[i]);
I
Ingo Molnar 已提交
2324

2325
	for (i = 0; i < mca_cfg.banks; i++)
2326
		device_remove_file(dev, &mce_banks[i].attr);
I
Ingo Molnar 已提交
2327

2328 2329
	device_unregister(dev);
	cpumask_clear_cpu(cpu, mce_device_initialized);
2330
	per_cpu(mce_device, cpu) = NULL;
2331 2332
}

2333
/* Make sure there are no machine checks on offlined CPUs. */
2334
static void mce_disable_cpu(void *h)
2335
{
A
Andi Kleen 已提交
2336
	unsigned long action = *(unsigned long *)h;
I
Ingo Molnar 已提交
2337
	int i;
2338

2339
	if (!mce_available(__this_cpu_ptr(&cpu_info)))
2340
		return;
2341

A
Andi Kleen 已提交
2342 2343
	if (!(action & CPU_TASKS_FROZEN))
		cmci_clear();
2344
	for (i = 0; i < mca_cfg.banks; i++) {
2345
		struct mce_bank *b = &mce_banks[i];
2346

2347
		if (b->init)
2348
			wrmsrl(MSR_IA32_MCx_CTL(i), 0);
2349
	}
2350 2351
}

2352
static void mce_reenable_cpu(void *h)
2353
{
A
Andi Kleen 已提交
2354
	unsigned long action = *(unsigned long *)h;
I
Ingo Molnar 已提交
2355
	int i;
2356

2357
	if (!mce_available(__this_cpu_ptr(&cpu_info)))
2358
		return;
I
Ingo Molnar 已提交
2359

A
Andi Kleen 已提交
2360 2361
	if (!(action & CPU_TASKS_FROZEN))
		cmci_reenable();
2362
	for (i = 0; i < mca_cfg.banks; i++) {
2363
		struct mce_bank *b = &mce_banks[i];
2364

2365
		if (b->init)
2366
			wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
2367
	}
2368 2369
}

2370
/* Get notified when a cpu comes on/off. Be hotplug friendly. */
2371
static int
I
Ingo Molnar 已提交
2372
mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
2373 2374
{
	unsigned int cpu = (unsigned long)hcpu;
2375
	struct timer_list *t = &per_cpu(mce_timer, cpu);
2376

2377
	switch (action & ~CPU_TASKS_FROZEN) {
2378
	case CPU_ONLINE:
2379
		mce_device_create(cpu);
2380 2381
		if (threshold_cpu_callback)
			threshold_cpu_callback(action, cpu);
2382 2383
		break;
	case CPU_DEAD:
2384 2385
		if (threshold_cpu_callback)
			threshold_cpu_callback(action, cpu);
2386
		mce_device_remove(cpu);
C
Chen Gong 已提交
2387
		mce_intel_hcpu_update(cpu);
B
Borislav Petkov 已提交
2388 2389 2390 2391

		/* intentionally ignoring frozen here */
		if (!(action & CPU_TASKS_FROZEN))
			cmci_rediscover();
2392
		break;
2393
	case CPU_DOWN_PREPARE:
A
Andi Kleen 已提交
2394
		smp_call_function_single(cpu, mce_disable_cpu, &action, 1);
C
Chen Gong 已提交
2395
		del_timer_sync(t);
2396 2397
		break;
	case CPU_DOWN_FAILED:
A
Andi Kleen 已提交
2398
		smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
T
Thomas Gleixner 已提交
2399
		mce_start_timer(cpu, t);
A
Andi Kleen 已提交
2400
		break;
2401 2402
	}

2403
	return NOTIFY_OK;
2404 2405
}

2406
static struct notifier_block mce_cpu_notifier = {
2407 2408 2409
	.notifier_call = mce_cpu_callback,
};

2410
static __init void mce_init_banks(void)
2411 2412 2413
{
	int i;

2414
	for (i = 0; i < mca_cfg.banks; i++) {
2415
		struct mce_bank *b = &mce_banks[i];
2416
		struct device_attribute *a = &b->attr;
I
Ingo Molnar 已提交
2417

2418
		sysfs_attr_init(&a->attr);
2419 2420
		a->attr.name	= b->attrname;
		snprintf(b->attrname, ATTR_LEN, "bank%d", i);
I
Ingo Molnar 已提交
2421 2422 2423 2424

		a->attr.mode	= 0644;
		a->show		= show_bank;
		a->store	= set_bank;
2425 2426 2427
	}
}

2428
static __init int mcheck_init_device(void)
2429 2430 2431 2432
{
	int err;
	int i = 0;

2433 2434 2435 2436
	if (!mce_available(&boot_cpu_data)) {
		err = -EIO;
		goto err_out;
	}
2437

2438 2439 2440 2441
	if (!zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL)) {
		err = -ENOMEM;
		goto err_out;
	}
2442

2443
	mce_init_banks();
2444

2445
	err = subsys_system_register(&mce_subsys, NULL);
2446
	if (err)
2447
		goto err_out_mem;
2448

2449
	cpu_notifier_register_begin();
2450
	for_each_online_cpu(i) {
2451
		err = mce_device_create(i);
2452
		if (err) {
2453 2454 2455 2456 2457 2458
			/*
			 * Register notifier anyway (and do not unreg it) so
			 * that we don't leave undeleted timers, see notifier
			 * callback above.
			 */
			__register_hotcpu_notifier(&mce_cpu_notifier);
2459
			cpu_notifier_register_done();
2460
			goto err_device_create;
2461
		}
2462 2463
	}

2464 2465
	__register_hotcpu_notifier(&mce_cpu_notifier);
	cpu_notifier_register_done();
2466

2467 2468
	register_syscore_ops(&mce_syscore_ops);

2469
	/* register character device /dev/mcelog */
2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493
	err = misc_register(&mce_chrdev_device);
	if (err)
		goto err_register;

	return 0;

err_register:
	unregister_syscore_ops(&mce_syscore_ops);

err_device_create:
	/*
	 * We didn't keep track of which devices were created above, but
	 * even if we had, the set of online cpus might have changed.
	 * Play safe and remove for every possible cpu, since
	 * mce_device_remove() will do the right thing.
	 */
	for_each_possible_cpu(i)
		mce_device_remove(i);

err_out_mem:
	free_cpumask_var(mce_device_initialized);

err_out:
	pr_err("Unable to init device /dev/mcelog (rc: %d)\n", err);
I
Ingo Molnar 已提交
2494

L
Linus Torvalds 已提交
2495 2496
	return err;
}
2497
device_initcall_sync(mcheck_init_device);
I
Ingo Molnar 已提交
2498

2499 2500 2501 2502 2503
/*
 * Old style boot options parsing. Only for compatibility.
 */
static int __init mcheck_disable(char *str)
{
2504
	mca_cfg.disabled = true;
2505 2506 2507
	return 1;
}
__setup("nomce", mcheck_disable);
I
Ingo Molnar 已提交
2508

2509 2510
#ifdef CONFIG_DEBUG_FS
struct dentry *mce_get_debugfs_dir(void)
I
Ingo Molnar 已提交
2511
{
2512
	static struct dentry *dmce;
I
Ingo Molnar 已提交
2513

2514 2515
	if (!dmce)
		dmce = debugfs_create_dir("mce", NULL);
I
Ingo Molnar 已提交
2516

2517 2518
	return dmce;
}
I
Ingo Molnar 已提交
2519

2520 2521 2522 2523 2524 2525 2526 2527
static void mce_reset(void)
{
	cpu_missing = 0;
	atomic_set(&mce_fake_paniced, 0);
	atomic_set(&mce_executing, 0);
	atomic_set(&mce_callin, 0);
	atomic_set(&global_nwo, 0);
}
I
Ingo Molnar 已提交
2528

2529 2530 2531 2532
static int fake_panic_get(void *data, u64 *val)
{
	*val = fake_panic;
	return 0;
I
Ingo Molnar 已提交
2533 2534
}

2535
static int fake_panic_set(void *data, u64 val)
I
Ingo Molnar 已提交
2536
{
2537 2538 2539
	mce_reset();
	fake_panic = val;
	return 0;
I
Ingo Molnar 已提交
2540 2541
}

2542 2543
DEFINE_SIMPLE_ATTRIBUTE(fake_panic_fops, fake_panic_get,
			fake_panic_set, "%llu\n");
2544

2545
static int __init mcheck_debugfs_init(void)
2546
{
2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557
	struct dentry *dmce, *ffake_panic;

	dmce = mce_get_debugfs_dir();
	if (!dmce)
		return -ENOMEM;
	ffake_panic = debugfs_create_file("fake_panic", 0444, dmce, NULL,
					  &fake_panic_fops);
	if (!ffake_panic)
		return -ENOMEM;

	return 0;
2558
}
2559
late_initcall(mcheck_debugfs_init);
2560
#endif