1. 15 10月, 2011 1 次提交
  2. 25 11月, 2009 7 次提交
  3. 21 3月, 2009 1 次提交
    • Y
      x86/PCI: host mmconfig detect clean up · 068258bc
      Yinghai Lu 提交于
      Fix mmconfig detection to not assume a single mmconfig space in the
      northbridge, paving the way for AMD fam10h + mcp55 CPUs.  On those, the
      MSR has some range, but the mcp55 pci config will have another one.
      
      Also helps the mcp55 + io55 case, where every one will have one range.
      
      If it is mcp55, exclude the range that is used by CPU MSR, in other
      words , if the CPU claims busses 0-255, the range in mcp55 is dropped,
      because CPU HW will not route those ranges to mcp55 mmconfig to handle
      it.
      Signed-off-by: NYinghai Lu <yinghai.lu@kernel.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      068258bc
  4. 30 12月, 2008 1 次提交
  5. 27 4月, 2008 1 次提交
  6. 11 2月, 2008 2 次提交
  7. 11 10月, 2007 2 次提交
  8. 12 8月, 2007 1 次提交
  9. 13 2月, 2007 7 次提交
  10. 03 2月, 2007 1 次提交
  11. 14 11月, 2006 1 次提交
  12. 28 10月, 2006 1 次提交
  13. 26 9月, 2006 5 次提交
  14. 19 9月, 2006 1 次提交
    • L
      Revert mmiocfg heuristics and blacklist changes · 79e453d4
      Linus Torvalds 提交于
      This reverts commits 11012d41 and
      40dd2d20, which allowed us to use the
      MMIO accesses for PCI config cycles even without the area being marked
      reserved in the e820 memory tables.
      
      Those changes were needed for EFI-environment Intel macs, but broke some
      newer Intel 965 boards, so for now it's better to revert to our old
      2.6.17 behaviour and at least avoid introducing any new breakage.
      
      Andi Kleen has a set of patches that work with both EFI and the broken
      Intel 965 boards, which will be applied once they get wider testing.
      
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Edgar Hucek <hostmaster@ed-soft.at>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      79e453d4
  15. 31 8月, 2006 2 次提交
    • A
      [PATCH] x86: Disable MMCONFIG on Intel SDV using DMI blacklist · 40dd2d20
      Andi Kleen 提交于
      As a replacement for the earlier removal of the e820 MCFG check
      we blacklist the Intel SDV with the original BIOS bug that
      motivated that check. On those machines don't use MMCONFIG.
      
      This also adds a new pci=mmconf parameter to override the blacklist.
      
      Cc: Greg KH <gregkh@suse.de>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      40dd2d20
    • A
      [PATCH] x86: Revert e820 MCFG heuristics · 11012d41
      Andi Kleen 提交于
      The check for the MCFG table being reserved in the e820 map was originally
      added to detect a broken BIOS in a preproduction Intel SDV. However it also
      breaks the Apple x86 Macs, which can't supply this properly, but need
      a working MCFG. With this patch they wouldn't use the MCFG and not work.
      
      After some discussion I think it's best to remove the heuristic again.
      It also failed on some other boxes (although it didn't cause much
      problems there because old style port access for PCI config space
      still works as fallback), but the preproduction SDVs can just use
      pci=nommcfg. Supporting production machines properly is more
      important.
      
      Edgar Hucek did all the debugging work.
      
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Edgar Hucek <hostmaster@ed-soft.at>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      11012d41
  16. 22 6月, 2006 1 次提交
    • C
      [PATCH] PCI: fix issues with extended conf space when MMCONFIG disabled because of e820 · ead2bfeb
      Chuck Ebbert 提交于
      On 15 Jun 2006 03:45:10 +0200, Andi Kleen wrote:
      
      > Anyways I would say that if the BIOS can't get MCFG right then
      > it's likely not been validated on that board and shouldn't be used.
      
      According to Petr Vandrovec:
      
       ... "What is important (and checked) is address of MMCONFIG reported by MCFG
       table...  Unfortunately code does not bother with printing that address :-(
      
       "Another problem is that code has hardcoded that MMCONFIG area is 256MB large.
       Unfortunately for the code PCI specification allows any power of two between 2MB
       and 256MB if vendor knows that such amount of busses (from 2 to 128) will be
       sufficient for system.  With notebook it is quite possible that not full 8 bits
       are implemented for MMCONFIG bus number."
      
      So here is a patch.  Unfortunately my system still fails the test because
      it doesn't reserve any part of the MMCONFIG area, but this may fix others.
      
      Booted on x86_64, only compiled on i386.  x86_64 still remaps the max area
      (256MB) even though only 2MB is checked... but 2.6.16 had no check at all
      so it is still better.
      
      PCI: reduce size of x86 MMCONFIG reserved area check
      
      1.  Print the address of the MMCONFIG area when the test for that area
          being reserved fails.
      
      2.  Only check if the first 2MB is reserved, as that is the minimum.
      Signed-off-by: NChuck Ebbert <76306.1226@compuserve.com>
      Acked-by: NArjan van de Ven <arjan@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ead2bfeb
  17. 11 4月, 2006 2 次提交
  18. 10 4月, 2006 3 次提交