- 20 10月, 2011 1 次提交
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由 Konrad Rzeszutek Wilk 提交于
There are three different modes: PV, HVM, and initial domain 0. In all the cases we would return -1 for failure instead of a proper error code. Fix this by propagating the error code from the generic IRQ code. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 15 10月, 2011 1 次提交
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由 Jan Beulich 提交于
As with any other such change, the goal is to prevent inadvertent writes to these structures (assuming DEBUG_RODATA is enabled), and to separate data (possibly frequently) written to from such never getting modified. Reviewed-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NJan Beulich <jbeulich@novell.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 07 10月, 2011 1 次提交
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由 Paul Menzel 提交于
In summary, this DMI quirk uses the _CRS info by default for the ASUS M2V-MX SE by turning on `pci=use_crs` and is similar to the quirk added by commit 2491762c ("x86/PCI: use host bridge _CRS info on ASRock ALiveSATA2-GLAN") whose commit message should be read for further information. Since commit 3e3da00c ("x86/pci: AMD one chain system to use pci read out res") Linux gives the following oops: parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE] HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17 HDA Intel 0000:20:01.0: setting latency timer to 64 BUG: unable to handle kernel paging request at ffffc90011c08000 IP: [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173 Oops: 0009 [#1] SMP last sysfs file: /sys/module/snd_pcm/initstate CPU 0 Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan] Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name RIP: 0010:[<ffffffffa0578402>] [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] RSP: 0018:ffff88013153fe50 EFLAGS: 00010286 RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006 RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246 RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040 R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400 R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090 FS: 0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0) Stack: 0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400 ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8 ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232 Call Trace: [<ffffffff8123ad65>] ? __pm_runtime_set_status+0x162/0x186 [<ffffffff811ad232>] ? local_pci_probe+0x49/0x92 [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b [<ffffffff8105afd0>] ? do_work_for_cpu+0xb/0x1b [<ffffffff8105fd3f>] ? kthread+0x7a/0x82 [<ffffffff8100a824>] ? kernel_thread_helper+0x4/0x10 [<ffffffff8105fcc5>] ? kthread+0x0/0x82 [<ffffffff8100a820>] ? kernel_thread_helper+0x0/0x10 Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 <66> 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be RIP [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] RSP <ffff88013153fe50> CR2: ffffc90011c08000 ---[ end trace 8d1f3ebc136437fd ]--- Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem. $ dmesg | grep -i crs # with the quirk PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug The match has to be against the DMI board entries though since the vendor entries are not populated. DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304 10/30/2007 This quirk should be removed when `pci=use_crs` is enabled for machines from 2006 or earlier or some other solution is implemented. Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used. 15:13 < ruik> but coreboot does not need that 15:13 < ruik> because i have there only one root bus 15:13 < ruik> the audio is behind a bridge $ sudo dmidecode BIOS Information Vendor: American Megatrends Inc. Version: 0304 Release Date: 10/30/2007 [1] http://www.coreboot.org/ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552 Cc: stable@kernel.org (2.6.34) Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: x86@kernel.org Signed-off-by: NPaul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 9月, 2011 1 次提交
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由 Jan Beulich 提交于
Now that the hypercall interface changes are in -unstable, make the kernel side code not ignore the segment (aka domain) number anymore (which results in pretty odd behavior on such systems). Rather, if only the old interfaces are available, don't call them for devices on non-zero segments at all. Signed-off-by: NJan Beulich <jbeulich@suse.com> [v1: Edited git description] Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 10 9月, 2011 1 次提交
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由 Shyam Iyer 提交于
Commit b03e7495 ("PCI: Set PCI-E Max Payload Size on fabric") introduced a potential NULL pointer dereference in calls to pcie_bus_configure_settings due to attempts to access pci_bus self variables when the self pointer is NULL. To correct this, verify that the self pointer in pci_bus is non-NULL before dereferencing it. Reported-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NShyam Iyer <shyam_iyer@dell.com> Signed-off-by: NJon Mason <mason@myri.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 02 8月, 2011 1 次提交
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由 Jon Mason 提交于
On a given PCI-E fabric, each device, bridge, and root port can have a different PCI-E maximum payload size. There is a sizable performance boost for having the largest possible maximum payload size on each PCI-E device. However, if improperly configured, fatal bus errors can occur. Thus, it is important to ensure that PCI-E payloads sends by a device are never larger than the MPS setting of all devices on the way to the destination. This can be achieved two ways: - A conservative approach is to use the smallest common denominator of the entire tree below a root complex for every device on that fabric. This means for example that having a 128 bytes MPS USB controller on one leg of a switch will dramatically reduce performances of a video card or 10GE adapter on another leg of that same switch. It also means that any hierarchy supporting hotplug slots (including expresscard or thunderbolt I suppose, dbl check that) will have to be entirely clamped to 128 bytes since we cannot predict what will be plugged into those slots, and we cannot change the MPS on a "live" system. - A more optimal way is possible, if it falls within a couple of constraints: * The top-level host bridge will never generate packets larger than the smallest TLP (or if it can be controlled independently from its MPS at least) * The device will never generate packets larger than MPS (which can be configured via MRRS) * No support of direct PCI-E <-> PCI-E transfers between devices without some additional code to specifically deal with that case Then we can use an approach that basically ignores downstream requests and focuses exclusively on upstream requests. In that case, all we need to care about is that a device MPS is no larger than its parent MPS, which allows us to keep all switches/bridges to the max MPS supported by their parent and eventually the PHB. In this case, your USB controller would no longer "starve" your 10GE Ethernet and your hotplug slots won't affect your global MPS. Additionally, the hotplugged devices themselves can be configured to a larger MPS up to the value configured in the hotplug bridge. To choose between the two available options, two PCI kernel boot args have been added to the PCI calls. "pcie_bus_safe" will provide the former behavior, while "pcie_bus_perf" will perform the latter behavior. By default, the latter behavior is used. NOTE: due to the location of the enablement, each arch will need to add calls to this function. This patch only enables x86. This patch includes a number of changes recommended by Benjamin Herrenschmidt. Tested-by: Jordan_Hargrave@dell.com Signed-off-by: NJon Mason <mason@myri.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 22 7月, 2011 4 次提交
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由 Narendra_K@Dell.com 提交于
Commit 6e8af08d enables pci=bfsort on future Dell systems. But the identification string 'Dell System' matches on already existing whitelist, which do not have SMBIOS type 0xB1, causing pci=bfsort not being set on existing whitelist. This patch fixes the regression by moving the type 0xB1 check beyond the existing whitelist so that existing whitelist is walked before. Signed-off-by: NShyam Iyer <shyam_iyer@dell.com> Signed-off-by: NNarendra K <narendra_k@dell.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Ralf Baechle 提交于
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: N"David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: NPaul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jan Beulich 提交于
Without this change, the majority of the raw PCI config space access functions silently ignore a non-zero segment argument, which is certainly wrong. Apart from pci_direct_conf1, all other non-MMCFG access methods get used only for non-extended accesses (i.e. assigned to raw_pci_ops only). Consequently, with the way raw_pci_{read,write}() work, it would be a coding error to call these functions with a non-zero segment (with the current call flow this cannot happen afaict). The access method 1 accessor, as it can be used for extended accesses (on AMD systems) instead gets checks added for the passed in segment to be zero. This would be the case when on such a system having multiple PCI segments (don't know whether any exist in practice) MMCFG for some reason is not usable, and method 1 gets selected for doing extended accesses. Rather than accessing the wrong device's config space, the function will now error out. v2: Convert BUG_ON() to WARN_ON(), and extend description as per Ingo's request. Signed-off-by: NJan Beulich <jbeulich@novell.com> Reviewed-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
Host bridge windows are top-level resources, so if we find a host bridge window conflict, it's probably with a hard-coded legacy reservation. Moving host bridge windows is theoretically possible, but we don't support it; we just ignore windows with conflicts, and it's not worth making this a user-visible error. Reported-and-tested-by: NJools Wills <jools@oxfordinspire.co.uk> References: https://bugzilla.kernel.org/show_bug.cgi?id=38522Reported-by: NDas <dasfox@gmail.com> References: https://bugzilla.kernel.org/show_bug.cgi?id=16497Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 12 7月, 2011 10 次提交
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由 Konrad Rzeszutek Wilk 提交于
In the past we would only use the function's value if the returned value was not equal to 'acpi_sci_override_gsi'. Meaning that the INT_SRV_OVR values for global and source irq were different. But it is OK to use the function's value even when the global and source irq are the same. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
In the past (2.6.38) the 'xen_allocate_pirq_gsi' would allocate an entry in a Linux IRQ -> {XEN_IRQ, type, event, ..} array. All of that has been removed in 2.6.39 and the Xen IRQ subsystem uses an linked list that is populated when the call to 'xen_allocate_irq_gsi' (universally done from any of the xen_bind_* calls) is done. The 'xen_allocate_pirq_gsi' is a NOP and there is no need for it anymore so lets remove it. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
As the code paths that are guarded by CONFIG_XEN_DOM0 already depend on CONFIG_ACPI so the extra #ifdef is not required. The earlier patch that added them in had done its job. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
.. which means we can preset of NR_IRQS_LEGACY interrupts using the 'acpi_get_override_irq' API before this loop. This means that we can get the IRQ's polarity (and trigger) from either the ACPI (or MP); or use the default values. This fixes a bug if we did not have an IOAPIC we would not been able to preset the IRQ's polarity if the MP table existed. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
Since they are only called once and the rest of the pci_xen_* functions follow the same pattern of setup. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
.. to cut down on the code duplicity. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
Not before .. also that code segment starts looking like the HVM one. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
In the past we would guard those code segments to be dependent on CONFIG_XEN_DOM0 (which depends on CONFIG_ACPI) so this patch is not stricly necessary. But the next patch will merge common HVM and initial domain code and we want to make sure the CONFIG_ACPI dependency is preserved - as HVM code does not depend on CONFIG_XEN_DOM0. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
Update the out-dated comment at the beginning of the file. Also provide the copyrights of folks who have been contributing to this code lately. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Konrad Rzeszutek Wilk 提交于
The file is hard to read. Move the code around so that the contents of it follows a uniform format: - setup GSIs - PV, HVM, and initial domain case - then MSI/MSI-x setup - PV, HVM and then initial domain case. - then MSI/MSI-x teardown - same order. - lastly, the __init functions in PV, HVM, and initial domain order. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 08 7月, 2011 1 次提交
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由 Konrad Rzeszutek Wilk 提交于
Previously we would check for acpi_sci_override_gsi == gsi every time a PCI device was enabled. That works during early bootup, but later on it could lead to triggering unnecessarily the acpi_gsi_to_irq(..) lookup. The reason is that acpi_sci_override_gsi was declared in __initdata and after early bootup could contain bogus values. This patch moves the check for acpi_sci_override_gsi to the site where the ACPI SCI is preset. CC: stable@kernel.org Reported-by: NRaghavendra D Prabhu <rprabhu@wnohang.net> Tested-by: NRaghavendra D Prabhu <rprabhu@wnohang.net> [http://lists.xensource.com/archives/html/xen-devel/2011-07/msg00154.html] Suggested-by: NIan Campbell <ijc@hellion.org.uk> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 30 6月, 2011 1 次提交
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由 Konrad Rzeszutek Wilk 提交于
In the past we would use the GSI value to preset the ACPI SCI IRQ which worked great as GSI == IRQ: ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) While that is most often seen, there are some oddities: ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level) which means that GSI 20 (or pin 20) is to be overriden for IRQ 9. Our code that presets the interrupt for ACPI SCI however would use the GSI 20 instead of IRQ 9 ending up with: xen: sci override: global_irq=20 trigger=0 polarity=1 xen: registering gsi 20 triggering 0 polarity 1 xen: --> pirq=20 -> irq=20 xen: acpi sci 20 .. snip.. calling acpi_init+0x0/0xbc @ 1 ACPI: SCI (IRQ9) allocation failed ACPI Exception: AE_NOT_ACQUIRED, Unable to install System Control Interrupt handler (20110413/evevent-119) ACPI: Unable to start the ACPI Interpreter as the ACPI interpreter made a call to 'acpi_gsi_to_irq' which got nine. It used that value to request an IRQ (request_irq) and since that was not present it failed. The fix is to recognize that for interrupts that are overriden (in our case we only care about the ACPI SCI) we should use the IRQ number to present the IRQ instead of the using GSI. End result is that we get: xen: sci override: global_irq=20 trigger=0 polarity=1 xen: registering gsi 20 triggering 0 polarity 1 xen: --> pirq=20 -> irq=9 (gsi=9) xen: acpi sci 9 which fixes the ACPI interpreter failing on startup. CC: stable@kernel.org Reported-by: NLiwei <xieliwei@gmail.com> Tested-by: NLiwei <xieliwei@gmail.com> [http://lists.xensource.com/archives/html/xen-devel/2011-06/msg01727.html] Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 03 6月, 2011 1 次提交
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由 Jack Steiner 提交于
Enable 64-bit ACPI MFCG support for SGI UV2 platform. The check is similar to the check on UV1. UV2 has a different oem_id string. Signed-off-by: NJack Steiner <steiner@sgi.com> Link: http://lkml.kernel.org/r/20110602195943.GA27079@sgi.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
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- 02 6月, 2011 1 次提交
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由 Márton Németh 提交于
The flags field of struct resource from linux/ioport.h is "unsigned long". Change the "type" parameter of coalesce_windows() function to match that field. This fixes the following warning messages when compiling with "make C=1 W=1 bzImage modules": arch/x86/pci/acpi.c: In function ‘coalesce_windows’: arch/x86/pci/acpi.c:198: warning: conversion to ‘long unsigned int’ from ‘int’ may change the sign of the result arch/x86/pci/acpi.c:203: warning: conversion to ‘long unsigned int’ from ‘int’ may change the sign of the result Signed-off-by: NMárton Németh <nm127@freemail.hu> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 22 5月, 2011 1 次提交
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由 Jan Beulich 提交于
On various newer Intel systems the PCI bus(ses) the non-core devices live on aren't getting announced by ACPI except through the bus range covered by mmconfig. At least the i7core-edac driver depends on these devices getting detected. Mauro, could you check whether with this change the Xeon 55xx hack in that driver can go away altogether, and with it the bogus exporting of pcibios_scan_specific_bus()? Signed-off-by: NJan Beulich <jbeulich@novell.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Aristeu Sergio <arozansk@redhat.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 17 5月, 2011 1 次提交
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由 Konrad Rzeszutek Wilk 提交于
If we have CONFIG_XEN and the other parameters to build an Linux kernel that is non-privileged, the xen_[find|register|unregister]_ device_domain_owner functions should not be compiled. They should use the nops defined in arch/x86/include/asm/xen/pci.h instead. This fixes: arch/x86/pci/xen.c:496: error: redefinition of ‘xen_find_device_domain_owner’ arch/x86/include/asm/xen/pci.h:25: note: previous definition of ‘xen_find_device_domain_owner’ was here arch/x86/pci/xen.c:510: error: redefinition of ‘xen_register_device_domain_owner’ arch/x86/include/asm/xen/pci.h:29: note: previous definition of ‘xen_register_device_domain_owner’ was here arch/x86/pci/xen.c:532: error: redefinition of ‘xen_unregister_device_domain_owner’ arch/x86/include/asm/xen/pci.h:34: note: previous definition of ‘xen_unregister_device_domain_owner’ was here Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reported-by: NRandy Dunlap <randy.dunlap@oracle.com>
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- 11 5月, 2011 2 次提交
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由 Seth Heasley 提交于
This patch adds the LPC Controller DeviceIDs for the Intel Panther Point PCH. Acked-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NSeth Heasley <seth.heasley@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Julia Lawall 提交于
Request_region should be used with release_region, not release_resource. The local variables region and region2 are dropped and the calls to release_resource are replaced with calls to release_region, using the first two arguments of the corresponding calls to request_region. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,E; @@ ( *x = request_region(...) | *x = request_mem_region(...) ) ... when != release_region(x) when != x = E * release_resource(x); // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 14 4月, 2011 2 次提交
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由 Konrad Rzeszutek Wilk 提交于
We check if there is a domain owner for the PCI device. In case of failure (meaning no domain has registered for this device) we make DOMID_SELF the owner. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> [v2: deal with rebasing on v2.6.37-1] [v3: deal with rebasing on stable/irq.cleanup] [v4: deal with rebasing on stable/irq.ween_of_nr_irqs] [v5: deal with rebasing on v2.6.39-rc3] Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Acked-by: NXiantao Zhang <xiantao.zhang@intel.com>
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由 Konrad Rzeszutek Wilk 提交于
When the Xen PCI backend is told to enable or disable MSI/MSI-X functions, the initial domain performs these operations. The initial domain needs to know which domain (guest) is going to use the PCI device so when it makes the appropiate hypercall to retrieve the MSI/MSI-X vector it will also assign the PCI device to the appropiate domain (guest). This boils down to us needing a mechanism to find, set and unset the domain id that will be using the device. [v2: EXPORT_SYMBOL -> EXPORT_SYMBOL_GPL.] Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 18 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
They were generated by 'codespell' and then manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi> Cc: trivial@kernel.org LKML-Reference: <1300389856-1099-3-git-send-email-lucas.demarchi@profusion.mobi> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 14 3月, 2011 1 次提交
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Setting the pci ops on subsys initcall unconditionally will break multi platform kernels on anything except ce4100. Use x86_init.pci.init ops to call this only on real ce4100 platforms. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: sodaville@linutronix.de LKML-Reference: <20110314093340.GA21026@www.tglx.de> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 12 3月, 2011 1 次提交
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由 Thomas Gleixner 提交于
genirq is switching to a consistent name space for the irq related functions. Convert x86. Conversion was done with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 11 3月, 2011 7 次提交
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由 Ian Campbell 提交于
Following the example set by xen_allocate_pirq_msi and xen_bind_pirq_msi_to_irq: xen_allocate_pirq becomes xen_allocate_pirq_gsi and now only allocates a pirq number and does not bind it. xen_map_pirq_gsi becomes xen_bind_pirq_gsi_to_irq and binds an existing pirq. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
The function name does not distinguish it from xen_allocate_pirq_msi (which operates on domU and pvhvm domains rather than dom0). Hoist domain 0 specific functionality up into the only caller leaving functionality common to all guest types in xen_bind_pirq_msi_to_irq. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
Makes the tail end of this function look even more like xen_bind_pirq_msi_to_irq. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
Split the binding aspect of xen_allocate_pirq_msi out into a new xen_bind_pirq_to_irq function. In xen_hvm_setup_msi_irq when allocating a pirq write the MSI message to signal the PIRQ as soon as the pirq is obtained. There is no way to free the pirq back so if the subsequent binding to an IRQ fails we want to ensure that we will reuse the PIRQ next time rather than leak it. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
apic_register_gsi_xen_hvm is a tiny wrapper around xen_hvm_register_pirq. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Ian Campbell 提交于
consistent with other similar functions. Signed-off-by: NIan Campbell <ian.campbell@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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