x86/PCI: MMCONFIG: add PCI_MMCFG_BUS_OFFSET() to factor common expression

This factors out the common "bus << 20" expression used when computing the
MMCONFIG address.
Reviewed-by: NYinghai Lu <yinghai@kernel.org>
Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

arch/x86/include/asm/pci_x86.h

@@ -124,6 +124,8 @@ extern void __init pci_mmcfg_arch_free(void);
 extern struct acpi_mcfg_allocation *pci_mmcfg_config;
 extern int pci_mmcfg_config_num;
 
+#define PCI_MMCFG_BUS_OFFSET(bus)      ((bus) << 20)
+
 /*
  * AMD Fam10h CPUs are buggy, and cannot access MMIO config space
  * on their northbrige except through the * %eax register. As such, you MUST

arch/x86/pci/mmconfig-shared.c

@@ -355,8 +355,9 @@ static void __init pci_mmcfg_insert_resources(void)
 		snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN,
 			 "PCI MMCONFIG %u [%02x-%02x]", cfg->pci_segment,
 			 cfg->start_bus_number, cfg->end_bus_number);
-		res->start = cfg->address + (cfg->start_bus_number << 20);
-		res->end = res->start + (num_buses << 20) - 1;
+		res->start = cfg->address +
+			PCI_MMCFG_BUS_OFFSET(cfg->start_bus_number);
+		res->end = res->start + PCI_MMCFG_BUS_OFFSET(num_buses) - 1;
 		res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
 		insert_resource(&iomem_resource, res);
 		names += PCI_MMCFG_RESOURCE_NAME_LEN;
@@ -478,15 +479,14 @@ static void __init pci_mmcfg_reject_broken(int early)
 		return;
 
 	for (i = 0; i < pci_mmcfg_config_num; i++) {
-		int valid = 0;
+		int num_buses, valid = 0;
 		u64 addr, size;
 
 		cfg = &pci_mmcfg_config[i];
-		addr = cfg->start_bus_number;
-		addr <<= 20;
-		addr += cfg->address;
-		size = cfg->end_bus_number + 1 - cfg->start_bus_number;
-		size <<= 20;
+		addr = cfg->address +
+			PCI_MMCFG_BUS_OFFSET(cfg->start_bus_number);
+		num_buses = cfg->end_bus_number - cfg->start_bus_number + 1;
+		size = PCI_MMCFG_BUS_OFFSET(num_buses);
 		printk(KERN_NOTICE "PCI: MCFG configuration %d: base %lx "
 		       "segment %hu buses %u - %u\n",
 		       i, (unsigned long)cfg->address, cfg->pci_segment,

arch/x86/pci/mmconfig_32.c

@@ -47,7 +47,7 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
  */
 static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
 {
-	u32 dev_base = base | (bus << 20) | (devfn << 12);
+	u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12);
 	int cpu = smp_processor_id();
 	if (dev_base != mmcfg_last_accessed_device ||
 	    cpu != mmcfg_last_accessed_cpu) {

arch/x86/pci/mmconfig_64.c

@@ -43,7 +43,7 @@ static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned i
 	addr = get_virt(seg, bus);
 	if (!addr)
 		return NULL;
- 	return addr + ((bus << 20) | (devfn << 12));
+	return addr + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
 }
 
 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
@@ -113,17 +113,16 @@ static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg)
 {
 	void __iomem *addr;
 	u64 start, size;
+	int num_buses;
 
-	start = cfg->start_bus_number;
-	start <<= 20;
-	start += cfg->address;
-	size = cfg->end_bus_number + 1 - cfg->start_bus_number;
-	size <<= 20;
+	start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus_number);
+	num_buses = cfg->end_bus_number - cfg->start_bus_number + 1;
+	size = PCI_MMCFG_BUS_OFFSET(num_buses);
 	addr = ioremap_nocache(start, size);
 	if (addr) {
 		printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n",
 		       start, start + size - 1);
-		addr -= cfg->start_bus_number << 20;
+		addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus_number);
 	}
 	return addr;
 }
@@ -162,7 +161,7 @@ void __init pci_mmcfg_arch_free(void)
 
 	for (i = 0; i < pci_mmcfg_config_num; ++i) {
 		if (pci_mmcfg_virt[i].virt) {
-			iounmap(pci_mmcfg_virt[i].virt + (pci_mmcfg_virt[i].cfg->start_bus_number << 20));
+			iounmap(pci_mmcfg_virt[i].virt + PCI_MMCFG_BUS_OFFSET(pci_mmcfg_virt[i].cfg->start_bus_number));
 			pci_mmcfg_virt[i].virt = NULL;
 			pci_mmcfg_virt[i].cfg = NULL;
 		}