iwl-tx.c 46.3 KB
Newer Older
1 2
/******************************************************************************
 *
3
 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
 *
 * Portions of this file are derived from the ipw3945 project, as well
 * as portions of the ieee80211 subsystem header files.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
25
 *  Intel Linux Wireless <ilw@linux.intel.com>
26 27 28 29
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 *****************************************************************************/

30
#include <linux/etherdevice.h>
31
#include <linux/sched.h>
32 33 34 35 36 37 38 39
#include <net/mac80211.h>
#include "iwl-eeprom.h"
#include "iwl-dev.h"
#include "iwl-core.h"
#include "iwl-sta.h"
#include "iwl-io.h"
#include "iwl-helpers.h"

40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
static const u16 default_tid_to_tx_fifo[] = {
	IWL_TX_FIFO_AC1,
	IWL_TX_FIFO_AC0,
	IWL_TX_FIFO_AC0,
	IWL_TX_FIFO_AC1,
	IWL_TX_FIFO_AC2,
	IWL_TX_FIFO_AC2,
	IWL_TX_FIFO_AC3,
	IWL_TX_FIFO_AC3,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_NONE,
	IWL_TX_FIFO_AC3
};

60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv,
				    struct iwl_dma_ptr *ptr, size_t size)
{
	ptr->addr = pci_alloc_consistent(priv->pci_dev, size, &ptr->dma);
	if (!ptr->addr)
		return -ENOMEM;
	ptr->size = size;
	return 0;
}

static inline void iwl_free_dma_ptr(struct iwl_priv *priv,
				    struct iwl_dma_ptr *ptr)
{
	if (unlikely(!ptr->addr))
		return;

	pci_free_consistent(priv->pci_dev, ptr->size, ptr->addr, ptr->dma);
	memset(ptr, 0, sizeof(*ptr));
}

80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
/**
 * iwl_txq_update_write_ptr - Send new write index to hardware
 */
int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
{
	u32 reg = 0;
	int ret = 0;
	int txq_id = txq->q.id;

	if (txq->need_update == 0)
		return ret;

	/* if we're trying to save power */
	if (test_bit(STATUS_POWER_PMI, &priv->status)) {
		/* wake up nic if it's powered down ...
		 * uCode will wake up, and interrupt us again, so next
		 * time we'll skip this part. */
		reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);

		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
B
Ben Cahill 已提交
100 101
			IWL_DEBUG_INFO(priv, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
				      txq_id, reg);
102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122
			iwl_set_bit(priv, CSR_GP_CNTRL,
				    CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
			return ret;
		}

		iwl_write_direct32(priv, HBUS_TARG_WRPTR,
				     txq->q.write_ptr | (txq_id << 8));

	/* else not in power-save mode, uCode will never sleep when we're
	 * trying to tx (during RFKILL, we're not trying to tx). */
	} else
		iwl_write32(priv, HBUS_TARG_WRPTR,
			    txq->q.write_ptr | (txq_id << 8));

	txq->need_update = 0;

	return ret;
}
EXPORT_SYMBOL(iwl_txq_update_write_ptr);


123 124 125 126 127 128 129 130 131 132 133 134 135 136
void iwl_free_tfds_in_queue(struct iwl_priv *priv,
			    int sta_id, int tid, int freed)
{
	if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
		priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
	else {
		IWL_ERR(priv, "free more than tfds_in_queue (%u:%d)\n",
			priv->stations[sta_id].tid[tid].tfds_in_queue,
			freed);
		priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
	}
}
EXPORT_SYMBOL(iwl_free_tfds_in_queue);

137 138 139 140 141 142 143 144
/**
 * iwl_tx_queue_free - Deallocate DMA queue.
 * @txq: Transmit queue to deallocate.
 *
 * Empty queue by removing and destroying all BD's.
 * Free all buffers.
 * 0-fill, but do not free "txq" descriptor structure.
 */
145
void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
146
{
147
	struct iwl_tx_queue *txq = &priv->txq[txq_id];
148
	struct iwl_queue *q = &txq->q;
149
	struct pci_dev *dev = priv->pci_dev;
W
Wey-Yi Guy 已提交
150
	int i;
151 152 153 154 155 156 157

	if (q->n_bd == 0)
		return;

	/* first, empty all BD's */
	for (; q->write_ptr != q->read_ptr;
	     q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
158
		priv->cfg->ops->lib->txq_free_tfd(priv, txq);
159 160

	/* De-alloc array of command/tx buffers */
161
	for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
162
		kfree(txq->cmd[i]);
163 164 165

	/* De-alloc circular buffer of TFDs */
	if (txq->q.n_bd)
166
		pci_free_consistent(dev, priv->hw_params.tfd_size *
T
Tomas Winkler 已提交
167
				    txq->q.n_bd, txq->tfds, txq->q.dma_addr);
168 169 170 171 172

	/* De-alloc array of per-TFD driver data */
	kfree(txq->txb);
	txq->txb = NULL;

J
Johannes Berg 已提交
173 174 175 176 177 178
	/* deallocate arrays */
	kfree(txq->cmd);
	kfree(txq->meta);
	txq->cmd = NULL;
	txq->meta = NULL;

179 180 181
	/* 0-fill queue descriptor structure */
	memset(txq, 0, sizeof(*txq));
}
182
EXPORT_SYMBOL(iwl_tx_queue_free);
183 184 185 186 187 188 189 190 191

/**
 * iwl_cmd_queue_free - Deallocate DMA queue.
 * @txq: Transmit queue to deallocate.
 *
 * Empty queue by removing and destroying all BD's.
 * Free all buffers.
 * 0-fill, but do not free "txq" descriptor structure.
 */
192
void iwl_cmd_queue_free(struct iwl_priv *priv)
193 194 195 196
{
	struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
	struct iwl_queue *q = &txq->q;
	struct pci_dev *dev = priv->pci_dev;
W
Wey-Yi Guy 已提交
197
	int i;
198 199 200 201 202 203 204 205 206 207

	if (q->n_bd == 0)
		return;

	/* De-alloc array of command/tx buffers */
	for (i = 0; i <= TFD_CMD_SLOTS; i++)
		kfree(txq->cmd[i]);

	/* De-alloc circular buffer of TFDs */
	if (txq->q.n_bd)
208
		pci_free_consistent(dev, priv->hw_params.tfd_size *
T
Tomas Winkler 已提交
209
				    txq->q.n_bd, txq->tfds, txq->q.dma_addr);
210

211 212 213 214 215 216
	/* deallocate arrays */
	kfree(txq->cmd);
	kfree(txq->meta);
	txq->cmd = NULL;
	txq->meta = NULL;

217 218 219
	/* 0-fill queue descriptor structure */
	memset(txq, 0, sizeof(*txq));
}
220 221
EXPORT_SYMBOL(iwl_cmd_queue_free);

222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262
/*************** DMA-QUEUE-GENERAL-FUNCTIONS  *****
 * DMA services
 *
 * Theory of operation
 *
 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
 * of buffer descriptors, each of which points to one or more data buffers for
 * the device to read from or fill.  Driver and device exchange status of each
 * queue via "read" and "write" pointers.  Driver keeps minimum of 2 empty
 * entries in each circular buffer, to protect against confusing empty and full
 * queue states.
 *
 * The device reads or writes the data in the queues via the device's several
 * DMA/FIFO channels.  Each queue is mapped to a single DMA channel.
 *
 * For Tx queue, there are low mark and high mark limits. If, after queuing
 * the packet for Tx, free space become < low mark, Tx queue stopped. When
 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
 * Tx queue resumed.
 *
 * See more detailed info in iwl-4965-hw.h.
 ***************************************************/

int iwl_queue_space(const struct iwl_queue *q)
{
	int s = q->read_ptr - q->write_ptr;

	if (q->read_ptr > q->write_ptr)
		s -= q->n_bd;

	if (s <= 0)
		s += q->n_window;
	/* keep some reserve to not confuse empty and full situations */
	s -= 2;
	if (s < 0)
		s = 0;
	return s;
}
EXPORT_SYMBOL(iwl_queue_space);


263 264 265
/**
 * iwl_queue_init - Initialize queue's high/low-water and read/write indexes
 */
266
static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297
			  int count, int slots_num, u32 id)
{
	q->n_bd = count;
	q->n_window = slots_num;
	q->id = id;

	/* count must be power-of-two size, otherwise iwl_queue_inc_wrap
	 * and iwl_queue_dec_wrap are broken. */
	BUG_ON(!is_power_of_2(count));

	/* slots_num must be power-of-two size, otherwise
	 * get_cmd_index is broken. */
	BUG_ON(!is_power_of_2(slots_num));

	q->low_mark = q->n_window / 4;
	if (q->low_mark < 4)
		q->low_mark = 4;

	q->high_mark = q->n_window / 8;
	if (q->high_mark < 2)
		q->high_mark = 2;

	q->write_ptr = q->read_ptr = 0;

	return 0;
}

/**
 * iwl_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
 */
static int iwl_tx_queue_alloc(struct iwl_priv *priv,
298
			      struct iwl_tx_queue *txq, u32 id)
299 300
{
	struct pci_dev *dev = priv->pci_dev;
301
	size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
302 303 304 305 306 307 308

	/* Driver private data, only for Tx (not command) queues,
	 * not shared with device. */
	if (id != IWL_CMD_QUEUE_NUM) {
		txq->txb = kmalloc(sizeof(txq->txb[0]) *
				   TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
		if (!txq->txb) {
309
			IWL_ERR(priv, "kmalloc for auxiliary BD "
310 311 312
				  "structures failed\n");
			goto error;
		}
313
	} else {
314
		txq->txb = NULL;
315
	}
316 317 318

	/* Circular buffer of transmit frame descriptors (TFDs),
	 * shared with device */
319
	txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr);
320

T
Tomas Winkler 已提交
321
	if (!txq->tfds) {
322
		IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338
		goto error;
	}
	txq->q.id = id;

	return 0;

 error:
	kfree(txq->txb);
	txq->txb = NULL;

	return -ENOMEM;
}

/**
 * iwl_tx_queue_init - Allocate and initialize one tx/cmd queue
 */
339 340
int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
		      int slots_num, u32 txq_id)
341
{
342
	int i, len;
343
	int ret;
J
Johannes Berg 已提交
344
	int actual_slots = slots_num;
345 346 347 348 349 350 351 352 353

	/*
	 * Alloc buffer array for commands (Tx or other types of commands).
	 * For the command queue (#4), allocate command space + one big
	 * command for scan, since scan command is very huge; the system will
	 * not have two scans at the same time, so only one is needed.
	 * For normal Tx queues (all other queues), no super-size command
	 * space is needed.
	 */
J
Johannes Berg 已提交
354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369
	if (txq_id == IWL_CMD_QUEUE_NUM)
		actual_slots++;

	txq->meta = kzalloc(sizeof(struct iwl_cmd_meta) * actual_slots,
			    GFP_KERNEL);
	txq->cmd = kzalloc(sizeof(struct iwl_device_cmd *) * actual_slots,
			   GFP_KERNEL);

	if (!txq->meta || !txq->cmd)
		goto out_free_arrays;

	len = sizeof(struct iwl_device_cmd);
	for (i = 0; i < actual_slots; i++) {
		/* only happens for cmd queue */
		if (i == slots_num)
			len += IWL_MAX_SCAN_SIZE;
370

371
		txq->cmd[i] = kmalloc(len, GFP_KERNEL);
372
		if (!txq->cmd[i])
373
			goto err;
374
	}
375 376

	/* Alloc driver data array and TFD circular buffer */
377 378 379
	ret = iwl_tx_queue_alloc(priv, txq, txq_id);
	if (ret)
		goto err;
380 381 382

	txq->need_update = 0;

383 384 385 386 387 388 389
	/*
	 * Aggregation TX queues will get their ID when aggregation begins;
	 * they overwrite the setting done here. The command FIFO doesn't
	 * need an swq_id so don't set one to catch errors, all others can
	 * be set up to the identity mapping.
	 */
	if (txq_id != IWL_CMD_QUEUE_NUM)
390 391
		txq->swq_id = txq_id;

392 393 394 395 396 397 398 399
	/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
	 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
	BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));

	/* Initialize queue's high/low-water marks, and head/tail indexes */
	iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);

	/* Tell device where to find queue */
400
	priv->cfg->ops->lib->txq_init(priv, txq);
401 402

	return 0;
403
err:
J
Johannes Berg 已提交
404
	for (i = 0; i < actual_slots; i++)
405
		kfree(txq->cmd[i]);
J
Johannes Berg 已提交
406 407 408
out_free_arrays:
	kfree(txq->meta);
	kfree(txq->cmd);
409 410

	return -ENOMEM;
411
}
412 413
EXPORT_SYMBOL(iwl_tx_queue_init);

414 415 416 417 418 419 420 421 422 423
/**
 * iwl_hw_txq_ctx_free - Free TXQ Context
 *
 * Destroy all TX DMA queues and structures
 */
void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
{
	int txq_id;

	/* Tx queues */
424
	if (priv->txq) {
425 426 427 428 429 430
		for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
		     txq_id++)
			if (txq_id == IWL_CMD_QUEUE_NUM)
				iwl_cmd_queue_free(priv);
			else
				iwl_tx_queue_free(priv, txq_id);
431
	}
432 433 434
	iwl_free_dma_ptr(priv, &priv->kw);

	iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
435 436 437

	/* free tx queue structure */
	iwl_free_txq_mem(priv);
438 439 440
}
EXPORT_SYMBOL(iwl_hw_txq_ctx_free);

441 442
/**
 * iwl_txq_ctx_reset - Reset TX queue context
T
Tomas Winkler 已提交
443
 * Destroys all DMA structures and initialize them again
444 445 446 447 448 449 450 451
 *
 * @param priv
 * @return error code
 */
int iwl_txq_ctx_reset(struct iwl_priv *priv)
{
	int ret = 0;
	int txq_id, slots_num;
452
	unsigned long flags;
453 454 455 456

	/* Free all tx/cmd queues and keep-warm buffer */
	iwl_hw_txq_ctx_free(priv);

457 458 459
	ret = iwl_alloc_dma_ptr(priv, &priv->scd_bc_tbls,
				priv->hw_params.scd_bc_tbls_size);
	if (ret) {
460
		IWL_ERR(priv, "Scheduler BC Table allocation failed\n");
461 462
		goto error_bc_tbls;
	}
463
	/* Alloc keep-warm buffer */
464
	ret = iwl_alloc_dma_ptr(priv, &priv->kw, IWL_KW_SIZE);
465
	if (ret) {
466
		IWL_ERR(priv, "Keep Warm allocation failed\n");
467 468
		goto error_kw;
	}
469 470 471 472 473 474

	/* allocate tx queue structure */
	ret = iwl_alloc_txq_mem(priv);
	if (ret)
		goto error;

475
	spin_lock_irqsave(&priv->lock, flags);
476 477

	/* Turn off all Tx DMA fifos */
478 479
	priv->cfg->ops->lib->txq_set_sched(priv, 0);

480 481 482
	/* Tell NIC where to find the "keep warm" buffer */
	iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);

483 484 485
	spin_unlock_irqrestore(&priv->lock, flags);

	/* Alloc and init all Tx queues, including the command queue (#4) */
486 487 488 489 490 491
	for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
		slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
					TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
		ret = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
				       txq_id);
		if (ret) {
492
			IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
493 494 495 496 497 498 499 500
			goto error;
		}
	}

	return ret;

 error:
	iwl_hw_txq_ctx_free(priv);
501
	iwl_free_dma_ptr(priv, &priv->kw);
502
 error_kw:
503 504
	iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
 error_bc_tbls:
505 506
	return ret;
}
507

508 509 510 511 512
/**
 * iwl_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
 */
void iwl_txq_ctx_stop(struct iwl_priv *priv)
{
513
	int ch;
514 515 516 517 518 519 520 521
	unsigned long flags;

	/* Turn off all Tx DMA fifos */
	spin_lock_irqsave(&priv->lock, flags);

	priv->cfg->ops->lib->txq_set_sched(priv, 0);

	/* Stop each Tx DMA channel, and wait for it to be idle */
522 523
	for (ch = 0; ch < priv->hw_params.dma_chnl_num; ch++) {
		iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
524
		iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
525
				    FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
526
				    1000);
527 528 529 530 531 532 533
	}
	spin_unlock_irqrestore(&priv->lock, flags);

	/* Deallocate memory for all Tx queues */
	iwl_hw_txq_ctx_free(priv);
}
EXPORT_SYMBOL(iwl_txq_ctx_stop);
534 535 536 537 538 539

/*
 * handle build REPLY_TX command notification.
 */
static void iwl_tx_cmd_build_basic(struct iwl_priv *priv,
				  struct iwl_tx_cmd *tx_cmd,
540
				  struct ieee80211_tx_info *info,
541
				  struct ieee80211_hdr *hdr,
542
				  u8 std_id)
543
{
544
	__le16 fc = hdr->frame_control;
545 546 547
	__le32 tx_flags = tx_cmd->tx_flags;

	tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
548
	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
549
		tx_flags |= TX_CMD_FLG_ACK_MSK;
550
		if (ieee80211_is_mgmt(fc))
551
			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
552
		if (ieee80211_is_probe_resp(fc) &&
553 554 555 556 557 558 559
		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
			tx_flags |= TX_CMD_FLG_TSF_MSK;
	} else {
		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
	}

560
	if (ieee80211_is_back_req(fc))
561 562 563 564
		tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;


	tx_cmd->sta_id = std_id;
565
	if (ieee80211_has_morefrags(fc))
566 567
		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;

568 569
	if (ieee80211_is_data_qos(fc)) {
		u8 *qc = ieee80211_get_qos_ctl(hdr);
570 571 572 573 574 575
		tx_cmd->tid_tspec = qc[0] & 0xf;
		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
	} else {
		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
	}

576
	priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
577 578 579 580 581

	if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
		tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;

	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
582 583
	if (ieee80211_is_mgmt(fc)) {
		if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600
			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
		else
			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
	} else {
		tx_cmd->timeout.pm_frame_timeout = 0;
	}

	tx_cmd->driver_txop = 0;
	tx_cmd->tx_flags = tx_flags;
	tx_cmd->next_frame_len = 0;
}

#define RTS_HCCA_RETRY_LIMIT		3
#define RTS_DFAULT_RETRY_LIMIT		60

static void iwl_tx_cmd_build_rate(struct iwl_priv *priv,
			      struct iwl_tx_cmd *tx_cmd,
601
			      struct ieee80211_tx_info *info,
602
			      __le16 fc, int is_hcca)
603
{
604
	u32 rate_flags;
T
Tomas Winkler 已提交
605
	int rate_idx;
606 607
	u8 rts_retry_limit;
	u8 data_retry_limit;
608
	u8 rate_plcp;
609

610
	/* Set retry limit on DATA packets and Probe Responses*/
611
	if (ieee80211_is_probe_resp(fc))
612 613 614 615
		data_retry_limit = 3;
	else
		data_retry_limit = IWL_DEFAULT_TX_RETRY;
	tx_cmd->data_retry_limit = data_retry_limit;
616

617 618 619 620 621 622
	/* Set retry limit on RTS packets */
	rts_retry_limit = (is_hcca) ?  RTS_HCCA_RETRY_LIMIT :
		RTS_DFAULT_RETRY_LIMIT;
	if (data_retry_limit < rts_retry_limit)
		rts_retry_limit = data_retry_limit;
	tx_cmd->rts_retry_limit = rts_retry_limit;
623

624 625
	/* DATA packets will use the uCode station table for rate/antenna
	 * selection */
626 627 628
	if (ieee80211_is_data(fc)) {
		tx_cmd->initial_rate_index = 0;
		tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649
		return;
	}

	/**
	 * If the current TX rate stored in mac80211 has the MCS bit set, it's
	 * not really a TX rate.  Thus, we use the lowest supported rate for
	 * this band.  Also use the lowest supported rate if the stored rate
	 * index is invalid.
	 */
	rate_idx = info->control.rates[0].idx;
	if (info->control.rates[0].flags & IEEE80211_TX_RC_MCS ||
			(rate_idx < 0) || (rate_idx > IWL_RATE_COUNT_LEGACY))
		rate_idx = rate_lowest_index(&priv->bands[info->band],
				info->control.sta);
	/* For 5 GHZ band, remap mac80211 rate indices into driver indices */
	if (info->band == IEEE80211_BAND_5GHZ)
		rate_idx += IWL_FIRST_OFDM_RATE;
	/* Get PLCP rate for tx_cmd->rate_n_flags */
	rate_plcp = iwl_rates[rate_idx].plcp;
	/* Zero out flags for this packet */
	rate_flags = 0;
650

651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667
	/* Set CCK flag as needed */
	if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
		rate_flags |= RATE_MCS_CCK_MSK;

	/* Set up RTS and CTS flags for certain packets */
	switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
	case cpu_to_le16(IEEE80211_STYPE_AUTH):
	case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
	case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
	case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
		if (tx_cmd->tx_flags & TX_CMD_FLG_RTS_MSK) {
			tx_cmd->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
			tx_cmd->tx_flags |= TX_CMD_FLG_CTS_MSK;
		}
		break;
	default:
		break;
668 669
	}

670 671 672 673 674
	/* Set up antennas */
	priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
	rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant);

	/* Set the rate in the TX cmd */
675
	tx_cmd->rate_n_flags = iwl_hw_set_rate_n_flags(rate_plcp, rate_flags);
676 677 678
}

static void iwl_tx_cmd_build_hwcrypto(struct iwl_priv *priv,
679
				      struct ieee80211_tx_info *info,
680 681 682 683
				      struct iwl_tx_cmd *tx_cmd,
				      struct sk_buff *skb_frag,
				      int sta_id)
{
684
	struct ieee80211_key_conf *keyconf = info->control.hw_key;
685

686
	switch (keyconf->alg) {
687 688
	case ALG_CCMP:
		tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
689
		memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
690
		if (info->flags & IEEE80211_TX_CTL_AMPDU)
691
			tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
692
		IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
693 694 695 696
		break;

	case ALG_TKIP:
		tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
697
		ieee80211_get_tkip_key(keyconf, skb_frag,
698
			IEEE80211_TKIP_P2_KEY, tx_cmd->key);
699
		IWL_DEBUG_TX(priv, "tx_cmd with tkip hwcrypto\n");
700 701 702 703
		break;

	case ALG_WEP:
		tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP |
704 705 706 707 708 709
			(keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);

		if (keyconf->keylen == WEP_KEY_LEN_128)
			tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;

		memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
710

711
		IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
712
			     "with key %d\n", keyconf->keyidx);
713 714 715
		break;

	default:
T
Tomas Winkler 已提交
716
		IWL_ERR(priv, "Unknown encode alg %d\n", keyconf->alg);
717 718 719 720 721 722 723
		break;
	}
}

/*
 * start REPLY_TX command process
 */
724
int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
725 726
{
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
727
	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
728 729
	struct ieee80211_sta *sta = info->control.sta;
	struct iwl_station_priv *sta_priv = NULL;
T
Tomas Winkler 已提交
730 731
	struct iwl_tx_queue *txq;
	struct iwl_queue *q;
J
Johannes Berg 已提交
732 733
	struct iwl_device_cmd *out_cmd;
	struct iwl_cmd_meta *out_meta;
T
Tomas Winkler 已提交
734 735
	struct iwl_tx_cmd *tx_cmd;
	int swq_id, txq_id;
736 737 738
	dma_addr_t phys_addr;
	dma_addr_t txcmd_phys;
	dma_addr_t scratch_phys;
J
Johannes Berg 已提交
739
	u16 len, len_org, firstlen, secondlen;
740
	u16 seq_number = 0;
741
	__le16 fc;
742
	u8 hdr_len;
T
Tomas Winkler 已提交
743
	u8 sta_id;
744 745 746 747 748 749 750 751
	u8 wait_write_ptr = 0;
	u8 tid = 0;
	u8 *qc = NULL;
	unsigned long flags;
	int ret;

	spin_lock_irqsave(&priv->lock, flags);
	if (iwl_is_rfkill(priv)) {
752
		IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
753 754 755
		goto drop_unlock;
	}

756
	fc = hdr->frame_control;
757 758 759

#ifdef CONFIG_IWLWIFI_DEBUG
	if (ieee80211_is_auth(fc))
760
		IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
761
	else if (ieee80211_is_assoc_req(fc))
762
		IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
763
	else if (ieee80211_is_reassoc_req(fc))
764
		IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
765 766
#endif

767
	/* drop all non-injected data frame if we are not associated */
768
	if (ieee80211_is_data(fc) &&
769
	    !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
770
	    (!iwl_is_associated(priv) ||
771
	     ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id) ||
772
	     !priv->assoc_station_added)) {
773
		IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
774 775 776
		goto drop_unlock;
	}

777
	hdr_len = ieee80211_hdrlen(fc);
778 779

	/* Find (or create) index into station table for destination station */
780 781 782 783
	if (info->flags & IEEE80211_TX_CTL_INJECTED)
		sta_id = priv->hw_params.bcast_sta_id;
	else
		sta_id = iwl_get_sta_id(priv, hdr);
784
	if (sta_id == IWL_INVALID_STATION) {
785
		IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
J
Johannes Berg 已提交
786
			       hdr->addr1);
J
Johannes Berg 已提交
787
		goto drop_unlock;
788 789
	}

790
	IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
791

792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809
	if (sta)
		sta_priv = (void *)sta->drv_priv;

	if (sta_priv && sta_id != priv->hw_params.bcast_sta_id &&
	    sta_priv->asleep) {
		WARN_ON(!(info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE));
		/*
		 * This sends an asynchronous command to the device,
		 * but we can rely on it being processed before the
		 * next frame is processed -- and the next frame to
		 * this station is the one that will consume this
		 * counter.
		 * For now set the counter to just 1 since we do not
		 * support uAPSD yet.
		 */
		iwl_sta_modify_sleep_tx_count(priv, sta_id, 1);
	}

810
	txq_id = skb_get_queue_mapping(skb);
811 812
	if (ieee80211_is_data_qos(fc)) {
		qc = ieee80211_get_qos_ctl(hdr);
813
		tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
814 815
		if (unlikely(tid >= MAX_TID_COUNT))
			goto drop_unlock;
T
Tomas Winkler 已提交
816 817 818
		seq_number = priv->stations[sta_id].tid[tid].seq_number;
		seq_number &= IEEE80211_SCTL_SEQ;
		hdr->seq_ctrl = hdr->seq_ctrl &
819
				cpu_to_le16(IEEE80211_SCTL_FRAG);
T
Tomas Winkler 已提交
820
		hdr->seq_ctrl |= cpu_to_le16(seq_number);
821 822
		seq_number += 0x10;
		/* aggregation is on for this <sta,tid> */
823
		if (info->flags & IEEE80211_TX_CTL_AMPDU)
824 825 826 827
			txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
	}

	txq = &priv->txq[txq_id];
828
	swq_id = txq->swq_id;
829 830
	q = &txq->q;

J
Johannes Berg 已提交
831 832 833 834 835
	if (unlikely(iwl_queue_space(q) < q->high_mark))
		goto drop_unlock;

	if (ieee80211_is_data_qos(fc))
		priv->stations[sta_id].tid[tid].tfds_in_queue++;
836 837 838 839 840 841

	/* Set up driver data for this TFD */
	memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
	txq->txb[q->write_ptr].skb[0] = skb;

	/* Set up first empty entry in queue's array of Tx/cmd buffers */
842
	out_cmd = txq->cmd[q->write_ptr];
J
Johannes Berg 已提交
843
	out_meta = &txq->meta[q->write_ptr];
844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860
	tx_cmd = &out_cmd->cmd.tx;
	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
	memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));

	/*
	 * Set up the Tx-command (not MAC!) header.
	 * Store the chosen Tx queue and TFD index within the sequence field;
	 * after Tx, uCode's Tx response will return this value so driver can
	 * locate the frame within the tx queue and do post-tx processing.
	 */
	out_cmd->hdr.cmd = REPLY_TX;
	out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
				INDEX_TO_SEQ(q->write_ptr)));

	/* Copy MAC header from skb into command buffer */
	memcpy(tx_cmd->hdr, hdr, hdr_len);

R
Reinette Chatre 已提交
861 862 863 864 865 866 867 868 869 870

	/* Total # bytes to be transmitted */
	len = (u16)skb->len;
	tx_cmd->len = cpu_to_le16(len);

	if (info->control.hw_key)
		iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id);

	/* TODO need this for burst mode later on */
	iwl_tx_cmd_build_basic(priv, tx_cmd, info, hdr, sta_id);
871
	iwl_dbg_log_tx_data_frame(priv, len, hdr);
R
Reinette Chatre 已提交
872 873

	/* set is_hcca to 0; it probably will never be implemented */
874
	iwl_tx_cmd_build_rate(priv, tx_cmd, info, fc, 0);
R
Reinette Chatre 已提交
875

876
	iwl_update_stats(priv, true, fc, len);
877 878 879 880 881 882 883 884 885 886 887 888 889
	/*
	 * Use the first empty entry in this queue's command buffer array
	 * to contain the Tx command and MAC header concatenated together
	 * (payload data will be in another buffer).
	 * Size of this varies, due to varying MAC header length.
	 * If end is not dword aligned, we'll have 2 extra bytes at the end
	 * of the MAC header (device reads on dword boundaries).
	 * We'll tell device about this padding later.
	 */
	len = sizeof(struct iwl_tx_cmd) +
		sizeof(struct iwl_cmd_header) + hdr_len;

	len_org = len;
J
Johannes Berg 已提交
890
	firstlen = len = (len + 3) & ~3;
891 892 893 894 895 896

	if (len_org != len)
		len_org = 1;
	else
		len_org = 0;

R
Reinette Chatre 已提交
897 898 899 900
	/* Tell NIC about any 2-byte padding after MAC header */
	if (len_org)
		tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;

901 902
	/* Physical address of this Tx command's header (not MAC header!),
	 * within command buffer array. */
T
Tomas Winkler 已提交
903
	txcmd_phys = pci_map_single(priv->pci_dev,
R
Reinette Chatre 已提交
904
				    &out_cmd->hdr, len,
905
				    PCI_DMA_BIDIRECTIONAL);
J
Johannes Berg 已提交
906 907
	pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
	pci_unmap_len_set(out_meta, len, len);
908 909
	/* Add buffer containing Tx command and MAC(!) header to TFD's
	 * first entry */
910 911
	priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
						   txcmd_phys, len, 1, 0);
912

R
Reinette Chatre 已提交
913 914 915 916 917 918 919 920
	if (!ieee80211_has_morefrags(hdr->frame_control)) {
		txq->need_update = 1;
		if (qc)
			priv->stations[sta_id].tid[tid].seq_number = seq_number;
	} else {
		wait_write_ptr = 1;
		txq->need_update = 0;
	}
921 922 923

	/* Set up TFD's 2nd entry to point directly to remainder of skb,
	 * if any (802.11 null frames have no payload). */
J
Johannes Berg 已提交
924
	secondlen = len = skb->len - hdr_len;
925 926 927
	if (len) {
		phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
					   len, PCI_DMA_TODEVICE);
928 929 930
		priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
							   phys_addr, len,
							   0, 0);
931 932 933
	}

	scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
R
Reinette Chatre 已提交
934 935 936 937 938 939 940
				offsetof(struct iwl_tx_cmd, scratch);

	len = sizeof(struct iwl_tx_cmd) +
		sizeof(struct iwl_cmd_header) + hdr_len;
	/* take back ownership of DMA buffer to enable update */
	pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys,
				    len, PCI_DMA_BIDIRECTIONAL);
941
	tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
T
Tomas Winkler 已提交
942
	tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
943

944 945 946
	IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
		     le16_to_cpu(out_cmd->hdr.sequence));
	IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
947 948
	iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
	iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
949 950

	/* Set up entry for this TFD in Tx byte-count array */
951 952
	if (info->flags & IEEE80211_TX_CTL_AMPDU)
		priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq,
R
Reinette Chatre 已提交
953 954 955 956
						     le16_to_cpu(tx_cmd->len));

	pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys,
				       len, PCI_DMA_BIDIRECTIONAL);
957

J
Johannes Berg 已提交
958 959 960 961 962 963
	trace_iwlwifi_dev_tx(priv,
			     &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
			     sizeof(struct iwl_tfd),
			     &out_cmd->hdr, firstlen,
			     skb->data + hdr_len, secondlen);

964 965 966 967 968
	/* Tell device the write index *just past* this latest filled TFD */
	q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
	ret = iwl_txq_update_write_ptr(priv, txq);
	spin_unlock_irqrestore(&priv->lock, flags);

969 970 971 972 973 974 975 976 977 978 979
	/*
	 * At this point the frame is "transmitted" successfully
	 * and we will get a TX status notification eventually,
	 * regardless of the value of ret. "ret" only indicates
	 * whether or not we should update the write pointer.
	 */

	/* avoid atomic ops if it isn't an associated client */
	if (sta_priv && sta_priv->client)
		atomic_inc(&sta_priv->pending_frames);

980 981 982
	if (ret)
		return ret;

983
	if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
984 985 986 987 988
		if (wait_write_ptr) {
			spin_lock_irqsave(&priv->lock, flags);
			txq->need_update = 1;
			iwl_txq_update_write_ptr(priv, txq);
			spin_unlock_irqrestore(&priv->lock, flags);
989
		} else {
990
			iwl_stop_queue(priv, txq->swq_id);
991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016
		}
	}

	return 0;

drop_unlock:
	spin_unlock_irqrestore(&priv->lock, flags);
	return -1;
}
EXPORT_SYMBOL(iwl_tx_skb);

/*************** HOST COMMAND QUEUE FUNCTIONS   *****/

/**
 * iwl_enqueue_hcmd - enqueue a uCode command
 * @priv: device private data point
 * @cmd: a point to the ucode command structure
 *
 * The function returns < 0 values to indicate the operation is
 * failed. On success, it turns the index (> 0) of command in the
 * command queue.
 */
int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
{
	struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
	struct iwl_queue *q = &txq->q;
J
Johannes Berg 已提交
1017 1018
	struct iwl_device_cmd *out_cmd;
	struct iwl_cmd_meta *out_meta;
1019 1020
	dma_addr_t phys_addr;
	unsigned long flags;
T
Tomas Winkler 已提交
1021 1022 1023
	int len, ret;
	u32 idx;
	u16 fix_size;
1024 1025 1026 1027 1028 1029 1030 1031

	cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
	fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));

	/* If any of the command structures end up being larger than
	 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
	 * we will need to increase the size of the TFD entries */
	BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
J
Johannes Berg 已提交
1032
	       !(cmd->flags & CMD_SIZE_HUGE));
1033

1034
	if (iwl_is_rfkill(priv) || iwl_is_ctkill(priv)) {
1035 1036
		IWL_WARN(priv, "Not sending command - %s KILL\n",
			 iwl_is_rfkill(priv) ? "RF" : "CT");
1037 1038 1039
		return -EIO;
	}

J
Johannes Berg 已提交
1040
	if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
1041
		IWL_ERR(priv, "No space in command queue\n");
1042 1043 1044 1045 1046 1047
		if (iwl_within_ct_kill_margin(priv))
			iwl_tt_enter_ct_kill(priv);
		else {
			IWL_ERR(priv, "Restarting adapter due to queue full\n");
			queue_work(priv->workqueue, &priv->restart);
		}
1048 1049 1050 1051 1052
		return -ENOSPC;
	}

	spin_lock_irqsave(&priv->hcmd_lock, flags);

J
Johannes Berg 已提交
1053
	idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
1054
	out_cmd = txq->cmd[idx];
J
Johannes Berg 已提交
1055 1056
	out_meta = &txq->meta[idx];

1057
	memset(out_meta, 0, sizeof(*out_meta));	/* re-initialize to NULL */
J
Johannes Berg 已提交
1058 1059 1060 1061 1062
	out_meta->flags = cmd->flags;
	if (cmd->flags & CMD_WANT_SKB)
		out_meta->source = cmd;
	if (cmd->flags & CMD_ASYNC)
		out_meta->callback = cmd->callback;
1063 1064 1065 1066 1067 1068 1069 1070 1071 1072

	out_cmd->hdr.cmd = cmd->id;
	memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);

	/* At this point, the out_cmd now has all of the incoming cmd
	 * information */

	out_cmd->hdr.flags = 0;
	out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
			INDEX_TO_SEQ(q->write_ptr));
J
Johannes Berg 已提交
1073
	if (cmd->flags & CMD_SIZE_HUGE)
1074
		out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
J
Johannes Berg 已提交
1075
	len = sizeof(struct iwl_device_cmd);
R
Reinette Chatre 已提交
1076
	len += (idx == TFD_CMD_SLOTS) ?  IWL_MAX_SCAN_SIZE : 0;
T
Tomas Winkler 已提交
1077

1078

1079 1080 1081 1082
#ifdef CONFIG_IWLWIFI_DEBUG
	switch (out_cmd->hdr.cmd) {
	case REPLY_TX_LINK_QUALITY_CMD:
	case SENSITIVITY_CMD:
1083
		IWL_DEBUG_HC_DUMP(priv, "Sending command %s (#%x), seq: 0x%04X, "
1084 1085 1086 1087 1088 1089 1090
				"%d bytes at %d[%d]:%d\n",
				get_cmd_string(out_cmd->hdr.cmd),
				out_cmd->hdr.cmd,
				le16_to_cpu(out_cmd->hdr.sequence), fix_size,
				q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
				break;
	default:
1091
		IWL_DEBUG_HC(priv, "Sending command %s (#%x), seq: 0x%04X, "
1092 1093 1094 1095 1096 1097 1098
				"%d bytes at %d[%d]:%d\n",
				get_cmd_string(out_cmd->hdr.cmd),
				out_cmd->hdr.cmd,
				le16_to_cpu(out_cmd->hdr.sequence), fix_size,
				q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
	}
#endif
1099 1100
	txq->need_update = 1;

1101 1102 1103
	if (priv->cfg->ops->lib->txq_update_byte_cnt_tbl)
		/* Set up entry in queue's byte count circular buffer */
		priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
1104

R
Reinette Chatre 已提交
1105 1106
	phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr,
				   fix_size, PCI_DMA_BIDIRECTIONAL);
J
Johannes Berg 已提交
1107 1108
	pci_unmap_addr_set(out_meta, mapping, phys_addr);
	pci_unmap_len_set(out_meta, len, fix_size);
R
Reinette Chatre 已提交
1109

J
Johannes Berg 已提交
1110 1111
	trace_iwlwifi_dev_hcmd(priv, &out_cmd->hdr, fix_size, cmd->flags);

R
Reinette Chatre 已提交
1112 1113 1114 1115
	priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
						   phys_addr, fix_size, 1,
						   U32_PAD(cmd->len));

1116 1117 1118 1119 1120 1121 1122 1123
	/* Increment and update queue's write index */
	q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
	ret = iwl_txq_update_write_ptr(priv, txq);

	spin_unlock_irqrestore(&priv->hcmd_lock, flags);
	return ret ? ret : idx;
}

1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141
static void iwl_tx_status(struct iwl_priv *priv, struct sk_buff *skb)
{
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
	struct ieee80211_sta *sta;
	struct iwl_station_priv *sta_priv;

	sta = ieee80211_find_sta(priv->vif, hdr->addr1);
	if (sta) {
		sta_priv = (void *)sta->drv_priv;
		/* avoid atomic ops if this isn't a client */
		if (sta_priv->client &&
		    atomic_dec_return(&sta_priv->pending_frames) == 0)
			ieee80211_sta_block_awake(priv->hw, sta, false);
	}

	ieee80211_tx_status_irqsafe(priv->hw, skb);
}

1142 1143 1144 1145 1146 1147 1148 1149
int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
{
	struct iwl_tx_queue *txq = &priv->txq[txq_id];
	struct iwl_queue *q = &txq->q;
	struct iwl_tx_info *tx_info;
	int nfreed = 0;

	if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
1150
		IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
1151 1152 1153 1154 1155
			  "is out of range [0-%d] %d %d.\n", txq_id,
			  index, q->n_bd, q->write_ptr, q->read_ptr);
		return 0;
	}

T
Tomas Winkler 已提交
1156 1157 1158
	for (index = iwl_queue_inc_wrap(index, q->n_bd);
	     q->read_ptr != index;
	     q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1159 1160

		tx_info = &txq->txb[txq->q.read_ptr];
1161
		iwl_tx_status(priv, tx_info->skb[0]);
1162 1163
		tx_info->skb[0] = NULL;

1164 1165 1166
		if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl)
			priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq);

1167
		priv->cfg->ops->lib->txq_free_tfd(priv, txq);
1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181
		nfreed++;
	}
	return nfreed;
}
EXPORT_SYMBOL(iwl_tx_queue_reclaim);


/**
 * iwl_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
 *
 * When FW advances 'R' index, all entries between old and new 'R' index
 * need to be reclaimed. As result, some free space forms.  If there is
 * enough free space (> low mark), wake the stack that feeds us.
 */
T
Tomas Winkler 已提交
1182 1183
static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
				   int idx, int cmd_idx)
1184 1185 1186 1187 1188
{
	struct iwl_tx_queue *txq = &priv->txq[txq_id];
	struct iwl_queue *q = &txq->q;
	int nfreed = 0;

T
Tomas Winkler 已提交
1189
	if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) {
1190
		IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
1191
			  "is out of range [0-%d] %d %d.\n", txq_id,
T
Tomas Winkler 已提交
1192
			  idx, q->n_bd, q->write_ptr, q->read_ptr);
1193 1194 1195
		return;
	}

T
Tomas Winkler 已提交
1196 1197
	for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
	     q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1198

T
Tomas Winkler 已提交
1199
		if (nfreed++ > 0) {
1200
			IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx,
1201 1202 1203
					q->write_ptr, q->read_ptr);
			queue_work(priv->workqueue, &priv->restart);
		}
1204

1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217
	}
}

/**
 * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
 * @rxb: Rx buffer to reclaim
 *
 * If an Rx buffer has an async callback associated with it the callback
 * will be executed.  The attached skb (if present) will only be freed
 * if the callback returns 1
 */
void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
{
Z
Zhu Yi 已提交
1218
	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1219 1220 1221 1222
	u16 sequence = le16_to_cpu(pkt->hdr.sequence);
	int txq_id = SEQ_TO_QUEUE(sequence);
	int index = SEQ_TO_INDEX(sequence);
	int cmd_index;
1223
	bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
J
Johannes Berg 已提交
1224 1225
	struct iwl_device_cmd *cmd;
	struct iwl_cmd_meta *meta;
1226 1227 1228 1229

	/* If a Tx command is being handled and it isn't in the actual
	 * command queue then there a command routing bug has been introduced
	 * in the queue management code. */
1230
	if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
1231 1232 1233 1234
		 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
		  txq_id, sequence,
		  priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
		  priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
1235
		iwl_print_hex_error(priv, pkt, 32);
1236
		return;
1237
	}
1238 1239

	cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
1240
	cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
J
Johannes Berg 已提交
1241
	meta = &priv->txq[IWL_CMD_QUEUE_NUM].meta[cmd_index];
1242

R
Reinette Chatre 已提交
1243 1244 1245 1246 1247
	pci_unmap_single(priv->pci_dev,
			 pci_unmap_addr(meta, mapping),
			 pci_unmap_len(meta, len),
			 PCI_DMA_BIDIRECTIONAL);

1248
	/* Input error checking is done when commands are added to queue. */
J
Johannes Berg 已提交
1249
	if (meta->flags & CMD_WANT_SKB) {
Z
Zhu Yi 已提交
1250 1251
		meta->source->reply_page = (unsigned long)rxb_addr(rxb);
		rxb->page = NULL;
1252
	} else if (meta->callback)
Z
Zhu Yi 已提交
1253
		meta->callback(priv, cmd, pkt);
1254

T
Tomas Winkler 已提交
1255
	iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index);
1256

J
Johannes Berg 已提交
1257
	if (!(meta->flags & CMD_ASYNC)) {
1258 1259 1260 1261 1262 1263
		clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
		wake_up_interruptible(&priv->wait_command_queue);
	}
}
EXPORT_SYMBOL(iwl_tx_cmd_complete);

1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293
/*
 * Find first available (lowest unused) Tx Queue, mark it "active".
 * Called only when finding queue for aggregation.
 * Should never return anything < 7, because they should already
 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
 */
static int iwl_txq_ctx_activate_free(struct iwl_priv *priv)
{
	int txq_id;

	for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
		if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
			return txq_id;
	return -1;
}

int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
{
	int sta_id;
	int tx_fifo;
	int txq_id;
	int ret;
	unsigned long flags;
	struct iwl_tid_data *tid_data;

	if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
		tx_fifo = default_tid_to_tx_fifo[tid];
	else
		return -EINVAL;

1294
	IWL_WARN(priv, "%s on ra = %pM tid = %d\n",
J
Johannes Berg 已提交
1295
			__func__, ra, tid);
1296 1297

	sta_id = iwl_find_station(priv, ra);
1298 1299
	if (sta_id == IWL_INVALID_STATION) {
		IWL_ERR(priv, "Start AGG on invalid station\n");
1300
		return -ENXIO;
1301
	}
R
Roel Kluin 已提交
1302 1303
	if (unlikely(tid >= MAX_TID_COUNT))
		return -EINVAL;
1304 1305

	if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
1306
		IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
1307 1308 1309 1310
		return -ENXIO;
	}

	txq_id = iwl_txq_ctx_activate_free(priv);
1311 1312
	if (txq_id == -1) {
		IWL_ERR(priv, "No free aggregation queue available\n");
1313
		return -ENXIO;
1314
	}
1315 1316 1317 1318 1319

	spin_lock_irqsave(&priv->sta_lock, flags);
	tid_data = &priv->stations[sta_id].tid[tid];
	*ssn = SEQ_TO_SN(tid_data->seq_number);
	tid_data->agg.txq_id = txq_id;
1320
	priv->txq[txq_id].swq_id = iwl_virtual_agg_queue_num(tx_fifo, txq_id);
1321 1322 1323 1324 1325 1326 1327 1328
	spin_unlock_irqrestore(&priv->sta_lock, flags);

	ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo,
						  sta_id, tid, *ssn);
	if (ret)
		return ret;

	if (tid_data->tfds_in_queue == 0) {
1329
		IWL_DEBUG_HT(priv, "HW queue is empty\n");
1330
		tid_data->agg.state = IWL_AGG_ON;
1331
		ieee80211_start_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1332
	} else {
1333
		IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n",
1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348
			     tid_data->tfds_in_queue);
		tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
	}
	return ret;
}
EXPORT_SYMBOL(iwl_tx_agg_start);

int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid)
{
	int tx_fifo_id, txq_id, sta_id, ssn = -1;
	struct iwl_tid_data *tid_data;
	int ret, write_ptr, read_ptr;
	unsigned long flags;

	if (!ra) {
1349
		IWL_ERR(priv, "ra = NULL\n");
1350 1351 1352
		return -EINVAL;
	}

1353 1354 1355
	if (unlikely(tid >= MAX_TID_COUNT))
		return -EINVAL;

1356 1357 1358 1359 1360 1361 1362
	if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
		tx_fifo_id = default_tid_to_tx_fifo[tid];
	else
		return -EINVAL;

	sta_id = iwl_find_station(priv, ra);

1363 1364
	if (sta_id == IWL_INVALID_STATION) {
		IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
1365
		return -ENXIO;
1366
	}
1367

1368 1369 1370
	if (priv->stations[sta_id].tid[tid].agg.state ==
				IWL_EMPTYING_HW_QUEUE_ADDBA) {
		IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
1371
		ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1372 1373 1374 1375
		priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
		return 0;
	}

1376
	if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
1377
		IWL_WARN(priv, "Stopping AGG while state not ON or starting\n");
1378 1379 1380 1381 1382 1383 1384 1385 1386

	tid_data = &priv->stations[sta_id].tid[tid];
	ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
	txq_id = tid_data->agg.txq_id;
	write_ptr = priv->txq[txq_id].q.write_ptr;
	read_ptr = priv->txq[txq_id].q.read_ptr;

	/* The queue is not empty */
	if (write_ptr != read_ptr) {
1387
		IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n");
1388 1389 1390 1391 1392
		priv->stations[sta_id].tid[tid].agg.state =
				IWL_EMPTYING_HW_QUEUE_DELBA;
		return 0;
	}

1393
	IWL_DEBUG_HT(priv, "HW queue is empty\n");
1394 1395 1396 1397 1398 1399 1400 1401 1402 1403
	priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;

	spin_lock_irqsave(&priv->lock, flags);
	ret = priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn,
						   tx_fifo_id);
	spin_unlock_irqrestore(&priv->lock, flags);

	if (ret)
		return ret;

1404
	ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419

	return 0;
}
EXPORT_SYMBOL(iwl_tx_agg_stop);

int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id)
{
	struct iwl_queue *q = &priv->txq[txq_id].q;
	u8 *addr = priv->stations[sta_id].sta.sta.addr;
	struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];

	switch (priv->stations[sta_id].tid[tid].agg.state) {
	case IWL_EMPTYING_HW_QUEUE_DELBA:
		/* We are reclaiming the last packet of the */
		/* aggregated HW queue */
T
Tomas Winkler 已提交
1420 1421
		if ((txq_id  == tid_data->agg.txq_id) &&
		    (q->read_ptr == q->write_ptr)) {
1422 1423
			u16 ssn = SEQ_TO_SN(tid_data->seq_number);
			int tx_fifo = default_tid_to_tx_fifo[tid];
1424
			IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
1425 1426 1427
			priv->cfg->ops->lib->txq_agg_disable(priv, txq_id,
							     ssn, tx_fifo);
			tid_data->agg.state = IWL_AGG_OFF;
1428
			ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, addr, tid);
1429 1430 1431 1432 1433
		}
		break;
	case IWL_EMPTYING_HW_QUEUE_ADDBA:
		/* We are reclaiming the last packet of the queue */
		if (tid_data->tfds_in_queue == 0) {
1434
			IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n");
1435
			tid_data->agg.state = IWL_AGG_ON;
1436
			ieee80211_start_tx_ba_cb_irqsafe(priv->vif, addr, tid);
1437 1438 1439 1440 1441 1442 1443
		}
		break;
	}
	return 0;
}
EXPORT_SYMBOL(iwl_txq_check_empty);

1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462
/**
 * iwl_tx_status_reply_compressed_ba - Update tx status from block-ack
 *
 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
 * ACK vs. not.  This gets sent to mac80211, then to rate scaling algo.
 */
static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv,
				 struct iwl_ht_agg *agg,
				 struct iwl_compressed_ba_resp *ba_resp)

{
	int i, sh, ack;
	u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
	u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
	u64 bitmap;
	int successes = 0;
	struct ieee80211_tx_info *info;

	if (unlikely(!agg->wait_for_ba))  {
1463
		IWL_ERR(priv, "Received BA when not expected\n");
1464 1465 1466 1467 1468
		return -EINVAL;
	}

	/* Mark that the expected block-ack response arrived */
	agg->wait_for_ba = 0;
1469
	IWL_DEBUG_TX_REPLY(priv, "BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
1470 1471

	/* Calculate shift to align block-ack bits with our Tx window bits */
T
Tomas Winkler 已提交
1472
	sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4);
1473 1474 1475 1476 1477 1478 1479
	if (sh < 0) /* tbw something is wrong with indices */
		sh += 0x100;

	/* don't use 64-bit values for now */
	bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;

	if (agg->frame_count > (64 - sh)) {
1480
		IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size");
1481 1482 1483 1484 1485 1486 1487 1488 1489 1490
		return -1;
	}

	/* check for success or failure according to the
	 * transmitted bitmap and block-ack bitmap */
	bitmap &= agg->bitmap;

	/* For each frame attempted in aggregation,
	 * update driver's record of tx frame's status. */
	for (i = 0; i < agg->frame_count ; i++) {
1491
		ack = bitmap & (1ULL << i);
1492
		successes += !!ack;
1493
		IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n",
1494
			ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff,
1495 1496 1497 1498 1499
			agg->start_idx + i);
	}

	info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
	memset(&info->status, 0, sizeof(info->status));
1500
	info->flags |= IEEE80211_TX_STAT_ACK;
1501 1502 1503 1504 1505
	info->flags |= IEEE80211_TX_STAT_AMPDU;
	info->status.ampdu_ack_map = successes;
	info->status.ampdu_ack_len = agg->frame_count;
	iwl_hwrate_to_tx_control(priv, agg->rate_n_flags, info);

1506
	IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap);
1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519

	return 0;
}

/**
 * iwl_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
 *
 * Handles block-acknowledge notification from device, which reports success
 * of frames sent via aggregation.
 */
void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
					   struct iwl_rx_mem_buffer *rxb)
{
Z
Zhu Yi 已提交
1520
	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1521 1522 1523
	struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
	struct iwl_tx_queue *txq = NULL;
	struct iwl_ht_agg *agg;
T
Tomas Winkler 已提交
1524 1525 1526
	int index;
	int sta_id;
	int tid;
1527 1528 1529 1530 1531 1532 1533 1534 1535

	/* "flow" corresponds to Tx queue */
	u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);

	/* "ssn" is start of block-ack Tx window, corresponds to index
	 * (in Tx queue's circular buffer) of first TFD/frame in window */
	u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);

	if (scd_flow >= priv->hw_params.max_txq_num) {
1536 1537
		IWL_ERR(priv,
			"BUG_ON scd_flow is bigger than number of queues\n");
1538 1539 1540 1541
		return;
	}

	txq = &priv->txq[scd_flow];
T
Tomas Winkler 已提交
1542 1543 1544
	sta_id = ba_resp->sta_id;
	tid = ba_resp->tid;
	agg = &priv->stations[sta_id].tid[tid].agg;
1545 1546 1547 1548 1549 1550

	/* Find index just before block-ack window */
	index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);

	/* TODO: Need to get this copy more safely - now good for debug */

1551
	IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
1552 1553
			   "sta_id = %d\n",
			   agg->wait_for_ba,
J
Johannes Berg 已提交
1554
			   (u8 *) &ba_resp->sta_addr_lo32,
1555
			   ba_resp->sta_id);
1556
	IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
1557 1558 1559 1560 1561 1562
			   "%d, scd_ssn = %d\n",
			   ba_resp->tid,
			   ba_resp->seq_ctl,
			   (unsigned long long)le64_to_cpu(ba_resp->bitmap),
			   ba_resp->scd_flow,
			   ba_resp->scd_ssn);
1563
	IWL_DEBUG_TX_REPLY(priv, "DAT start_idx = %d, bitmap = 0x%llx \n",
1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575
			   agg->start_idx,
			   (unsigned long long)agg->bitmap);

	/* Update driver's record of ACK vs. not for each frame in window */
	iwl_tx_status_reply_compressed_ba(priv, agg, ba_resp);

	/* Release all TFDs before the SSN, i.e. all TFDs in front of
	 * block-ack window (we assume that they've been successfully
	 * transmitted ... if not, it's too late anyway). */
	if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
		/* calculate mac80211 ampdu sw queue to wake */
		int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
1576
		iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
T
Tomas Winkler 已提交
1577 1578 1579 1580

		if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
		    priv->mac80211_registered &&
		    (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
1581
			iwl_wake_queue(priv, txq->swq_id);
T
Tomas Winkler 已提交
1582 1583

		iwl_txq_check_empty(priv, sta_id, tid, scd_flow);
1584 1585 1586 1587
	}
}
EXPORT_SYMBOL(iwl_rx_reply_compressed_ba);

1588
#ifdef CONFIG_IWLWIFI_DEBUG
1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617
#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x

const char *iwl_get_tx_fail_reason(u32 status)
{
	switch (status & TX_STATUS_MSK) {
	case TX_STATUS_SUCCESS:
		return "SUCCESS";
		TX_STATUS_ENTRY(SHORT_LIMIT);
		TX_STATUS_ENTRY(LONG_LIMIT);
		TX_STATUS_ENTRY(FIFO_UNDERRUN);
		TX_STATUS_ENTRY(MGMNT_ABORT);
		TX_STATUS_ENTRY(NEXT_FRAG);
		TX_STATUS_ENTRY(LIFE_EXPIRE);
		TX_STATUS_ENTRY(DEST_PS);
		TX_STATUS_ENTRY(ABORTED);
		TX_STATUS_ENTRY(BT_RETRY);
		TX_STATUS_ENTRY(STA_INVALID);
		TX_STATUS_ENTRY(FRAG_DROPPED);
		TX_STATUS_ENTRY(TID_DISABLE);
		TX_STATUS_ENTRY(FRAME_FLUSHED);
		TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
		TX_STATUS_ENTRY(TX_LOCKED);
		TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
	}

	return "UNKNOWN";
}
EXPORT_SYMBOL(iwl_get_tx_fail_reason);
#endif /* CONFIG_IWLWIFI_DEBUG */