- 24 7月, 2021 1 次提交
-
-
由 Yinan Xu 提交于
XiangShan is jointly released by ICT and PCL.
-
- 16 7月, 2021 1 次提交
-
-
由 Lingrui98 提交于
* Now can pass compiling. [WIP] comment out-of-date code in frontend [WIP] move NewFtq to xiangshan.frontend and rename class to Ftq Ibuffer: update sigal names for new IFU [WIP] remove redundant NewFrontend [WIP] set entry_fetch_status to f_sent once send req to buf Fix syntax error in IFU Fix syntax error in IFU/ICache/Ibuffer [WIP] indent fix in ftq BPU: Move GlobalHistory define from IFU.scala to BPU.scala [WIP] fix some compilation errors BPU: Remove HasIFUConst and move some bundles from BPU.scala to frontendBundle.scala [WIP] fix some compilation errors [WIP] rename ftq-bpu ios [WIP] recover some const definitions [WIP] fix some compilation errors [WIP]connect some IOs in frontend BPU: fix syntax error [WIP] fix compilation errors in predecode BPU: fix RAS syntax error [WIP] add some simulation perf counters back BPU: Remove numBr redefine in ubtb and bim
-
- 04 6月, 2021 1 次提交
-
-
由 Lemover 提交于
In this commit, we add License for XiangShan project.
-
- 19 4月, 2021 1 次提交
-
-
由 Jiawei Lin 提交于
* difftest: use DPI-C to refactor difftest In this commit, difftest is refactored with DPI-C calls. There're a few reasons: (1) From Verilator's manual, DPI-C calls should be more efficient than accessing from dut_ptr. (2) DPI-C is cross-platform (Verilator, VCS, ...) (3) difftest APIs are splited from emu.cpp to possibly support more backend platforms (NEMU, Spike, ...) The performance at this commit is quite slower than the original emu. Performance issues will be fixed later. * [WIP] SimTop: try to use 'XSTop' as soc * CircularQueuePtr: ues F-bounded polymorphis instead implict helper * Refactor parameters & Clean up code * difftest: support basic difftest * Support diffetst in new sim top * Difftest; convert recode fmt to ieee754 when comparing fp regs * Difftest: pass sign-ext pc to dpic functions && fix exception pc * Debug: add int/exc inst wb to debug queue * Difftest: pass sign-ext pc to dpic functions && fix exception pc * Difftest: fix naive commit num limit Co-authored-by: NYinan Xu <xuyinan1997@gmail.com> Co-authored-by: NWilliam Wang <zeweiwang@outlook.com>
-
- 25 2月, 2021 1 次提交
-
-
由 zoujr 提交于
-
- 22 1月, 2021 1 次提交
-
-
由 jinyue110 提交于
-
- 07 1月, 2021 6 次提交
- 04 1月, 2021 1 次提交
-
-
由 Lingrui98 提交于
-
- 12 12月, 2020 1 次提交
-
-
由 Fa_wang 提交于
-
- 10 12月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 03 12月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 01 12月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 29 11月, 2020 2 次提交
- 05 11月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 04 11月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 18 8月, 2020 1 次提交
-
-
由 jinyue110 提交于
-
- 10 8月, 2020 4 次提交
- 06 8月, 2020 3 次提交
-
-
由 zhanglinjuan 提交于
predecode: fix bug in isCall and isRet micorbench and coremark pass!
-
由 zhanglinjuan 提交于
-
由 zhanglinjuan 提交于
predecode: fix bugs in mask output
-
- 05 8月, 2020 1 次提交
-
-
由 zhanglinjuan 提交于
bpu: fix lastHit in stage3
-
- 02 8月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 01 8月, 2020 1 次提交
-
-
由 Lingrui98 提交于
-
- 31 7月, 2020 4 次提交
-
-
由 zhanglinjuan 提交于
-
由 zhanglinjuan 提交于
-
由 zhanglinjuan 提交于
-
由 Fa_wang 提交于
-
- 30 7月, 2020 1 次提交
-
-
由 Fa_wang 提交于
-
- 29 7月, 2020 2 次提交
- 28 7月, 2020 1 次提交
-
-
由 Fa_wang 提交于
-