Coverage

ifu: add icacheResp.valid to the conditions of if3_prevHalfInstrMet

So that different will write to different dat.
Now, we can run multiple emu at the same time.

Coverage

roq, icache, storeUnit, emu, dtlb: bug fixes

Ifu timing

build/coverage.log.

sbuffer: response forward mask and data in the next clock cycle

load/store: split memory violation checking into two cycles

ci: add coremark test