load omit conficted bytes check

when stores in flight

src/test/scala/cache/L1DTest/CoreAgent.scala

@@ -6,6 +6,7 @@ import chipsalliance.rocketchip.config.Parameters
 import scala.collection.mutable
 import scala.collection.mutable.{ArrayBuffer, ListBuffer}
 
+//!!! for coreAgent, load resp must be fired before store resp
 class CoreAgent(ID: Int, name: String, addrStateMap: mutable.Map[BigInt, AddrState], serialList: ArrayBuffer[(Int, TLCTrans)]
                 , scoreboard: mutable.Map[BigInt, ScoreboardData], portNum: Int = 2)
                (implicit p: Parameters) extends TLCAgent(ID, name, addrStateMap, serialList, scoreboard) with LitMemOp {
@@ -68,7 +69,18 @@ class CoreAgent(ID: Int, name: String, addrStateMap: mutable.Map[BigInt, AddrSta
     val loadAddr = loadT.req.get.addr
     loadT.pairLoadResp(resp)
     if (!resp.miss) {
-      insertMaskedWordRead(loadAddr, resp.data, loadT.req.get.mask)
+      //search store list for addr conflict
+      val alignLoadAddr = addrAlignBlock(loadAddr)
+      val conflictMask = storeIdMap.foldLeft(BigInt(0))((b, kv) =>
+        if (kv._2.req.get.addr == alignLoadAddr) {
+          b | kv._2.req.get.mask
+        }
+        else
+          b
+      )
+      val conflictWordMask = maskOutOfWord(conflictMask, wordInBlock(loadAddr))
+      val newMask = (loadT.req.get.mask | conflictWordMask) ^ conflictWordMask
+      insertMaskedWordRead(loadAddr, resp.data, newMask)
       outerLoad -= loadT
     }
     else if (resp.replay) {

src/test/scala/cache/TLCTest/TLCAgent.scala

@@ -226,6 +226,10 @@ class TLCAgent(ID: Int, name: String = "", addrStateMap: mutable.Map[BigInt, Add
     oldMask | (inMask << (cnt * wordBytes))
   }
 
+  def maskOutOfWord(mask: BigInt, cnt: Int): BigInt = {
+    mask >> (cnt * wordBytes)
+  }
+
   def beatInBlock(addr: BigInt): Int = {
     ((addr & offsetMask) >> beatAddrBits).toInt
   }