add debug info into TLTimer

src/main/scala/device/TLTimer.scala

@@ -8,7 +8,7 @@ import chipsalliance.rocketchip.config._
 import chisel3.util.experimental.BoringUtils
 import freechips.rocketchip.diplomacy._
 import freechips.rocketchip.regmapper.{RegField, RegWriteFn}
-import utils.{HoldUnless, MaskExpand, RegMap}
+import utils.{GTimer, HoldUnless, MaskExpand, RegMap}
 
 class TLTimer(address: Seq[AddressSet], sim: Boolean)(implicit p: Parameters) extends LazyModule {
 
@@ -44,7 +44,8 @@ class TLTimer(address: Seq[AddressSet], sim: Boolean)(implicit p: Parameters) ex
       0xbff8 -> RegField.bytes(mtime)
     )
 
-    printf(p"[Timer] mtime=$mtime cnt=$cnt freq=$freq\n")
+    val gtime = GTimer()
+    printf(p"[$gtime][Timer] mtime=$mtime cnt=$cnt freq=$freq\n")
 
     mtip := RegNext(mtime >= mtimecmp)
   }

src/main/scala/utils/DebugIdentityNode.scala

@@ -18,13 +18,14 @@ class DebugIdentityNode()(implicit p: Parameters) extends LazyModule {
   lazy val module = new LazyModuleImp(this){
     val (out, _) = node.out(0)
     val (in, _) = node.in(0)
+    val timer = GTimer()
     when(in.a.fire()){
-      printf(p"[A] addr: ${Hexadecimal(in.a.bits.address)} " +
-        p"opcode: ${in.a.bits.opcode} data: ${Hexadecimal(in.a.bits.data)}\n"
+      printf(p"[$timer][A] addr: ${Hexadecimal(in.a.bits.address)} " +
+        p"opcode: ${in.a.bits.opcode} data: ${Hexadecimal(in.a.bits.data)} size: ${in.a.bits.size} source: ${in.a.bits.source}\n"
       )
     }
     when(in.d.fire()){
-      printf(p"[D] opcode: ${in.d.bits.opcode} data: ${Hexadecimal(in.d.bits.data)}\n")
+      printf(p"[$timer][D] opcode: ${in.d.bits.opcode} data: ${Hexadecimal(in.d.bits.data)} size:${in.d.bits.size} source: ${in.d.bits.source}\n")
     }
   }
 }