util: fix L2DB exists under FPGAPlatform (#2246)

* util: fix L2DB exists under FPGAPlatform * util: fix L2DB exists under FPGAPlatform #2

util: fix L2DB exists under FPGAPlatform (#2246)
* util: fix L2DB exists under FPGAPlatform * util: fix L2DB exists under FPGAPlatform #2
7b8f8f03 · Chen Xi · GitHub · 7fce8078 · e175f13c · cbd1d461
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Showing with 5 addition and 2 deletion

coupledL2 coupledL2 +1 -1

src/main/scala/xiangshan/XSTile.scala src/main/scala/xiangshan/XSTile.scala +4 -1

未找到文件。
--- a/coupledL2 @ e175f13c
+++ b/coupledL2 @ e175f13c
-Subproject commit cbd1d461fd7d5e002c10e7cc298bb2b82f4dbf90
+Subproject commit e175f13c8ab7f37aef3a6bd5ab0256b93b57405a
--- a/src/main/scala/xiangshan/XSTile.scala
+++ b/src/main/scala/xiangshan/XSTile.scala
@@ -96,7 +96,10 @@ class XSTile()(implicit p: Parameters) extends LazyModule
  private val misc = LazyModule(new XSTileMisc())
  private val l2cache = coreParams.L2CacheParamsOpt.map(l2param =>
    LazyModule(new CoupledL2()(new Config((_, _, _) => {
-      case L2ParamKey => l2param.copy(hartIds = Seq(p(XSCoreParamsKey).HartId))
+      case L2ParamKey => l2param.copy(
+        hartIds = Seq(p(XSCoreParamsKey).HartId),
+        FPGAPlatform = debugOpts.FPGAPlatform
+      )
    })))
  )