sdhci.c 47.6 KB
Newer Older
1
/*
P
Pierre Ossman 已提交
2
 *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
3
 *
4
 *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 6
 *
 * This program is free software; you can redistribute it and/or modify
7 8 9
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
10 11 12 13
 *
 * Thanks to the following companies for their support:
 *
 *     - JMicron (hardware and technical support)
14 15 16 17
 */

#include <linux/delay.h>
#include <linux/highmem.h>
18
#include <linux/io.h>
19
#include <linux/dma-mapping.h>
20
#include <linux/scatterlist.h>
21

22 23
#include <linux/leds.h>

24 25 26 27 28 29 30
#include <linux/mmc/host.h>

#include "sdhci.h"

#define DRIVER_NAME "sdhci"

#define DBG(f, x...) \
31
	pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32

33 34 35 36 37
#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
	defined(CONFIG_MMC_SDHCI_MODULE))
#define SDHCI_USE_LEDS_CLASS
#endif

38
static unsigned int debug_quirks = 0;
39

40 41 42 43 44 45 46 47 48 49 50
static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
static void sdhci_finish_data(struct sdhci_host *);

static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
static void sdhci_finish_command(struct sdhci_host *);

static void sdhci_dumpregs(struct sdhci_host *host)
{
	printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");

	printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
51 52
		sdhci_readl(host, SDHCI_DMA_ADDRESS),
		sdhci_readw(host, SDHCI_HOST_VERSION));
53
	printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
54 55
		sdhci_readw(host, SDHCI_BLOCK_SIZE),
		sdhci_readw(host, SDHCI_BLOCK_COUNT));
56
	printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
57 58
		sdhci_readl(host, SDHCI_ARGUMENT),
		sdhci_readw(host, SDHCI_TRANSFER_MODE));
59
	printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
60 61
		sdhci_readl(host, SDHCI_PRESENT_STATE),
		sdhci_readb(host, SDHCI_HOST_CONTROL));
62
	printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
63 64
		sdhci_readb(host, SDHCI_POWER_CONTROL),
		sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
65
	printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
66 67
		sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
		sdhci_readw(host, SDHCI_CLOCK_CONTROL));
68
	printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
69 70
		sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
		sdhci_readl(host, SDHCI_INT_STATUS));
71
	printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
72 73
		sdhci_readl(host, SDHCI_INT_ENABLE),
		sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
74
	printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
75 76
		sdhci_readw(host, SDHCI_ACMD12_ERR),
		sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
77
	printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
78 79
		sdhci_readl(host, SDHCI_CAPABILITIES),
		sdhci_readl(host, SDHCI_MAX_CURRENT));
80

81 82 83 84 85
	if (host->flags & SDHCI_USE_ADMA)
		printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
		       readl(host->ioaddr + SDHCI_ADMA_ERROR),
		       readl(host->ioaddr + SDHCI_ADMA_ADDRESS));

86 87 88 89 90 91 92 93 94
	printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
}

/*****************************************************************************\
 *                                                                           *
 * Low level functions                                                       *
 *                                                                           *
\*****************************************************************************/

95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
{
	u32 ier;

	ier = sdhci_readl(host, SDHCI_INT_ENABLE);
	ier &= ~clear;
	ier |= set;
	sdhci_writel(host, ier, SDHCI_INT_ENABLE);
	sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
}

static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
{
	sdhci_clear_set_irqs(host, 0, irqs);
}

static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
{
	sdhci_clear_set_irqs(host, irqs, 0);
}

static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
{
	u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;

120 121 122
	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		return;

123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138
	if (enable)
		sdhci_unmask_irqs(host, irqs);
	else
		sdhci_mask_irqs(host, irqs);
}

static void sdhci_enable_card_detection(struct sdhci_host *host)
{
	sdhci_set_card_detection(host, true);
}

static void sdhci_disable_card_detection(struct sdhci_host *host)
{
	sdhci_set_card_detection(host, false);
}

139 140
static void sdhci_reset(struct sdhci_host *host, u8 mask)
{
141
	unsigned long timeout;
142
	u32 uninitialized_var(ier);
143

144
	if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
145
		if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
146 147 148 149
			SDHCI_CARD_PRESENT))
			return;
	}

150 151 152
	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		ier = sdhci_readl(host, SDHCI_INT_ENABLE);

153
	sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
154

155
	if (mask & SDHCI_RESET_ALL)
156 157
		host->clock = 0;

158 159 160 161
	/* Wait max 100 ms */
	timeout = 100;

	/* hw clears the bit when it's done */
162
	while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
163
		if (timeout == 0) {
P
Pierre Ossman 已提交
164
			printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
165 166 167 168 169 170
				mmc_hostname(host->mmc), (int)mask);
			sdhci_dumpregs(host);
			return;
		}
		timeout--;
		mdelay(1);
171
	}
172 173 174

	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier);
175 176 177 178 179 180
}

static void sdhci_init(struct sdhci_host *host)
{
	sdhci_reset(host, SDHCI_RESET_ALL);

181 182
	sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
		SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
183 184
		SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
		SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
185
		SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
186
}
187

188 189 190 191
static void sdhci_reinit(struct sdhci_host *host)
{
	sdhci_init(host);
	sdhci_enable_card_detection(host);
192 193 194 195 196 197
}

static void sdhci_activate_led(struct sdhci_host *host)
{
	u8 ctrl;

198
	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
199
	ctrl |= SDHCI_CTRL_LED;
200
	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
201 202 203 204 205 206
}

static void sdhci_deactivate_led(struct sdhci_host *host)
{
	u8 ctrl;

207
	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
208
	ctrl &= ~SDHCI_CTRL_LED;
209
	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
210 211
}

212
#ifdef SDHCI_USE_LEDS_CLASS
213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229
static void sdhci_led_control(struct led_classdev *led,
	enum led_brightness brightness)
{
	struct sdhci_host *host = container_of(led, struct sdhci_host, led);
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);

	if (brightness == LED_OFF)
		sdhci_deactivate_led(host);
	else
		sdhci_activate_led(host);

	spin_unlock_irqrestore(&host->lock, flags);
}
#endif

230 231 232 233 234 235
/*****************************************************************************\
 *                                                                           *
 * Core functions                                                            *
 *                                                                           *
\*****************************************************************************/

P
Pierre Ossman 已提交
236
static void sdhci_read_block_pio(struct sdhci_host *host)
237
{
238 239
	unsigned long flags;
	size_t blksize, len, chunk;
240
	u32 uninitialized_var(scratch);
241
	u8 *buf;
242

P
Pierre Ossman 已提交
243
	DBG("PIO reading\n");
244

P
Pierre Ossman 已提交
245
	blksize = host->data->blksz;
246
	chunk = 0;
247

248
	local_irq_save(flags);
249

P
Pierre Ossman 已提交
250
	while (blksize) {
251 252
		if (!sg_miter_next(&host->sg_miter))
			BUG();
253

254
		len = min(host->sg_miter.length, blksize);
255

256 257
		blksize -= len;
		host->sg_miter.consumed = len;
258

259
		buf = host->sg_miter.addr;
260

261 262
		while (len) {
			if (chunk == 0) {
263
				scratch = sdhci_readl(host, SDHCI_BUFFER);
264
				chunk = 4;
P
Pierre Ossman 已提交
265
			}
266 267 268 269 270 271 272

			*buf = scratch & 0xFF;

			buf++;
			scratch >>= 8;
			chunk--;
			len--;
273
		}
P
Pierre Ossman 已提交
274
	}
275 276 277 278

	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
P
Pierre Ossman 已提交
279
}
280

P
Pierre Ossman 已提交
281 282
static void sdhci_write_block_pio(struct sdhci_host *host)
{
283 284 285 286
	unsigned long flags;
	size_t blksize, len, chunk;
	u32 scratch;
	u8 *buf;
287

P
Pierre Ossman 已提交
288 289 290
	DBG("PIO writing\n");

	blksize = host->data->blksz;
291 292
	chunk = 0;
	scratch = 0;
293

294
	local_irq_save(flags);
295

P
Pierre Ossman 已提交
296
	while (blksize) {
297 298
		if (!sg_miter_next(&host->sg_miter))
			BUG();
P
Pierre Ossman 已提交
299

300 301 302 303 304 305
		len = min(host->sg_miter.length, blksize);

		blksize -= len;
		host->sg_miter.consumed = len;

		buf = host->sg_miter.addr;
306

307 308 309 310 311 312 313 314
		while (len) {
			scratch |= (u32)*buf << (chunk * 8);

			buf++;
			chunk++;
			len--;

			if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
315
				sdhci_writel(host, scratch, SDHCI_BUFFER);
316 317
				chunk = 0;
				scratch = 0;
318 319 320
			}
		}
	}
321 322 323 324

	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
P
Pierre Ossman 已提交
325 326 327 328 329 330 331 332
}

static void sdhci_transfer_pio(struct sdhci_host *host)
{
	u32 mask;

	BUG_ON(!host->data);

333
	if (host->blocks == 0)
P
Pierre Ossman 已提交
334 335 336 337 338 339 340
		return;

	if (host->data->flags & MMC_DATA_READ)
		mask = SDHCI_DATA_AVAILABLE;
	else
		mask = SDHCI_SPACE_AVAILABLE;

341 342 343 344 345 346 347 348 349
	/*
	 * Some controllers (JMicron JMB38x) mess up the buffer bits
	 * for transfers < 4 bytes. As long as it is just one block,
	 * we can ignore the bits.
	 */
	if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
		(host->data->blocks == 1))
		mask = ~0;

350
	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
351 352 353
		if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
			udelay(100);

P
Pierre Ossman 已提交
354 355 356 357
		if (host->data->flags & MMC_DATA_READ)
			sdhci_read_block_pio(host);
		else
			sdhci_write_block_pio(host);
358

359 360
		host->blocks--;
		if (host->blocks == 0)
P
Pierre Ossman 已提交
361 362
			break;
	}
363

P
Pierre Ossman 已提交
364
	DBG("PIO transfer complete.\n");
365 366
}

367 368 369 370 371 372 373 374 375 376 377 378
static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
{
	local_irq_save(*flags);
	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
}

static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
{
	kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
	local_irq_restore(*flags);
}

379
static int sdhci_adma_table_pre(struct sdhci_host *host,
380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411
	struct mmc_data *data)
{
	int direction;

	u8 *desc;
	u8 *align;
	dma_addr_t addr;
	dma_addr_t align_addr;
	int len, offset;

	struct scatterlist *sg;
	int i;
	char *buffer;
	unsigned long flags;

	/*
	 * The spec does not specify endianness of descriptor table.
	 * We currently guess that it is LE.
	 */

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	/*
	 * The ADMA descriptor table is mapped further down as we
	 * need to fill it with data first.
	 */

	host->align_addr = dma_map_single(mmc_dev(host->mmc),
		host->align_buffer, 128 * 4, direction);
412
	if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
413
		goto fail;
414 415 416 417
	BUG_ON(host->align_addr & 0x3);

	host->sg_count = dma_map_sg(mmc_dev(host->mmc),
		data->sg, data->sg_len, direction);
418 419
	if (host->sg_count == 0)
		goto unmap_align;
420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440

	desc = host->adma_desc;
	align = host->align_buffer;

	align_addr = host->align_addr;

	for_each_sg(data->sg, sg, host->sg_count, i) {
		addr = sg_dma_address(sg);
		len = sg_dma_len(sg);

		/*
		 * The SDHCI specification states that ADMA
		 * addresses must be 32-bit aligned. If they
		 * aren't, then we use a bounce buffer for
		 * the (up to three) bytes that screw up the
		 * alignment.
		 */
		offset = (4 - (addr & 0x3)) & 0x3;
		if (offset) {
			if (data->flags & MMC_DATA_WRITE) {
				buffer = sdhci_kmap_atomic(sg, &flags);
441
				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513
				memcpy(align, buffer, offset);
				sdhci_kunmap_atomic(buffer, &flags);
			}

			desc[7] = (align_addr >> 24) & 0xff;
			desc[6] = (align_addr >> 16) & 0xff;
			desc[5] = (align_addr >> 8) & 0xff;
			desc[4] = (align_addr >> 0) & 0xff;

			BUG_ON(offset > 65536);

			desc[3] = (offset >> 8) & 0xff;
			desc[2] = (offset >> 0) & 0xff;

			desc[1] = 0x00;
			desc[0] = 0x21; /* tran, valid */

			align += 4;
			align_addr += 4;

			desc += 8;

			addr += offset;
			len -= offset;
		}

		desc[7] = (addr >> 24) & 0xff;
		desc[6] = (addr >> 16) & 0xff;
		desc[5] = (addr >> 8) & 0xff;
		desc[4] = (addr >> 0) & 0xff;

		BUG_ON(len > 65536);

		desc[3] = (len >> 8) & 0xff;
		desc[2] = (len >> 0) & 0xff;

		desc[1] = 0x00;
		desc[0] = 0x21; /* tran, valid */

		desc += 8;

		/*
		 * If this triggers then we have a calculation bug
		 * somewhere. :/
		 */
		WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
	}

	/*
	 * Add a terminating entry.
	 */
	desc[7] = 0;
	desc[6] = 0;
	desc[5] = 0;
	desc[4] = 0;

	desc[3] = 0;
	desc[2] = 0;

	desc[1] = 0x00;
	desc[0] = 0x03; /* nop, end, valid */

	/*
	 * Resync align buffer as we might have changed it.
	 */
	if (data->flags & MMC_DATA_WRITE) {
		dma_sync_single_for_device(mmc_dev(host->mmc),
			host->align_addr, 128 * 4, direction);
	}

	host->adma_addr = dma_map_single(mmc_dev(host->mmc),
		host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
514
	if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
515
		goto unmap_entries;
516
	BUG_ON(host->adma_addr & 0x3);
517 518 519 520 521 522 523 524 525 526 527

	return 0;

unmap_entries:
	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
unmap_align:
	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);
fail:
	return -EINVAL;
528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562
}

static void sdhci_adma_table_post(struct sdhci_host *host,
	struct mmc_data *data)
{
	int direction;

	struct scatterlist *sg;
	int i, size;
	u8 *align;
	char *buffer;
	unsigned long flags;

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
		(128 * 2 + 1) * 4, DMA_TO_DEVICE);

	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);

	if (data->flags & MMC_DATA_READ) {
		dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
			data->sg_len, direction);

		align = host->align_buffer;

		for_each_sg(data->sg, sg, host->sg_count, i) {
			if (sg_dma_address(sg) & 0x3) {
				size = 4 - (sg_dma_address(sg) & 0x3);

				buffer = sdhci_kmap_atomic(sg, &flags);
563
				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
564 565 566 567 568 569 570 571 572 573 574 575
				memcpy(buffer, align, size);
				sdhci_kunmap_atomic(buffer, &flags);

				align += 4;
			}
		}
	}

	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
}

576
static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
577
{
578 579
	u8 count;
	unsigned target_timeout, current_timeout;
580

581 582 583 584 585 586
	/*
	 * If the host controller provides us with an incorrect timeout
	 * value, just skip the check and use 0xE.  The hardware may take
	 * longer to time out, but that's much better than having a too-short
	 * timeout value.
	 */
587
	if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL)
588
		return 0xE;
589

590 591 592
	/* timeout in us */
	target_timeout = data->timeout_ns / 1000 +
		data->timeout_clks / host->clock;
593

594 595 596
	if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)
		host->timeout_clk = host->clock / 1000;

597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621
	/*
	 * Figure out needed cycles.
	 * We do this in steps in order to fit inside a 32 bit int.
	 * The first step is the minimum timeout, which will have a
	 * minimum resolution of 6 bits:
	 * (1) 2^13*1000 > 2^22,
	 * (2) host->timeout_clk < 2^16
	 *     =>
	 *     (1) / (2) > 2^6
	 */
	count = 0;
	current_timeout = (1 << 13) * 1000 / host->timeout_clk;
	while (current_timeout < target_timeout) {
		count++;
		current_timeout <<= 1;
		if (count >= 0xF)
			break;
	}

	if (count >= 0xF) {
		printk(KERN_WARNING "%s: Too large timeout requested!\n",
			mmc_hostname(host->mmc));
		count = 0xE;
	}

622 623 624
	return count;
}

625 626 627 628 629 630 631 632 633 634 635
static void sdhci_set_transfer_irqs(struct sdhci_host *host)
{
	u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
	u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;

	if (host->flags & SDHCI_REQ_USE_DMA)
		sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
	else
		sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
}

636 637 638
static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
{
	u8 count;
639
	u8 ctrl;
640
	int ret;
641 642 643 644 645 646 647 648 649 650 651 652 653 654 655

	WARN_ON(host->data);

	if (data == NULL)
		return;

	/* Sanity checks */
	BUG_ON(data->blksz * data->blocks > 524288);
	BUG_ON(data->blksz > host->mmc->max_blk_size);
	BUG_ON(data->blocks > 65535);

	host->data = data;
	host->data_early = 0;

	count = sdhci_calc_timeout(host, data);
656
	sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
657

658 659 660
	if (host->flags & SDHCI_USE_DMA)
		host->flags |= SDHCI_REQ_USE_DMA;

661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688
	/*
	 * FIXME: This doesn't account for merging when mapping the
	 * scatterlist.
	 */
	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->length & 0x3) {
					DBG("Reverting to PIO because of "
						"transfer size (%d)\n",
						sg->length);
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
689 690 691 692 693 694
	}

	/*
	 * The assumption here being that alignment is the same after
	 * translation to device address space.
	 */
695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724
	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			/*
			 * As we use 3 byte chunks to work around
			 * alignment problems, we need to check this
			 * quirk.
			 */
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->offset & 0x3) {
					DBG("Reverting to PIO because of "
						"bad alignment\n");
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
	}

725 726 727 728 729 730 731 732 733
	if (host->flags & SDHCI_REQ_USE_DMA) {
		if (host->flags & SDHCI_USE_ADMA) {
			ret = sdhci_adma_table_pre(host, data);
			if (ret) {
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
734
				host->flags &= ~SDHCI_REQ_USE_DMA;
735
			} else {
736 737
				sdhci_writel(host, host->adma_addr,
					SDHCI_ADMA_ADDRESS);
738 739
			}
		} else {
740
			int sg_cnt;
741

742
			sg_cnt = dma_map_sg(mmc_dev(host->mmc),
743 744 745 746
					data->sg, data->sg_len,
					(data->flags & MMC_DATA_READ) ?
						DMA_FROM_DEVICE :
						DMA_TO_DEVICE);
747
			if (sg_cnt == 0) {
748 749 750 751 752
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
753
				host->flags &= ~SDHCI_REQ_USE_DMA;
754
			} else {
755
				WARN_ON(sg_cnt != 1);
756 757
				sdhci_writel(host, sg_dma_address(data->sg),
					SDHCI_DMA_ADDRESS);
758 759 760 761
			}
		}
	}

762 763 764 765 766 767
	/*
	 * Always adjust the DMA selection as some controllers
	 * (e.g. JMicron) can't do PIO properly when the selection
	 * is ADMA.
	 */
	if (host->version >= SDHCI_SPEC_200) {
768
		ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
769 770 771 772 773 774
		ctrl &= ~SDHCI_CTRL_DMA_MASK;
		if ((host->flags & SDHCI_REQ_USE_DMA) &&
			(host->flags & SDHCI_USE_ADMA))
			ctrl |= SDHCI_CTRL_ADMA32;
		else
			ctrl |= SDHCI_CTRL_SDMA;
775
		sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
776 777
	}

778
	if (!(host->flags & SDHCI_REQ_USE_DMA)) {
779 780 781 782 783 784 785 786
		int flags;

		flags = SG_MITER_ATOMIC;
		if (host->data->flags & MMC_DATA_READ)
			flags |= SG_MITER_TO_SG;
		else
			flags |= SG_MITER_FROM_SG;
		sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
787
		host->blocks = data->blocks;
788
	}
789

790 791
	sdhci_set_transfer_irqs(host);

792
	/* We do not handle DMA boundaries, so set it to max (512 KiB) */
793 794
	sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
	sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
795 796 797 798 799 800 801 802 803 804
}

static void sdhci_set_transfer_mode(struct sdhci_host *host,
	struct mmc_data *data)
{
	u16 mode;

	if (data == NULL)
		return;

805 806
	WARN_ON(!host->data);

807 808 809 810 811
	mode = SDHCI_TRNS_BLK_CNT_EN;
	if (data->blocks > 1)
		mode |= SDHCI_TRNS_MULTI;
	if (data->flags & MMC_DATA_READ)
		mode |= SDHCI_TRNS_READ;
812
	if (host->flags & SDHCI_REQ_USE_DMA)
813 814
		mode |= SDHCI_TRNS_DMA;

815
	sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
816 817 818 819 820 821 822 823 824 825 826
}

static void sdhci_finish_data(struct sdhci_host *host)
{
	struct mmc_data *data;

	BUG_ON(!host->data);

	data = host->data;
	host->data = NULL;

827
	if (host->flags & SDHCI_REQ_USE_DMA) {
828 829 830 831 832 833 834
		if (host->flags & SDHCI_USE_ADMA)
			sdhci_adma_table_post(host, data);
		else {
			dma_unmap_sg(mmc_dev(host->mmc), data->sg,
				data->sg_len, (data->flags & MMC_DATA_READ) ?
					DMA_FROM_DEVICE : DMA_TO_DEVICE);
		}
835 836 837
	}

	/*
838 839 840 841 842
	 * The specification states that the block count register must
	 * be updated, but it does not specify at what point in the
	 * data flow. That makes the register entirely useless to read
	 * back so we have to assume that nothing made it to the card
	 * in the event of an error.
843
	 */
844 845
	if (data->error)
		data->bytes_xfered = 0;
846
	else
847
		data->bytes_xfered = data->blksz * data->blocks;
848 849 850 851 852 853

	if (data->stop) {
		/*
		 * The controller needs a reset of internal state machines
		 * upon error conditions.
		 */
P
Pierre Ossman 已提交
854
		if (data->error) {
855 856 857 858 859 860 861 862 863 864 865 866
			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);
		}

		sdhci_send_command(host, data->stop);
	} else
		tasklet_schedule(&host->finish_tasklet);
}

static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
{
	int flags;
867
	u32 mask;
868
	unsigned long timeout;
869 870 871 872

	WARN_ON(host->cmd);

	/* Wait max 10 ms */
873
	timeout = 10;
874 875 876 877 878 879 880 881 882 883

	mask = SDHCI_CMD_INHIBIT;
	if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
		mask |= SDHCI_DATA_INHIBIT;

	/* We shouldn't wait for data inihibit for stop commands, even
	   though they might use busy signaling */
	if (host->mrq->data && (cmd == host->mrq->data->stop))
		mask &= ~SDHCI_DATA_INHIBIT;

884
	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
885
		if (timeout == 0) {
886
			printk(KERN_ERR "%s: Controller never released "
P
Pierre Ossman 已提交
887
				"inhibit bit(s).\n", mmc_hostname(host->mmc));
888
			sdhci_dumpregs(host);
P
Pierre Ossman 已提交
889
			cmd->error = -EIO;
890 891 892
			tasklet_schedule(&host->finish_tasklet);
			return;
		}
893 894 895
		timeout--;
		mdelay(1);
	}
896 897 898 899 900 901 902

	mod_timer(&host->timer, jiffies + 10 * HZ);

	host->cmd = cmd;

	sdhci_prepare_data(host, cmd->data);

903
	sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
904

905 906
	sdhci_set_transfer_mode(host, cmd->data);

907
	if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
P
Pierre Ossman 已提交
908
		printk(KERN_ERR "%s: Unsupported response type!\n",
909
			mmc_hostname(host->mmc));
P
Pierre Ossman 已提交
910
		cmd->error = -EINVAL;
911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930
		tasklet_schedule(&host->finish_tasklet);
		return;
	}

	if (!(cmd->flags & MMC_RSP_PRESENT))
		flags = SDHCI_CMD_RESP_NONE;
	else if (cmd->flags & MMC_RSP_136)
		flags = SDHCI_CMD_RESP_LONG;
	else if (cmd->flags & MMC_RSP_BUSY)
		flags = SDHCI_CMD_RESP_SHORT_BUSY;
	else
		flags = SDHCI_CMD_RESP_SHORT;

	if (cmd->flags & MMC_RSP_CRC)
		flags |= SDHCI_CMD_CRC;
	if (cmd->flags & MMC_RSP_OPCODE)
		flags |= SDHCI_CMD_INDEX;
	if (cmd->data)
		flags |= SDHCI_CMD_DATA;

931
	sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
932 933 934 935 936 937 938 939 940 941 942 943
}

static void sdhci_finish_command(struct sdhci_host *host)
{
	int i;

	BUG_ON(host->cmd == NULL);

	if (host->cmd->flags & MMC_RSP_PRESENT) {
		if (host->cmd->flags & MMC_RSP_136) {
			/* CRC is stripped so we need to do some shifting. */
			for (i = 0;i < 4;i++) {
944
				host->cmd->resp[i] = sdhci_readl(host,
945 946 947
					SDHCI_RESPONSE + (3-i)*4) << 8;
				if (i != 3)
					host->cmd->resp[i] |=
948
						sdhci_readb(host,
949 950 951
						SDHCI_RESPONSE + (3-i)*4-1);
			}
		} else {
952
			host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
953 954 955
		}
	}

P
Pierre Ossman 已提交
956
	host->cmd->error = 0;
957

958 959 960 961
	if (host->data && host->data_early)
		sdhci_finish_data(host);

	if (!host->cmd->data)
962 963 964 965 966 967 968 969 970
		tasklet_schedule(&host->finish_tasklet);

	host->cmd = NULL;
}

static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
{
	int div;
	u16 clk;
971
	unsigned long timeout;
972 973 974 975

	if (clock == host->clock)
		return;

976 977 978 979 980 981
	if (host->ops->set_clock) {
		host->ops->set_clock(host, clock);
		if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
			return;
	}

982
	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
983 984 985 986 987 988 989 990 991 992 993 994

	if (clock == 0)
		goto out;

	for (div = 1;div < 256;div *= 2) {
		if ((host->max_clk / div) <= clock)
			break;
	}
	div >>= 1;

	clk = div << SDHCI_DIVIDER_SHIFT;
	clk |= SDHCI_CLOCK_INT_EN;
995
	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
996 997

	/* Wait max 10 ms */
998
	timeout = 10;
999
	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
1000 1001
		& SDHCI_CLOCK_INT_STABLE)) {
		if (timeout == 0) {
P
Pierre Ossman 已提交
1002 1003
			printk(KERN_ERR "%s: Internal clock never "
				"stabilised.\n", mmc_hostname(host->mmc));
1004 1005 1006
			sdhci_dumpregs(host);
			return;
		}
1007 1008 1009
		timeout--;
		mdelay(1);
	}
1010 1011

	clk |= SDHCI_CLOCK_CARD_EN;
1012
	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
1013 1014 1015 1016 1017

out:
	host->clock = clock;
}

1018 1019 1020 1021
static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
{
	u8 pwr;

1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042
	if (power == (unsigned short)-1)
		pwr = 0;
	else {
		switch (1 << power) {
		case MMC_VDD_165_195:
			pwr = SDHCI_POWER_180;
			break;
		case MMC_VDD_29_30:
		case MMC_VDD_30_31:
			pwr = SDHCI_POWER_300;
			break;
		case MMC_VDD_32_33:
		case MMC_VDD_33_34:
			pwr = SDHCI_POWER_330;
			break;
		default:
			BUG();
		}
	}

	if (host->pwr == pwr)
1043 1044
		return;

1045 1046 1047
	host->pwr = pwr;

	if (pwr == 0) {
1048
		sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1049
		return;
1050 1051 1052 1053 1054 1055
	}

	/*
	 * Spec says that we should clear the power reg before setting
	 * a new value. Some controllers don't seem to like this though.
	 */
1056
	if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1057
		sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1058

1059
	/*
1060
	 * At least the Marvell CaFe chip gets confused if we set the voltage
1061 1062
	 * and set turn on power at the same time, so set the voltage first.
	 */
1063
	if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
1064
		sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1065

1066
	pwr |= SDHCI_POWER_ON;
1067

1068
	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1069 1070 1071 1072 1073

	/*
	 * Some controllers need an extra 10ms delay of 10ms before they
	 * can apply clock after applying power
	 */
1074
	if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
1075
		mdelay(10);
1076 1077
}

1078 1079 1080 1081 1082 1083 1084 1085 1086
/*****************************************************************************\
 *                                                                           *
 * MMC callbacks                                                             *
 *                                                                           *
\*****************************************************************************/

static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct sdhci_host *host;
1087
	bool present;
1088 1089 1090 1091 1092 1093 1094 1095
	unsigned long flags;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

	WARN_ON(host->mrq != NULL);

1096
#ifndef SDHCI_USE_LEDS_CLASS
1097
	sdhci_activate_led(host);
1098
#endif
1099 1100 1101

	host->mrq = mrq;

1102 1103 1104 1105 1106 1107 1108 1109
	/* If polling, assume that the card is always present. */
	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		present = true;
	else
		present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
				SDHCI_CARD_PRESENT;

	if (!present || host->flags & SDHCI_DEVICE_DEAD) {
P
Pierre Ossman 已提交
1110
		host->mrq->cmd->error = -ENOMEDIUM;
1111 1112 1113 1114
		tasklet_schedule(&host->finish_tasklet);
	} else
		sdhci_send_command(host, mrq->cmd);

1115
	mmiowb();
1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
	spin_unlock_irqrestore(&host->lock, flags);
}

static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct sdhci_host *host;
	unsigned long flags;
	u8 ctrl;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1129 1130 1131
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

1132 1133 1134 1135 1136
	/*
	 * Reset the chip on each power off.
	 * Should clear out any weird states.
	 */
	if (ios->power_mode == MMC_POWER_OFF) {
1137
		sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1138
		sdhci_reinit(host);
1139 1140 1141 1142 1143
	}

	sdhci_set_clock(host, ios->clock);

	if (ios->power_mode == MMC_POWER_OFF)
1144
		sdhci_set_power(host, -1);
1145
	else
1146
		sdhci_set_power(host, ios->vdd);
1147

1148
	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1149

1150 1151 1152 1153
	if (ios->bus_width == MMC_BUS_WIDTH_4)
		ctrl |= SDHCI_CTRL_4BITBUS;
	else
		ctrl &= ~SDHCI_CTRL_4BITBUS;
1154 1155 1156 1157 1158 1159

	if (ios->timing == MMC_TIMING_SD_HS)
		ctrl |= SDHCI_CTRL_HISPD;
	else
		ctrl &= ~SDHCI_CTRL_HISPD;

1160
	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1161

1162 1163 1164 1165 1166
	/*
	 * Some (ENE) controllers go apeshit on some ios operation,
	 * signalling timeout and CRC errors even on CMD0. Resetting
	 * it on each ios seems to solve the problem.
	 */
1167
	if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1168 1169
		sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1170
out:
1171
	mmiowb();
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184
	spin_unlock_irqrestore(&host->lock, flags);
}

static int sdhci_get_ro(struct mmc_host *mmc)
{
	struct sdhci_host *host;
	unsigned long flags;
	int present;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1185 1186 1187
	if (host->flags & SDHCI_DEVICE_DEAD)
		present = 0;
	else
1188
		present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1189 1190 1191

	spin_unlock_irqrestore(&host->lock, flags);

1192 1193
	if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)
		return !!(present & SDHCI_WRITE_PROTECT);
1194 1195 1196
	return !(present & SDHCI_WRITE_PROTECT);
}

P
Pierre Ossman 已提交
1197 1198 1199 1200 1201 1202 1203 1204 1205
static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1206 1207 1208
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

P
Pierre Ossman 已提交
1209
	if (enable)
1210 1211 1212
		sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
	else
		sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
P
Pierre Ossman 已提交
1213
out:
P
Pierre Ossman 已提交
1214 1215 1216 1217 1218
	mmiowb();

	spin_unlock_irqrestore(&host->lock, flags);
}

1219
static const struct mmc_host_ops sdhci_ops = {
1220 1221 1222
	.request	= sdhci_request,
	.set_ios	= sdhci_set_ios,
	.get_ro		= sdhci_get_ro,
P
Pierre Ossman 已提交
1223
	.enable_sdio_irq = sdhci_enable_sdio_irq,
1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240
};

/*****************************************************************************\
 *                                                                           *
 * Tasklets                                                                  *
 *                                                                           *
\*****************************************************************************/

static void sdhci_tasklet_card(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

1241
	if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1242 1243 1244 1245 1246 1247 1248 1249 1250
		if (host->mrq) {
			printk(KERN_ERR "%s: Card removed during transfer!\n",
				mmc_hostname(host->mmc));
			printk(KERN_ERR "%s: Resetting controller.\n",
				mmc_hostname(host->mmc));

			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1251
			host->mrq->cmd->error = -ENOMEDIUM;
1252 1253 1254 1255 1256 1257
			tasklet_schedule(&host->finish_tasklet);
		}
	}

	spin_unlock_irqrestore(&host->lock, flags);

P
Pierre Ossman 已提交
1258
	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278
}

static void sdhci_tasklet_finish(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;
	struct mmc_request *mrq;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

	del_timer(&host->timer);

	mrq = host->mrq;

	/*
	 * The controller needs a reset of internal state machines
	 * upon error conditions.
	 */
P
Pierre Ossman 已提交
1279 1280 1281 1282 1283
	if (!(host->flags & SDHCI_DEVICE_DEAD) &&
		(mrq->cmd->error ||
		 (mrq->data && (mrq->data->error ||
		  (mrq->data->stop && mrq->data->stop->error))) ||
		   (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1284 1285

		/* Some controllers need this kick or reset won't work here */
1286
		if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1287 1288 1289 1290 1291 1292 1293 1294 1295 1296
			unsigned int clock;

			/* This is to force an update */
			clock = host->clock;
			host->clock = 0;
			sdhci_set_clock(host, clock);
		}

		/* Spec says we should do both at the same time, but Ricoh
		   controllers do not like that. */
1297 1298 1299 1300 1301 1302 1303 1304
		sdhci_reset(host, SDHCI_RESET_CMD);
		sdhci_reset(host, SDHCI_RESET_DATA);
	}

	host->mrq = NULL;
	host->cmd = NULL;
	host->data = NULL;

1305
#ifndef SDHCI_USE_LEDS_CLASS
1306
	sdhci_deactivate_led(host);
1307
#endif
1308

1309
	mmiowb();
1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324
	spin_unlock_irqrestore(&host->lock, flags);

	mmc_request_done(host->mmc, mrq);
}

static void sdhci_timeout_timer(unsigned long data)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)data;

	spin_lock_irqsave(&host->lock, flags);

	if (host->mrq) {
P
Pierre Ossman 已提交
1325 1326
		printk(KERN_ERR "%s: Timeout waiting for hardware "
			"interrupt.\n", mmc_hostname(host->mmc));
1327 1328 1329
		sdhci_dumpregs(host);

		if (host->data) {
P
Pierre Ossman 已提交
1330
			host->data->error = -ETIMEDOUT;
1331 1332 1333
			sdhci_finish_data(host);
		} else {
			if (host->cmd)
P
Pierre Ossman 已提交
1334
				host->cmd->error = -ETIMEDOUT;
1335
			else
P
Pierre Ossman 已提交
1336
				host->mrq->cmd->error = -ETIMEDOUT;
1337 1338 1339 1340 1341

			tasklet_schedule(&host->finish_tasklet);
		}
	}

1342
	mmiowb();
1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356
	spin_unlock_irqrestore(&host->lock, flags);
}

/*****************************************************************************\
 *                                                                           *
 * Interrupt handling                                                        *
 *                                                                           *
\*****************************************************************************/

static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->cmd) {
1357 1358 1359
		printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
			"though no command operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1360 1361 1362 1363
		sdhci_dumpregs(host);
		return;
	}

1364
	if (intmask & SDHCI_INT_TIMEOUT)
P
Pierre Ossman 已提交
1365 1366 1367 1368
		host->cmd->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
			SDHCI_INT_INDEX))
		host->cmd->error = -EILSEQ;
1369

1370
	if (host->cmd->error) {
1371
		tasklet_schedule(&host->finish_tasklet);
1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389
		return;
	}

	/*
	 * The host can send and interrupt when the busy state has
	 * ended, allowing us to wait without wasting CPU cycles.
	 * Unfortunately this is overloaded on the "data complete"
	 * interrupt, so we need to take some care when handling
	 * it.
	 *
	 * Note: The 1.0 specification is a bit ambiguous about this
	 *       feature so there might be some problems with older
	 *       controllers.
	 */
	if (host->cmd->flags & MMC_RSP_BUSY) {
		if (host->cmd->data)
			DBG("Cannot wait for busy signal when also "
				"doing a data transfer");
1390
		else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1391
			return;
1392 1393 1394

		/* The controller does not support the end-of-busy IRQ,
		 * fall through and take the SDHCI_INT_RESPONSE */
1395 1396 1397
	}

	if (intmask & SDHCI_INT_RESPONSE)
1398
		sdhci_finish_command(host);
1399 1400
}

1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429
#ifdef DEBUG
static void sdhci_show_adma_error(struct sdhci_host *host)
{
	const char *name = mmc_hostname(host->mmc);
	u8 *desc = host->adma_desc;
	__le32 *dma;
	__le16 *len;
	u8 attr;

	sdhci_dumpregs(host);

	while (true) {
		dma = (__le32 *)(desc + 4);
		len = (__le16 *)(desc + 2);
		attr = *desc;

		DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
		    name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr);

		desc += 8;

		if (attr & 2)
			break;
	}
}
#else
static void sdhci_show_adma_error(struct sdhci_host *host) { }
#endif

1430 1431 1432 1433 1434 1435
static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->data) {
		/*
1436 1437 1438
		 * The "data complete" interrupt is also used to
		 * indicate that a busy state has ended. See comment
		 * above in sdhci_cmd_irq().
1439
		 */
1440 1441 1442 1443 1444 1445
		if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
			if (intmask & SDHCI_INT_DATA_END) {
				sdhci_finish_command(host);
				return;
			}
		}
1446

1447 1448 1449
		printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
			"though no data operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1450 1451 1452 1453 1454 1455
		sdhci_dumpregs(host);

		return;
	}

	if (intmask & SDHCI_INT_DATA_TIMEOUT)
P
Pierre Ossman 已提交
1456 1457 1458
		host->data->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
		host->data->error = -EILSEQ;
1459 1460 1461
	else if (intmask & SDHCI_INT_ADMA_ERROR) {
		printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc));
		sdhci_show_adma_error(host);
1462
		host->data->error = -EIO;
1463
	}
1464

P
Pierre Ossman 已提交
1465
	if (host->data->error)
1466 1467
		sdhci_finish_data(host);
	else {
P
Pierre Ossman 已提交
1468
		if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1469 1470
			sdhci_transfer_pio(host);

1471 1472 1473 1474 1475 1476
		/*
		 * We currently don't do anything fancy with DMA
		 * boundaries, but as we can't disable the feature
		 * we need to at least restart the transfer.
		 */
		if (intmask & SDHCI_INT_DMA_END)
1477 1478
			sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
				SDHCI_DMA_ADDRESS);
1479

1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491
		if (intmask & SDHCI_INT_DATA_END) {
			if (host->cmd) {
				/*
				 * Data managed to finish before the
				 * command completed. Make sure we do
				 * things in the proper order.
				 */
				host->data_early = 1;
			} else {
				sdhci_finish_data(host);
			}
		}
1492 1493 1494
	}
}

1495
static irqreturn_t sdhci_irq(int irq, void *dev_id)
1496 1497 1498 1499
{
	irqreturn_t result;
	struct sdhci_host* host = dev_id;
	u32 intmask;
P
Pierre Ossman 已提交
1500
	int cardint = 0;
1501 1502 1503

	spin_lock(&host->lock);

1504
	intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1505

1506
	if (!intmask || intmask == 0xffffffff) {
1507 1508 1509 1510
		result = IRQ_NONE;
		goto out;
	}

1511 1512
	DBG("*** %s got interrupt: 0x%08x\n",
		mmc_hostname(host->mmc), intmask);
1513

1514
	if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1515 1516
		sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
			SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1517
		tasklet_schedule(&host->card_tasklet);
1518
	}
1519

1520
	intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1521

1522
	if (intmask & SDHCI_INT_CMD_MASK) {
1523 1524
		sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
			SDHCI_INT_STATUS);
1525
		sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1526 1527 1528
	}

	if (intmask & SDHCI_INT_DATA_MASK) {
1529 1530
		sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
			SDHCI_INT_STATUS);
1531
		sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1532 1533 1534 1535
	}

	intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);

1536 1537
	intmask &= ~SDHCI_INT_ERROR;

1538
	if (intmask & SDHCI_INT_BUS_POWER) {
1539
		printk(KERN_ERR "%s: Card is consuming too much power!\n",
1540
			mmc_hostname(host->mmc));
1541
		sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1542 1543
	}

1544
	intmask &= ~SDHCI_INT_BUS_POWER;
1545

P
Pierre Ossman 已提交
1546 1547 1548 1549 1550
	if (intmask & SDHCI_INT_CARD_INT)
		cardint = 1;

	intmask &= ~SDHCI_INT_CARD_INT;

1551
	if (intmask) {
P
Pierre Ossman 已提交
1552
		printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1553
			mmc_hostname(host->mmc), intmask);
1554 1555
		sdhci_dumpregs(host);

1556
		sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1557
	}
1558 1559 1560

	result = IRQ_HANDLED;

1561
	mmiowb();
1562 1563 1564
out:
	spin_unlock(&host->lock);

P
Pierre Ossman 已提交
1565 1566 1567 1568 1569 1570
	/*
	 * We have to delay this as it calls back into the driver.
	 */
	if (cardint)
		mmc_signal_sdio_irq(host->mmc);

1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581
	return result;
}

/*****************************************************************************\
 *                                                                           *
 * Suspend/resume                                                            *
 *                                                                           *
\*****************************************************************************/

#ifdef CONFIG_PM

1582
int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1583
{
1584
	int ret;
1585

1586 1587
	sdhci_disable_card_detection(host);

1588 1589 1590
	ret = mmc_suspend_host(host->mmc, state);
	if (ret)
		return ret;
1591

1592
	free_irq(host->irq, host);
1593 1594 1595 1596

	return 0;
}

1597
EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1598

1599 1600 1601
int sdhci_resume_host(struct sdhci_host *host)
{
	int ret;
1602

1603 1604 1605 1606
	if (host->flags & SDHCI_USE_DMA) {
		if (host->ops->enable_dma)
			host->ops->enable_dma(host);
	}
1607

1608 1609
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
			  mmc_hostname(host->mmc), host);
1610 1611
	if (ret)
		return ret;
1612

1613 1614 1615 1616 1617 1618
	sdhci_init(host);
	mmiowb();

	ret = mmc_resume_host(host->mmc);
	if (ret)
		return ret;
1619

1620 1621
	sdhci_enable_card_detection(host);

1622 1623 1624
	return 0;
}

1625
EXPORT_SYMBOL_GPL(sdhci_resume_host);
1626 1627 1628 1629 1630

#endif /* CONFIG_PM */

/*****************************************************************************\
 *                                                                           *
1631
 * Device allocation/registration                                            *
1632 1633 1634
 *                                                                           *
\*****************************************************************************/

1635 1636
struct sdhci_host *sdhci_alloc_host(struct device *dev,
	size_t priv_size)
1637 1638 1639 1640
{
	struct mmc_host *mmc;
	struct sdhci_host *host;

1641
	WARN_ON(dev == NULL);
1642

1643
	mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1644
	if (!mmc)
1645
		return ERR_PTR(-ENOMEM);
1646 1647 1648 1649

	host = mmc_priv(mmc);
	host->mmc = mmc;

1650 1651
	return host;
}
1652

1653
EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1654

1655 1656 1657 1658 1659
int sdhci_add_host(struct sdhci_host *host)
{
	struct mmc_host *mmc;
	unsigned int caps;
	int ret;
1660

1661 1662 1663
	WARN_ON(host == NULL);
	if (host == NULL)
		return -EINVAL;
1664

1665
	mmc = host->mmc;
1666

1667 1668
	if (debug_quirks)
		host->quirks = debug_quirks;
1669

1670 1671
	sdhci_reset(host, SDHCI_RESET_ALL);

1672
	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1673 1674 1675
	host->version = (host->version & SDHCI_SPEC_VER_MASK)
				>> SDHCI_SPEC_VER_SHIFT;
	if (host->version > SDHCI_SPEC_200) {
1676
		printk(KERN_ERR "%s: Unknown controller version (%d). "
1677
			"You may experience problems.\n", mmc_hostname(mmc),
1678
			host->version);
1679 1680
	}

1681
	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1682

1683
	if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1684
		host->flags |= SDHCI_USE_DMA;
1685 1686 1687
	else if (!(caps & SDHCI_CAN_DO_DMA))
		DBG("Controller doesn't have DMA capability\n");
	else
1688 1689
		host->flags |= SDHCI_USE_DMA;

1690
	if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1691
		(host->flags & SDHCI_USE_DMA)) {
R
Rolf Eike Beer 已提交
1692
		DBG("Disabling DMA as it is marked broken\n");
1693 1694 1695
		host->flags &= ~SDHCI_USE_DMA;
	}

1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707
	if (host->flags & SDHCI_USE_DMA) {
		if ((host->version >= SDHCI_SPEC_200) &&
				(caps & SDHCI_CAN_DO_ADMA2))
			host->flags |= SDHCI_USE_ADMA;
	}

	if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
		(host->flags & SDHCI_USE_ADMA)) {
		DBG("Disabling ADMA as it is marked broken\n");
		host->flags &= ~SDHCI_USE_ADMA;
	}

1708
	if (host->flags & SDHCI_USE_DMA) {
1709 1710 1711 1712 1713
		if (host->ops->enable_dma) {
			if (host->ops->enable_dma(host)) {
				printk(KERN_WARNING "%s: No suitable DMA "
					"available. Falling back to PIO.\n",
					mmc_hostname(mmc));
1714
				host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1715
			}
1716 1717 1718
		}
	}

1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736
	if (host->flags & SDHCI_USE_ADMA) {
		/*
		 * We need to allocate descriptors for all sg entries
		 * (128) and potentially one alignment transfer for
		 * each of those entries.
		 */
		host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
		host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
		if (!host->adma_desc || !host->align_buffer) {
			kfree(host->adma_desc);
			kfree(host->align_buffer);
			printk(KERN_WARNING "%s: Unable to allocate ADMA "
				"buffers. Falling back to standard DMA.\n",
				mmc_hostname(mmc));
			host->flags &= ~SDHCI_USE_ADMA;
		}
	}

1737 1738 1739 1740 1741 1742 1743 1744 1745
	/*
	 * If we use DMA, then it's up to the caller to set the DMA
	 * mask, but PIO does not need the hw shim so we set a new
	 * mask here in that case.
	 */
	if (!(host->flags & SDHCI_USE_DMA)) {
		host->dma_mask = DMA_BIT_MASK(64);
		mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
	}
1746

1747 1748
	host->max_clk =
		(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1749
	host->max_clk *= 1000000;
1750
	if (host->max_clk == 0) {
1751 1752 1753 1754 1755 1756 1757
		if (!host->ops->get_max_clock) {
			printk(KERN_ERR
			       "%s: Hardware doesn't specify base clock "
			       "frequency.\n", mmc_hostname(mmc));
			return -ENODEV;
		}
		host->max_clk = host->ops->get_max_clock(host);
1758
	}
1759

1760 1761 1762
	host->timeout_clk =
		(caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
	if (host->timeout_clk == 0) {
1763 1764 1765 1766
		if (host->ops->get_timeout_clock) {
			host->timeout_clk = host->ops->get_timeout_clock(host);
		} else if (!(host->quirks &
				SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
1767 1768 1769 1770 1771
			printk(KERN_ERR
			       "%s: Hardware doesn't specify timeout clock "
			       "frequency.\n", mmc_hostname(mmc));
			return -ENODEV;
		}
1772 1773 1774
	}
	if (caps & SDHCI_TIMEOUT_CLK_UNIT)
		host->timeout_clk *= 1000;
1775 1776 1777 1778 1779

	/*
	 * Set host parameters.
	 */
	mmc->ops = &sdhci_ops;
1780 1781
	if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK &&
			host->ops->set_clock && host->ops->get_min_clock)
1782 1783 1784
		mmc->f_min = host->ops->get_min_clock(host);
	else
		mmc->f_min = host->max_clk / 256;
1785
	mmc->f_max = host->max_clk;
1786 1787 1788 1789
	mmc->caps = MMC_CAP_SDIO_IRQ;

	if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
		mmc->caps |= MMC_CAP_4_BIT_DATA;
1790

1791
	if (caps & SDHCI_CAN_DO_HISPD)
1792 1793
		mmc->caps |= MMC_CAP_SD_HIGHSPEED;

1794 1795 1796
	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		mmc->caps |= MMC_CAP_NEEDS_POLL;

1797 1798 1799
	mmc->ocr_avail = 0;
	if (caps & SDHCI_CAN_VDD_330)
		mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
P
Pierre Ossman 已提交
1800
	if (caps & SDHCI_CAN_VDD_300)
1801
		mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
P
Pierre Ossman 已提交
1802
	if (caps & SDHCI_CAN_VDD_180)
1803
		mmc->ocr_avail |= MMC_VDD_165_195;
1804 1805 1806

	if (mmc->ocr_avail == 0) {
		printk(KERN_ERR "%s: Hardware doesn't report any "
1807
			"support voltages.\n", mmc_hostname(mmc));
1808
		return -ENODEV;
1809 1810
	}

1811 1812 1813
	spin_lock_init(&host->lock);

	/*
1814 1815
	 * Maximum number of segments. Depends on if the hardware
	 * can do scatter/gather or not.
1816
	 */
1817 1818 1819
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_hw_segs = 128;
	else if (host->flags & SDHCI_USE_DMA)
1820
		mmc->max_hw_segs = 1;
1821 1822 1823
	else /* PIO */
		mmc->max_hw_segs = 128;
	mmc->max_phys_segs = 128;
1824 1825

	/*
1826
	 * Maximum number of sectors in one transfer. Limited by DMA boundary
1827
	 * size (512KiB).
1828
	 */
1829
	mmc->max_req_size = 524288;
1830 1831 1832

	/*
	 * Maximum segment size. Could be one segment with the maximum number
1833 1834
	 * of bytes. When doing hardware scatter/gather, each entry cannot
	 * be larger than 64 KiB though.
1835
	 */
1836 1837 1838 1839
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_seg_size = 65536;
	else
		mmc->max_seg_size = mmc->max_req_size;
1840

1841 1842 1843 1844
	/*
	 * Maximum block size. This varies from controller to controller and
	 * is specified in the capabilities register.
	 */
1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857
	if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
		mmc->max_blk_size = 2;
	} else {
		mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >>
				SDHCI_MAX_BLOCK_SHIFT;
		if (mmc->max_blk_size >= 3) {
			printk(KERN_WARNING "%s: Invalid maximum block size, "
				"assuming 512 bytes\n", mmc_hostname(mmc));
			mmc->max_blk_size = 0;
		}
	}

	mmc->max_blk_size = 512 << mmc->max_blk_size;
1858

1859 1860 1861
	/*
	 * Maximum block count.
	 */
1862
	mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535;
1863

1864 1865 1866 1867 1868 1869 1870 1871
	/*
	 * Init tasklets.
	 */
	tasklet_init(&host->card_tasklet,
		sdhci_tasklet_card, (unsigned long)host);
	tasklet_init(&host->finish_tasklet,
		sdhci_tasklet_finish, (unsigned long)host);

1872
	setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1873

1874
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1875
		mmc_hostname(mmc), host);
1876
	if (ret)
1877
		goto untasklet;
1878 1879 1880 1881 1882 1883 1884

	sdhci_init(host);

#ifdef CONFIG_MMC_DEBUG
	sdhci_dumpregs(host);
#endif

1885
#ifdef SDHCI_USE_LEDS_CLASS
H
Helmut Schaa 已提交
1886 1887 1888
	snprintf(host->led_name, sizeof(host->led_name),
		"%s::", mmc_hostname(mmc));
	host->led.name = host->led_name;
1889 1890 1891 1892
	host->led.brightness = LED_OFF;
	host->led.default_trigger = mmc_hostname(mmc);
	host->led.brightness_set = sdhci_led_control;

1893
	ret = led_classdev_register(mmc_dev(mmc), &host->led);
1894 1895 1896 1897
	if (ret)
		goto reset;
#endif

1898 1899
	mmiowb();

1900 1901
	mmc_add_host(mmc);

1902
	printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1903
		mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1904
		(host->flags & SDHCI_USE_ADMA)?"A":"",
1905 1906
		(host->flags & SDHCI_USE_DMA)?"DMA":"PIO");

1907 1908
	sdhci_enable_card_detection(host);

1909 1910
	return 0;

1911
#ifdef SDHCI_USE_LEDS_CLASS
1912 1913 1914 1915
reset:
	sdhci_reset(host, SDHCI_RESET_ALL);
	free_irq(host->irq, host);
#endif
1916
untasklet:
1917 1918 1919 1920 1921 1922
	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);

	return ret;
}

1923
EXPORT_SYMBOL_GPL(sdhci_add_host);
1924

P
Pierre Ossman 已提交
1925
void sdhci_remove_host(struct sdhci_host *host, int dead)
1926
{
P
Pierre Ossman 已提交
1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944
	unsigned long flags;

	if (dead) {
		spin_lock_irqsave(&host->lock, flags);

		host->flags |= SDHCI_DEVICE_DEAD;

		if (host->mrq) {
			printk(KERN_ERR "%s: Controller removed during "
				" transfer!\n", mmc_hostname(host->mmc));

			host->mrq->cmd->error = -ENOMEDIUM;
			tasklet_schedule(&host->finish_tasklet);
		}

		spin_unlock_irqrestore(&host->lock, flags);
	}

1945 1946
	sdhci_disable_card_detection(host);

1947
	mmc_remove_host(host->mmc);
1948

1949
#ifdef SDHCI_USE_LEDS_CLASS
1950 1951 1952
	led_classdev_unregister(&host->led);
#endif

P
Pierre Ossman 已提交
1953 1954
	if (!dead)
		sdhci_reset(host, SDHCI_RESET_ALL);
1955 1956 1957 1958 1959 1960 1961

	free_irq(host->irq, host);

	del_timer_sync(&host->timer);

	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);
1962 1963 1964 1965 1966 1967

	kfree(host->adma_desc);
	kfree(host->align_buffer);

	host->adma_desc = NULL;
	host->align_buffer = NULL;
1968 1969
}

1970
EXPORT_SYMBOL_GPL(sdhci_remove_host);
1971

1972
void sdhci_free_host(struct sdhci_host *host)
1973
{
1974
	mmc_free_host(host->mmc);
1975 1976
}

1977
EXPORT_SYMBOL_GPL(sdhci_free_host);
1978 1979 1980 1981 1982 1983 1984 1985 1986 1987

/*****************************************************************************\
 *                                                                           *
 * Driver init/exit                                                          *
 *                                                                           *
\*****************************************************************************/

static int __init sdhci_drv_init(void)
{
	printk(KERN_INFO DRIVER_NAME
1988
		": Secure Digital Host Controller Interface driver\n");
1989 1990
	printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");

1991
	return 0;
1992 1993 1994 1995 1996 1997 1998 1999 2000
}

static void __exit sdhci_drv_exit(void)
{
}

module_init(sdhci_drv_init);
module_exit(sdhci_drv_exit);

2001
module_param(debug_quirks, uint, 0444);
2002

2003
MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
2004
MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
2005
MODULE_LICENSE("GPL");
2006

2007
MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");