Skip to content

P
Paddle-Lite

PaddlePaddle / Paddle-Lite

通知 331
Star 4
Fork 1
P
Paddle-Lite
切换分支/标签
查找文件 普通视图历史永久链接Permalink
depthwise_conv3x3_int8.cpp 52.7 KB
Newer Older
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
1 2 3 4 5 6 7 8 9 10 11 12 13 14 
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

    http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
15 
#include "operators/math/depthwise_conv3x3.h"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
16 17 18 19 20 

namespace paddle_mobile {
namespace operators {
namespace math {
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
21 22 23 24 25 26 27 
// template<>
// void DepthwiseConv3x3<int8_t, int32_t>(
//     const framework::Tensor *input, const framework::Tensor *filter,
//     const std::vector<int> &strides, framework::Tensor *output) {
//   PADDLE_MOBILE_THROW_EXCEPTION(
//       "Depthwise conv with generic strides has not been implemented.");
// }
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
28
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
29 30 31 
template <>
void DepthwiseConv3x3s1<int8_t, int32_t>(const framework::Tensor &input,
                                         const framework::Tensor &filter,
H
Support padding in 8bit depthwise conv, so remove padding from dequantize kernel  
hjchen2 已提交
32 
                                         const std::vector<int> &paddings,
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
33 
                                         framework::Tensor *output) {
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 
  const int8_t *input_data = input.data<int8_t>();
  const int8_t *filter_data = filter.data<int8_t>();
  int32_t *out_data = output->mutable_data<int32_t>();
  // make sure that batch size is 1
  int input_c = input.dims()[1];
  int input_h = input.dims()[2];
  int input_w = input.dims()[3];
  int output_c = output->dims()[1];
  int output_h = output->dims()[2];
  int output_w = output->dims()[3];
  int image_size = input_h * input_w;
  int out_image_size = output_h * output_w;
#if __aarch64__
  // TODO(hjchen2)
#else
  #pragma omp parallel for
  for (int g = 0; g < input_c; ++g) {
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
51 
    const int8_t* input_ptr = input_data + g * image_size;
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
52 
    const int8_t* filter_ptr = filter_data + g * 9;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
53 
    int32_t* output_ptr = out_data + g * out_image_size;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
54 55 
    int loops = (input_w - 2) / 6;
    int remain = input_w - 2 - loops * 6;
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
56 
    for (int h = 0; h < input_h - 5 /*(input_h - 2) - 3*/; h += 4) {
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
57 58 59 60 61 62 63 64 65 66 
      const int8_t* input_ptr0 = input_ptr + h * input_w;
      const int8_t* input_ptr1 = input_ptr0 + input_w;
      const int8_t* input_ptr2 = input_ptr1 + input_w;
      const int8_t* input_ptr3 = input_ptr2 + input_w;
      const int8_t* input_ptr4 = input_ptr3 + input_w;
      const int8_t* input_ptr5 = input_ptr4 + input_w;
      int32_t* output_ptr0 = output_ptr + h * output_w;
      int32_t* output_ptr1 = output_ptr0 + output_w;
      int32_t* output_ptr2 = output_ptr1 + output_w;
      int32_t* output_ptr3 = output_ptr2 + output_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
67 
      int loop = loops;
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 
      asm volatile(
          "vld1.32    {q0}, [%[filter_ptr]] \n"
          "vmovl.s8   q14, d0               \n"
          "vmovl.s8   q15, d1               \n"
          "vdup.s16   d0, d28[0]            \n"
          "vdup.s16   d1, d28[1]            \n"
          "vdup.s16   d2, d28[2]            \n"
          "vdup.s16   d3, d28[3]            \n"
          "vdup.s16   d4, d29[0]            \n"
          "vdup.s16   d5, d29[1]            \n"
          "vdup.s16   d6, d29[2]            \n"
          "vdup.s16   d7, d29[3]            \n"
          "vdup.s16   d8, d30[0]            \n"
          :
          : [filter_ptr] "r"(filter_ptr)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q14", "q15");
      asm volatile(
          "mov        r0, #6                \n"
          "cmp        %[loop], #0           \n"
          "ble        start_remain_%=       \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
88 89 
          // loop 6 widths
          "loop_4h6w_%=:                          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
90 91 92 
          "vld1.32    {d9}, [%[input_ptr0]], r0   \n"
          "vld1.32    {d10}, [%[input_ptr1]], r0  \n"
          "vld1.32    {d11}, [%[input_ptr2]], r0  \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
93 94 
          "vext.s8    d12, d9, d9, #1       \n"
          "vext.s8    d13, d9, d9, #2       \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
95 96 97 98 99 100 101 102 103 104 
          "vmovl.s8   q7, d9                \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
105 106 
          "vext.s8    d12, d10, d10, #1     \n"
          "vext.s8    d13, d10, d10, #2     \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
107 108 109 
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
110 111 112 113 114 115 116 
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
117 118 119 120 121 122 123 
          "vmull.s16  q12, d14, d0          \n"
          "vmlal.s16  q12, d16, d1          \n"
          "vmlal.s16  q12, d18, d2          \n"
          "vmull.s16  q13, d15, d0          \n"
          "vmlal.s16  q13, d17, d1          \n"
          "vmlal.s16  q13, d19, d2          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
124 125 126 
          "vext.s8    d12, d11, d11, #1     \n"
          "vext.s8    d13, d11, d11, #2     \n"
          "vmovl.s8   q7, d11               \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
127 128 129 130 131 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q10, d14, d6          \n"
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
132 
          "vmlal.s16  q11, d15, d6          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
133 134 135 136 137 
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"
          // store row 0, reuse q10/q11
          "vst1.32    {d20-d22}, [%[output_ptr0]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
138 139 140 141 142 143 144 145 146 147 148 149 150 151 
          "vmlal.s16  q12, d14, d3          \n"
          "vmlal.s16  q12, d16, d4          \n"
          "vmlal.s16  q12, d18, d5          \n"
          "vmlal.s16  q13, d15, d3          \n"
          "vmlal.s16  q13, d17, d4          \n"
          "vmlal.s16  q13, d19, d5          \n"

          "vmull.s16  q14, d14, d0          \n"
          "vmlal.s16  q14, d16, d1          \n"
          "vmlal.s16  q14, d18, d2          \n"
          "vmull.s16  q15, d15, d0          \n"
          "vmlal.s16  q15, d17, d1          \n"
          "vmlal.s16  q15, d19, d2          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
152 153 154 
          "vld1.32    {d9}, [%[input_ptr3]], r0    \n"
          "vld1.32    {d10}, [%[input_ptr4]], r0   \n"
          "vld1.32    {d11}, [%[input_ptr5]], r0   \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
155 156 
          "vext.s8    d12, d9, d9, #1       \n"
          "vext.s8    d13, d9, d9, #2       \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 
          "vmovl.s8   q7, d9                \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q12, d14, d6          \n"
          "vmlal.s16  q12, d16, d7          \n"
          "vmlal.s16  q12, d18, d8          \n"
          "vmlal.s16  q13, d15, d6          \n"
          "vmlal.s16  q13, d17, d7          \n"
          "vmlal.s16  q13, d19, d8          \n"
          // store row 1
          "vst1.32    {d24-d26}, [%[output_ptr1]]! \n"

          "vmlal.s16  q14, d14, d3          \n"
          "vmlal.s16  q14, d16, d4          \n"
          "vmlal.s16  q14, d18, d5          \n"
          "vmlal.s16  q15, d15, d3          \n"
          "vmlal.s16  q15, d17, d4          \n"
          "vmlal.s16  q15, d19, d5          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
176 177 178 179 180 181 182 183 184 
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"

          "vext.s8    d12, d10, d10, #1     \n"
          "vext.s8    d13, d10, d10, #2     \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
185 186 187 
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
188 
          "vmlal.s16  q14, d14, d6          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
189 190 
          "vmlal.s16  q14, d16, d7          \n"
          "vmlal.s16  q14, d18, d8          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
191 
          "vmlal.s16  q15, d15, d6          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
192 193 194 
          "vmlal.s16  q15, d17, d7          \n"
          "vmlal.s16  q15, d19, d8          \n"
          // store row 2
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
195 
          "vst1.32    {d28-d30}, [%[output_ptr2]]! \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
196
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
197 198 199 200 201 202 203 204 205 206 
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"

          "vext.s8    d12, d11, d11, #1     \n"
          "vext.s8    d13, d11, d11, #2     \n"
          "vmovl.s8   q7, d11               \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
207 208 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
209 
          "vmlal.s16  q10, d14, d6          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
210 211 
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
212 
          "vmlal.s16  q11, d15, d6          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
213 214 215 216 217 
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"
          // store row 3
          "vst1.32    {d20-d22}, [%[output_ptr3]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
218 219 
          "subs       %[loop], #1           \n"
          "bne        loop_4h6w_%=          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
220 221 

          "start_remain_%=:                 \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
222 223 
          "cmp        %[remain], #0         \n"
          "ble        end_%=                \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
224
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
225 
          "vld1.32    {d9}, [%[input_ptr0]] \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
226 
          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
227 228 229 230 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
231 232 233 
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
234 
          "vld1.32    {d9}, [%[input_ptr1]] \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
235 236 237 238 239 
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"

          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
240 241 242 243 244 245 246 247 248 249 250 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
251 252 253 
          "vmull.s16  q12, d14, d0          \n"
          "vmlal.s16  q12, d16, d1          \n"
          "vmlal.s16  q12, d18, d2          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
254 
          "vld1.32    {d9}, [%[input_ptr2]] \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
255 256 257 258 259 
          "vmull.s16  q13, d15, d0          \n"
          "vmlal.s16  q13, d17, d1          \n"
          "vmlal.s16  q13, d19, d2          \n"

          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
260 261 262 263 264 265 266 267 268 269 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
          "vmlal.s16  q10, d14, d6          \n"
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
          "vmlal.s16  q11, d15, d6          \n"
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
270 271 272 273 

          "vmlal.s16  q12, d14, d3          \n"
          "vmlal.s16  q12, d16, d4          \n"
          "vmlal.s16  q12, d18, d5          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
274 
          "vmlal.s16  q13, d15, d3          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
275 276 277 
          "vmlal.s16  q13, d17, d4          \n"
          "vmlal.s16  q13, d19, d5          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
278 279 280 281 282 283 284 
          "vmull.s16  q14, d14, d0          \n"
          "vmlal.s16  q14, d16, d1          \n"
          "vmlal.s16  q14, d18, d2          \n"
          "vld1.32    {d9}, [%[input_ptr3]] \n"
          "vmull.s16  q15, d15, d0          \n"
          "vmlal.s16  q15, d17, d1          \n"
          "vmlal.s16  q15, d19, d2          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
285 286 

          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
287 288 289 290 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
291 292 293 294 295 296 297 298 299 300 301 302 303 304 
          "vmlal.s16  q12, d14, d6          \n"
          "vmlal.s16  q12, d16, d7          \n"
          "vmlal.s16  q12, d18, d8          \n"
          "vmlal.s16  q13, d15, d6          \n"
          "vmlal.s16  q13, d17, d7          \n"
          "vmlal.s16  q13, d19, d8          \n"

          "vmlal.s16  q14, d14, d3          \n"
          "vmlal.s16  q14, d16, d4          \n"
          "vmlal.s16  q14, d18, d5          \n"
          "vmlal.s16  q15, d15, d3          \n"
          "vmlal.s16  q15, d17, d4          \n"
          "vmlal.s16  q15, d19, d5          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
305 306 307 308 309 310 311 312 
          "vmull.s16  q5, d14, d0           \n"
          "vmlal.s16  q5, d16, d1           \n"
          "vmlal.s16  q5, d18, d2           \n"
          "vld1.32    {d9}, [%[input_ptr4]] \n"
          "vmull.s16  q6, d15, d0           \n"
          "vmlal.s16  q6, d17, d1           \n"
          "vmlal.s16  q6, d19, d2           \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
313 
          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
314 315 316 317 318 319 320 321 322 323 324 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
          "vmlal.s16  q14, d14, d6          \n"
          "vmlal.s16  q14, d16, d7          \n"
          "vmlal.s16  q14, d18, d8          \n"
          "vmlal.s16  q15, d15, d6          \n"
          "vmlal.s16  q15, d17, d7          \n"
          "vmlal.s16  q15, d19, d8          \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
325 326 327 
          "vmlal.s16  q5, d14, d3           \n"
          "vmlal.s16  q5, d16, d4           \n"
          "vmlal.s16  q5, d18, d5           \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
328 329 
          "vld1.32    {d9}, [%[input_ptr5]] \n"
          "vmlal.s16  q6, d15, d3           \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
330 331 332 333 
          "vmlal.s16  q6, d17, d4           \n"
          "vmlal.s16  q6, d19, d5           \n"

          "vmovl.s8   q7, d9                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
334 335 336 337 338 
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q8, d9                \n"
          "vext.s8    d9, d9, d9, #1        \n"
          "vmovl.s8   q9, d9                \n"
          "vmlal.s16  q5, d14, d6           \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
339 340 
          "vmlal.s16  q5, d16, d7           \n"
          "vmlal.s16  q5, d18, d8           \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
341 
          "vmlal.s16  q6, d15, d6           \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 
          "vmlal.s16  q6, d17, d7           \n"
          "vmlal.s16  q6, d19, d8           \n"

          "cmp        %[remain], #4               \n"
          "blt        store_4h2w_%=               \n"
          "vst1.32    {q10}, [%[output_ptr0]]!    \n"
          "vst1.32    {q12}, [%[output_ptr1]]!    \n"
          "vst1.32    {q14}, [%[output_ptr2]]!    \n"
          "vst1.32    {q5}, [%[output_ptr3]]!     \n"
          "cmp        %[remain], #5               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d22[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d26[0]}, [%[output_ptr1]]! \n"
          "vst1.32    {d30[0]}, [%[output_ptr2]]! \n"
          "vst1.32    {d12[0]}, [%[output_ptr3]]! \n"
          "b          end_%=                      \n"

          "store_4h2w_%=:                         \n"
          "cmp        %[remain], #2               \n"
          "blt        store_4h1w_%=               \n"
          "vst1.32    {d20}, [%[output_ptr0]]!    \n"
          "vst1.32    {d24}, [%[output_ptr1]]!    \n"
          "vst1.32    {d28}, [%[output_ptr2]]!    \n"
          "vst1.32    {d10}, [%[output_ptr3]]!    \n"
          "cmp        %[remain], #3               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d21[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d25[0]}, [%[output_ptr1]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
370 
          "vst1.32    {d29[0]}, [%[output_ptr2]]! \n"
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 
          "vst1.32    {d11[0]}, [%[output_ptr3]]! \n"
          "b          end_%=                      \n"

          "store_4h1w_%=:                         \n"
          "cmp        %[remain], #1               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d20[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d24[0]}, [%[output_ptr1]]! \n"
          "vst1.32    {d28[0]}, [%[output_ptr2]]! \n"
          "vst1.32    {d10[0]}, [%[output_ptr3]]! \n"
          "end_%=:                                \n"
          : [output_ptr0] "+r"(output_ptr0), [output_ptr1] "+r"(output_ptr1),
            [output_ptr2] "+r"(output_ptr2), [output_ptr3] "+r"(output_ptr3),
            [input_ptr0] "+r"(input_ptr0), [input_ptr1] "+r"(input_ptr1),
            [input_ptr2] "+r"(input_ptr2), [input_ptr3] "+r"(input_ptr3),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
386 387 388 389 390 
            [input_ptr4] "+r"(input_ptr4), [input_ptr5] "+r"(input_ptr5),
            [loop] "+r"(loop)
          : [remain] "r"(remain)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15", "r0");
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
391 392 393 
    }
    // remain height
    int start_h = (input_h - 2) & 0xFFFC;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
394 395 396 397 398 399 400 
    for (int h = start_h; h < input_h - 3 /*(input_h - 2) - 1*/; h += 2) {
      const int8_t* input_ptr0 = input_ptr + h * input_w;
      const int8_t* input_ptr1 = input_ptr0 + input_w;
      const int8_t* input_ptr2 = input_ptr1 + input_w;
      const int8_t* input_ptr3 = input_ptr2 + input_w;
      int32_t* output_ptr0 = output_ptr + h * output_w;
      int32_t* output_ptr1 = output_ptr0 + output_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
401 
      int loop = loops;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 
      asm volatile(
          "vld1.32    {q0}, [%[filter_ptr]] \n"
          "vmovl.s8   q14, d0               \n"
          "vmovl.s8   q15, d1               \n"
          "vdup.s16   d0, d28[0]            \n"
          "vdup.s16   d1, d28[1]            \n"
          "vdup.s16   d2, d28[2]            \n"
          "vdup.s16   d3, d28[3]            \n"
          "vdup.s16   d4, d29[0]            \n"
          "vdup.s16   d5, d29[1]            \n"
          "vdup.s16   d6, d29[2]            \n"
          "vdup.s16   d7, d29[3]            \n"
          "vdup.s16   d8, d30[0]            \n"
          :
          : [filter_ptr] "r"(filter_ptr)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q14", "q15");
      asm volatile(
          "mov        r0, #6                \n"
          "cmp        %[loop], #0           \n"
          "ble        start_remain_%=       \n"
          // loop 6 widths
          "loop_2h6w_%=:                          \n"
          "vld1.32    {d9}, [%[input_ptr0]], r0   \n"
          "vld1.32    {d10}, [%[input_ptr1]], r0  \n"
          "vld1.32    {d11}, [%[input_ptr2]], r0  \n"
          "vext.s8    d12, d9, d9, #1       \n"
          "vext.s8    d13, d9, d9, #2       \n"
          "vmovl.s8   q7, d9                \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"

          "vext.s8    d12, d10, d10, #1     \n"
          "vext.s8    d13, d10, d10, #2     \n"
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"

          "vmull.s16  q12, d14, d0          \n"
          "vmlal.s16  q12, d16, d1          \n"
          "vmlal.s16  q12, d18, d2          \n"
          "vmull.s16  q13, d15, d0          \n"
          "vmlal.s16  q13, d17, d1          \n"
          "vmlal.s16  q13, d19, d2          \n"

          "vext.s8    d12, d11, d11, #1     \n"
          "vext.s8    d13, d11, d11, #2     \n"
          "vmovl.s8   q7, d11               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q10, d14, d6          \n"
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
          "vmlal.s16  q11, d15, d6          \n"
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"
          // store row 0, reuse q10/q11
          "vst1.32    {d20-d22}, [%[output_ptr0]]! \n"

          "vmlal.s16  q12, d14, d3          \n"
          "vmlal.s16  q12, d16, d4          \n"
          "vmlal.s16  q12, d18, d5          \n"
          "vmlal.s16  q13, d15, d3          \n"
          "vmlal.s16  q13, d17, d4          \n"
          "vmlal.s16  q13, d19, d5          \n"

          "vld1.32    {d9}, [%[input_ptr3]], r0    \n"
          "vext.s8    d12, d9, d9, #1       \n"
          "vext.s8    d13, d9, d9, #2       \n"
          "vmovl.s8   q7, d9                \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q12, d14, d6          \n"
          "vmlal.s16  q12, d16, d7          \n"
          "vmlal.s16  q12, d18, d8          \n"
          "vmlal.s16  q13, d15, d6          \n"
          "vmlal.s16  q13, d17, d7          \n"
          "vmlal.s16  q13, d19, d8          \n"
          // store row 1
          "vst1.32    {d24-d26}, [%[output_ptr1]]! \n"

          "subs       %[loop], #1            \n"
          "bne        loop_2h6w_%=           \n"

          "start_remain_%=:                  \n"
          "cmp %[remain], #0                 \n"
          "ble end_%=                        \n"

          "vld1.32    {d9}, [%[input_ptr0]]  \n"
          "vld1.32    {d10}, [%[input_ptr1]] \n"
          "vld1.32    {d11}, [%[input_ptr2]] \n"
          "vext.s8    d12, d9, d9, #1        \n"
          "vext.s8    d13, d9, d9, #2        \n"
          "vmovl.s8   q7, d9                 \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmull.s16  q10, d14, d0           \n"
          "vmlal.s16  q10, d16, d1           \n"
          "vmlal.s16  q10, d18, d2           \n"
          "vmull.s16  q11, d15, d0           \n"
          "vmlal.s16  q11, d17, d1           \n"
          "vmlal.s16  q11, d19, d2           \n"

          "vext.s8    d12, d10, d10, #1      \n"
          "vext.s8    d13, d10, d10, #2      \n"
          "vmovl.s8   q7, d10                \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmlal.s16  q10, d14, d3           \n"
          "vmlal.s16  q10, d16, d4           \n"
          "vmlal.s16  q10, d18, d5           \n"
          "vmlal.s16  q11, d15, d3           \n"
          "vmlal.s16  q11, d17, d4           \n"
          "vmlal.s16  q11, d19, d5           \n"

          "vmull.s16  q12, d14, d0           \n"
          "vmlal.s16  q12, d16, d1           \n"
          "vmlal.s16  q12, d18, d2           \n"
          "vmull.s16  q13, d15, d0           \n"
          "vmlal.s16  q13, d17, d1           \n"
          "vmlal.s16  q13, d19, d2           \n"

          "vext.s8    d12, d11, d11, #1      \n"
          "vext.s8    d13, d11, d11, #2      \n"
          "vmovl.s8   q7, d11                \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmlal.s16  q10, d14, d6           \n"
          "vmlal.s16  q10, d16, d7           \n"
          "vmlal.s16  q10, d18, d8           \n"
          "vmlal.s16  q11, d15, d6           \n"
          "vmlal.s16  q11, d17, d7           \n"
          "vmlal.s16  q11, d19, d8           \n"

          "vmlal.s16  q12, d14, d3           \n"
          "vmlal.s16  q12, d16, d4           \n"
          "vmlal.s16  q12, d18, d5           \n"
          "vmlal.s16  q13, d15, d3           \n"
          "vmlal.s16  q13, d17, d4           \n"
          "vmlal.s16  q13, d19, d5           \n"

          "vld1.32    {d9}, [%[input_ptr3]]  \n"
          "vext.s8    d12, d9, d9, #1        \n"
          "vext.s8    d13, d9, d9, #2        \n"
          "vmovl.s8   q7, d9                 \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmlal.s16  q12, d14, d6           \n"
          "vmlal.s16  q12, d16, d7           \n"
          "vmlal.s16  q12, d18, d8           \n"
          "vmlal.s16  q13, d15, d6           \n"
          "vmlal.s16  q13, d17, d7           \n"
          "vmlal.s16  q13, d19, d8           \n"

          "cmp        %[remain], #4               \n"
          "blt        store_2h2w_%=               \n"
          "vst1.32    {q10}, [%[output_ptr0]]!    \n"
          "vst1.32    {q12}, [%[output_ptr1]]!    \n"
          "cmp        %[remain], #5               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d22[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d26[0]}, [%[output_ptr1]]! \n"
          "b          end_%=                      \n"

          "store_2h2w_%=:                         \n"
          "cmp        %[remain], #2               \n"
          "blt        store_2h1w_%=               \n"
          "vst1.32    {d20}, [%[output_ptr0]]!    \n"
          "vst1.32    {d24}, [%[output_ptr1]]!    \n"
          "cmp        %[remain], #3               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d21[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d25[0]}, [%[output_ptr1]]! \n"
          "b          end_%=                      \n"

          "store_2h1w_%=:                         \n"
          "cmp        %[remain], #1               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d20[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d24[0]}, [%[output_ptr1]]! \n"
          "end_%=:                                \n"
          : [output_ptr0] "+r"(output_ptr0), [output_ptr1] "+r"(output_ptr1),
            [input_ptr0] "+r"(input_ptr0), [input_ptr1] "+r"(input_ptr1),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
596 597 598 599 600 
            [input_ptr2] "+r"(input_ptr2), [input_ptr3] "+r"(input_ptr3),
            [loop] "+r"(loop)
          : [remain] "r"(remain)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "q12", "q13", "r0");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
601 602 603 604 605 606 607 608 
    }

    start_h = (input_h - 2) & 0xFFFE;
    if (start_h < input_h - 2) {
      const int8_t* input_ptr0 = input_ptr + start_h * input_w;
      const int8_t* input_ptr1 = input_ptr0 + input_w;
      const int8_t* input_ptr2 = input_ptr1 + input_w;
      int32_t* output_ptr0 = output_ptr + start_h * output_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
609 
      int loop = loops;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 
      asm volatile(
          "vld1.32    {q0}, [%[filter_ptr]] \n"
          "vmovl.s8   q14, d0               \n"
          "vmovl.s8   q15, d1               \n"
          "vdup.s16   d0, d28[0]            \n"
          "vdup.s16   d1, d28[1]            \n"
          "vdup.s16   d2, d28[2]            \n"
          "vdup.s16   d3, d28[3]            \n"
          "vdup.s16   d4, d29[0]            \n"
          "vdup.s16   d5, d29[1]            \n"
          "vdup.s16   d6, d29[2]            \n"
          "vdup.s16   d7, d29[3]            \n"
          "vdup.s16   d8, d30[0]            \n"
          :
          : [filter_ptr] "r"(filter_ptr)
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
625 
          : "memory", "q0", "q1", "q2", "q3", "q4", "q14", "q15");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 
      asm volatile(
          "mov        r0, #6                \n"
          "cmp        %[loop], #0           \n"
          "ble        start_remain_%=       \n"
          // loop 6 widths
          "loop_1h6w_%=:                          \n"
          "vld1.32    {d9}, [%[input_ptr0]], r0   \n"
          "vld1.32    {d10}, [%[input_ptr1]], r0  \n"
          "vld1.32    {d11}, [%[input_ptr2]], r0  \n"
          "vext.s8    d12, d9, d9, #1       \n"
          "vext.s8    d13, d9, d9, #2       \n"
          "vmovl.s8   q7, d9                \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"

          "vext.s8    d12, d10, d10, #1     \n"
          "vext.s8    d13, d10, d10, #2     \n"
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"

          "vext.s8    d12, d11, d11, #1     \n"
          "vext.s8    d13, d11, d11, #2     \n"
          "vmovl.s8   q7, d11               \n"
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
          "vmlal.s16  q10, d14, d6          \n"
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
          "vmlal.s16  q11, d15, d6          \n"
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"
          // store row 0, reuse q10/q11
          "vst1.32    {d20-d22}, [%[output_ptr0]]! \n"

          "subs       %[loop], #1            \n"
          "bne        loop_1h6w_%=           \n"

          "start_remain_%=:                  \n"
          "cmp %[remain], #0                 \n"
          "ble end_%=                        \n"

          "vld1.32    {d9}, [%[input_ptr0]]  \n"
          "vld1.32    {d10}, [%[input_ptr1]] \n"
          "vld1.32    {d11}, [%[input_ptr2]] \n"
          "vext.s8    d12, d9, d9, #1        \n"
          "vext.s8    d13, d9, d9, #2        \n"
          "vmovl.s8   q7, d9                 \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmull.s16  q10, d14, d0           \n"
          "vmlal.s16  q10, d16, d1           \n"
          "vmlal.s16  q10, d18, d2           \n"
          "vmull.s16  q11, d15, d0           \n"
          "vmlal.s16  q11, d17, d1           \n"
          "vmlal.s16  q11, d19, d2           \n"

          "vext.s8    d12, d10, d10, #1      \n"
          "vext.s8    d13, d10, d10, #2      \n"
          "vmovl.s8   q7, d10                \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmlal.s16  q10, d14, d3           \n"
          "vmlal.s16  q10, d16, d4           \n"
          "vmlal.s16  q10, d18, d5           \n"
          "vmlal.s16  q11, d15, d3           \n"
          "vmlal.s16  q11, d17, d4           \n"
          "vmlal.s16  q11, d19, d5           \n"

          "vext.s8    d12, d11, d11, #1      \n"
          "vext.s8    d13, d11, d11, #2      \n"
          "vmovl.s8   q7, d11                \n"
          "vmovl.s8   q8, d12                \n"
          "vmovl.s8   q9, d13                \n"
          "vmlal.s16  q10, d14, d6           \n"
          "vmlal.s16  q10, d16, d7           \n"
          "vmlal.s16  q10, d18, d8           \n"
          "vmlal.s16  q11, d15, d6           \n"
          "vmlal.s16  q11, d17, d7           \n"
          "vmlal.s16  q11, d19, d8           \n"

          "cmp        %[remain], #4               \n"
          "blt        store_1h2w_%=               \n"
          "vst1.32    {q10}, [%[output_ptr0]]!    \n"
          "cmp        %[remain], #5               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d22[0]}, [%[output_ptr0]]! \n"
          "b          end_%=                      \n"

          "store_1h2w_%=:                         \n"
          "cmp        %[remain], #2               \n"
          "blt        store_1h1w_%=               \n"
          "vst1.32    {d20}, [%[output_ptr0]]!    \n"
          "cmp        %[remain], #3               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d21[0]}, [%[output_ptr0]]! \n"
          "b          end_%=                      \n"

          "store_1h1w_%=:                         \n"
          "cmp        %[remain], #1               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d20[0]}, [%[output_ptr0]]! \n"
          "end_%=:                                \n"
          : [output_ptr0] "+r"(output_ptr0), [input_ptr0] "+r"(input_ptr0),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
742 743 744 745 746 
            [input_ptr1] "+r"(input_ptr1), [input_ptr2] "+r"(input_ptr2),
            [loop] "+r"(loop)
          : [remain] "r"(remain)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "r0");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
747 748 749 750 751 752 753 754 
    }
  }
#endif  // __aarch64__
}

template <>
void DepthwiseConv3x3s2<int8_t, int32_t>(const framework::Tensor &input,
                                         const framework::Tensor &filter,
H
Support padding in 8bit depthwise conv, so remove padding from dequantize kernel  
hjchen2 已提交
755 
                                         const std::vector<int> &paddings,
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 
                                         framework::Tensor *output) {
  const int8_t *input_data = input.data<int8_t>();
  const int8_t *filter_data = filter.data<int8_t>();
  int32_t *out_data = output->mutable_data<int32_t>();
  // make sure that batch size is 1
  int input_c = input.dims()[1];
  int input_h = input.dims()[2];
  int input_w = input.dims()[3];
  int output_c = output->dims()[1];
  int output_h = output->dims()[2];
  int output_w = output->dims()[3];
  int image_size = input_h * input_w;
  int out_image_size = output_h * output_w;
#if __aarch64__
  // TODO(hjchen2)
#else
  #pragma omp parallel for
  for (int g = 0; g < input_c; ++g) {
    const int8_t* input_ptr = input_data + g * image_size;
    const int8_t* filter_ptr = filter_data + g * 9;
    int32_t* output_ptr = out_data + g * out_image_size;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
777 778 779 
    int loops = output_w / 6;
    int remain = output_w - loops * 6;
    for (int h = 0; h < input_h - 6 /*(input_h - 1) - 5*/; h += 6) {
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
780 781 782 783 784 785 
      const int8_t* input_ptr0 = input_ptr + h * input_w;
      const int8_t* input_ptr1 = input_ptr0 + input_w;
      const int8_t* input_ptr2 = input_ptr1 + input_w;
      const int8_t* input_ptr3 = input_ptr2 + input_w;
      const int8_t* input_ptr4 = input_ptr3 + input_w;
      const int8_t* input_ptr5 = input_ptr4 + input_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
786 787 
      const int8_t* input_ptr6 = input_ptr5 + input_w;
      int32_t* output_ptr0 = output_ptr + (h >> 1) * output_w;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
788 789 
      int32_t* output_ptr1 = output_ptr0 + output_w;
      int32_t* output_ptr2 = output_ptr1 + output_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
790 
      int loop = loops;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 
      asm volatile(
          "vld1.32    {q0}, [%[filter_ptr]] \n"
          "vmovl.s8   q14, d0               \n"
          "vmovl.s8   q15, d1               \n"
          "vdup.s16   d0, d28[0]            \n"
          "vdup.s16   d1, d28[1]            \n"
          "vdup.s16   d2, d28[2]            \n"
          "vdup.s16   d3, d28[3]            \n"
          "vdup.s16   d4, d29[0]            \n"
          "vdup.s16   d5, d29[1]            \n"
          "vdup.s16   d6, d29[2]            \n"
          "vdup.s16   d7, d29[3]            \n"
          "vdup.s16   d8, d30[0]            \n"
          :
          : [filter_ptr] "r"(filter_ptr)
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
806 
          : "memory", "q0", "q1", "q2", "q3", "q4", "q14", "q15");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
807 
      asm volatile(
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
808 
          "mov        r0, #12               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
809 810 811 
          "cmp        %[loop], #0           \n"
          "ble        start_remain_%=       \n"
          // loop 6 widths
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 
          "loop_3h6w_%=:                               \n"
          "vld2.8     {d10, d11}, [%[input_ptr0]], r0  \n"
          "vld2.8     {d12, d13}, [%[input_ptr1]], r0  \n"
          "vld2.8     {d14, d15}, [%[input_ptr2]], r0  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d10               \n"
          "vmovl.s8   q9, d11               \n"
          "vmull.s16  q11, d16, d0          \n"
          "vmlal.s16  q11, d18, d1          \n"
          "vmlal.s16  q11, d20, d2          \n"
          "vmull.s16  q12, d17, d0          \n"
          "vmlal.s16  q12, d19, d1          \n"
          "vmlal.s16  q12, d21, d2          \n"

          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q10, d9               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
829 830 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 
          "vmlal.s16  q11, d16, d3          \n"
          "vmlal.s16  q11, d18, d4          \n"
          "vmlal.s16  q11, d20, d5          \n"
          "vmlal.s16  q12, d17, d3          \n"
          "vmlal.s16  q12, d19, d4          \n"
          "vmlal.s16  q12, d21, d5          \n"

          "vext.s8    d9, d14, d14, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d14               \n"
          "vmovl.s8   q9, d15               \n"
          "vmlal.s16  q11, d16, d6          \n"
          "vmlal.s16  q11, d18, d7          \n"
          "vmlal.s16  q11, d20, d8          \n"
          "vmlal.s16  q12, d17, d6          \n"
          "vmlal.s16  q12, d19, d7          \n"
          "vmlal.s16  q12, d21, d8          \n"
          // store row 0, reuse q11/q12
          "vst1.32    {d22-d24}, [%[output_ptr0]]! \n"

          "vmull.s16  q13, d16, d0          \n"
          "vmlal.s16  q13, d18, d1          \n"
          "vmlal.s16  q13, d20, d2          \n"
          "vmull.s16  q14, d17, d0          \n"
          "vmlal.s16  q14, d19, d1          \n"
          "vmlal.s16  q14, d21, d2          \n"

          "vld2.8     {d10, d11}, [%[input_ptr3]], r0  \n"
          "vld2.8     {d12, d13}, [%[input_ptr4]], r0  \n"
          "vld2.8     {d14, d15}, [%[input_ptr5]], r0  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d10               \n"
          "vmovl.s8   q9, d11               \n"
          "vmlal.s16  q13, d16, d3          \n"
          "vmlal.s16  q13, d18, d4          \n"
          "vmlal.s16  q13, d20, d5          \n"
          "vmlal.s16  q14, d17, d3          \n"
          "vmlal.s16  q14, d19, d4          \n"
          "vmlal.s16  q14, d21, d5          \n"

          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q10, d9               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
874 875 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
876 877 878 879 880 881 
          "vmlal.s16  q13, d16, d6          \n"
          "vmlal.s16  q13, d18, d7          \n"
          "vmlal.s16  q13, d20, d8          \n"
          "vmlal.s16  q14, d17, d6          \n"
          "vmlal.s16  q14, d19, d7          \n"
          "vmlal.s16  q14, d21, d8          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
882 
          // store row 1
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 
          "vst1.32    {d26-d28}, [%[output_ptr1]]! \n"

          "vmull.s16  q11, d16, d0          \n"
          "vmlal.s16  q11, d18, d1          \n"
          "vmlal.s16  q11, d20, d2          \n"
          "vmull.s16  q12, d17, d0          \n"
          "vmlal.s16  q12, d19, d1          \n"
          "vmlal.s16  q12, d21, d2          \n"

          "vext.s8    d9, d14, d14, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d14               \n"
          "vmovl.s8   q9, d15               \n"
          "vmlal.s16  q11, d16, d3          \n"
          "vmlal.s16  q11, d18, d4          \n"
          "vmlal.s16  q11, d20, d5          \n"
          "vmlal.s16  q12, d17, d3          \n"
          "vmlal.s16  q12, d19, d4          \n"
          "vmlal.s16  q12, d21, d5          \n"

          "vld2.8     {d10, d11}, [%[input_ptr6]], r0  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d10               \n"
          "vmovl.s8   q9, d11               \n"
          "vmlal.s16  q11, d16, d6          \n"
          "vmlal.s16  q11, d18, d7          \n"
          "vmlal.s16  q11, d20, d8          \n"
          "vmlal.s16  q12, d17, d6          \n"
          "vmlal.s16  q12, d19, d7          \n"
          "vmlal.s16  q12, d21, d8          \n"
          // store row 2
          "vst1.32    {d22-d24}, [%[output_ptr2]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
916
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
917 918 919 920 921 922 
          "subs       %[loop], #1           \n"
          "bne        loop_3h6w_%=          \n"

          "start_remain_%=:                 \n"
          "cmp        %[remain], #0         \n"
          "ble        end_%=                \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
923
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
924 925 926 927 928 929 
          "vld2.8     {d10, d11}, [%[input_ptr0]]  \n"
          "vld2.8     {d12, d13}, [%[input_ptr1]]  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q9, d9                \n"
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d11               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
930 931 932 933 934 935 936 
          "vmull.s16  q10, d14, d0          \n"
          "vmlal.s16  q10, d16, d1          \n"
          "vmlal.s16  q10, d18, d2          \n"
          "vmull.s16  q11, d15, d0          \n"
          "vmlal.s16  q11, d17, d1          \n"
          "vmlal.s16  q11, d19, d2          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
937 938 939 940 
          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q9, d9                \n"
          "vmovl.s8   q7, d12               \n"
          "vmovl.s8   q8, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
941 942 943 944 945 946 947 
          "vmlal.s16  q10, d14, d3          \n"
          "vmlal.s16  q10, d16, d4          \n"
          "vmlal.s16  q10, d18, d5          \n"
          "vmlal.s16  q11, d15, d3          \n"
          "vmlal.s16  q11, d17, d4          \n"
          "vmlal.s16  q11, d19, d5          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
948 949 950 951 952 953 
          "vld2.8     {d10, d11}, [%[input_ptr2]]  \n"
          "vld2.8     {d12, d13}, [%[input_ptr3]]  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q9, d9                \n"
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d11               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
954 955 956 957 958 959 960 961 962 963 964 965 966 967 
          "vmlal.s16  q10, d14, d6          \n"
          "vmlal.s16  q10, d16, d7          \n"
          "vmlal.s16  q10, d18, d8          \n"
          "vmlal.s16  q11, d15, d6          \n"
          "vmlal.s16  q11, d17, d7          \n"
          "vmlal.s16  q11, d19, d8          \n"

          "vmull.s16  q12, d14, d0          \n"
          "vmlal.s16  q12, d16, d1          \n"
          "vmlal.s16  q12, d18, d2          \n"
          "vmull.s16  q13, d15, d0          \n"
          "vmlal.s16  q13, d17, d1          \n"
          "vmlal.s16  q13, d19, d2          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
968 
          "vext.s8    d9, d12, d12, #1      \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
969 
          "vmovl.s8   q9, d9                \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
970 971 
          "vmovl.s8   q7, d12               \n"
          "vmovl.s8   q8, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
972 973 974 975 976 977 978 
          "vmlal.s16  q12, d14, d3          \n"
          "vmlal.s16  q12, d16, d4          \n"
          "vmlal.s16  q12, d18, d5          \n"
          "vmlal.s16  q13, d15, d3          \n"
          "vmlal.s16  q13, d17, d4          \n"
          "vmlal.s16  q13, d19, d5          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
979 980 981 
          "vld2.8     {d10, d11}, [%[input_ptr4]]  \n"
          "vld2.8     {d12, d13}, [%[input_ptr5]]  \n"
          "vext.s8    d9, d10, d10, #1      \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
982 
          "vmovl.s8   q9, d9                \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
983 984 
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d11               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
985 986 987 988 989 990 991 
          "vmlal.s16  q12, d14, d6          \n"
          "vmlal.s16  q12, d16, d7          \n"
          "vmlal.s16  q12, d18, d8          \n"
          "vmlal.s16  q13, d15, d6          \n"
          "vmlal.s16  q13, d17, d7          \n"
          "vmlal.s16  q13, d19, d8          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
992 993 994 995 996 997 998 999 1000 1001 1002 
          "vmull.s16  q14, d14, d0          \n"
          "vmlal.s16  q14, d16, d1          \n"
          "vmlal.s16  q14, d18, d2          \n"
          "vmull.s16  q15, d15, d0          \n"
          "vmlal.s16  q15, d17, d1          \n"
          "vmlal.s16  q15, d19, d2          \n"

          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q9, d9                \n"
          "vmovl.s8   q7, d12               \n"
          "vmovl.s8   q8, d13               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1003 1004 1005 1006 1007 1008 1009 
          "vmlal.s16  q14, d14, d3          \n"
          "vmlal.s16  q14, d16, d4          \n"
          "vmlal.s16  q14, d18, d5          \n"
          "vmlal.s16  q15, d15, d3          \n"
          "vmlal.s16  q15, d17, d4          \n"
          "vmlal.s16  q15, d19, d5          \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1010 1011 
          "vld2.8     {d10, d11}, [%[input_ptr6]]  \n"
          "vext.s8    d9, d10, d10, #1      \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1012 
          "vmovl.s8   q9, d9                \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1013 1014 
          "vmovl.s8   q7, d10               \n"
          "vmovl.s8   q8, d11               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1015 1016 1017 1018 1019 1020 1021 1022 
          "vmlal.s16  q14, d14, d6          \n"
          "vmlal.s16  q14, d16, d7          \n"
          "vmlal.s16  q14, d18, d8          \n"
          "vmlal.s16  q15, d15, d6          \n"
          "vmlal.s16  q15, d17, d7          \n"
          "vmlal.s16  q15, d19, d8          \n"

          "cmp        %[remain], #4               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1023 
          "blt        store_3h2w_%=               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 
          "vst1.32    {q10}, [%[output_ptr0]]!    \n"
          "vst1.32    {q12}, [%[output_ptr1]]!    \n"
          "vst1.32    {q14}, [%[output_ptr2]]!    \n"
          "cmp        %[remain], #5               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d22[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d26[0]}, [%[output_ptr1]]! \n"
          "vst1.32    {d30[0]}, [%[output_ptr2]]! \n"
          "b          end_%=                      \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1034 
          "store_3h2w_%=:                         \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1035 
          "cmp        %[remain], #2               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1036 
          "blt        store_3h1w_%=               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 
          "vst1.32    {d20}, [%[output_ptr0]]!    \n"
          "vst1.32    {d24}, [%[output_ptr1]]!    \n"
          "vst1.32    {d28}, [%[output_ptr2]]!    \n"
          "cmp        %[remain], #3               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d21[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d25[0]}, [%[output_ptr1]]! \n"
          "vst1.32    {d29[0]}, [%[output_ptr2]]! \n"
          "b          end_%=                      \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1047 
          "store_3h1w_%=:                         \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1048 1049 1050 1051 1052 1053 1054 
          "cmp        %[remain], #1               \n"
          "blt        end_%=                      \n"
          "vst1.32    {d20[0]}, [%[output_ptr0]]! \n"
          "vst1.32    {d24[0]}, [%[output_ptr1]]! \n"
          "vst1.32    {d28[0]}, [%[output_ptr2]]! \n"
          "end_%=:                                \n"
          : [output_ptr0] "+r"(output_ptr0), [output_ptr1] "+r"(output_ptr1),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1055 
            [output_ptr2] "+r"(output_ptr2), [input_ptr6] "+r"(input_ptr6),
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1056 1057 
            [input_ptr0] "+r"(input_ptr0), [input_ptr1] "+r"(input_ptr1),
            [input_ptr2] "+r"(input_ptr2), [input_ptr3] "+r"(input_ptr3),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1058 1059 1060 1061 1062 
            [input_ptr4] "+r"(input_ptr4), [input_ptr5] "+r"(input_ptr5),
            [loop] "+r"(loop)
          : [remain] "r"(remain)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15", "r0");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1063 
    }
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1064 1065 1066 

    int start_h = (output_h / 3) * 6;
    for (int h = start_h; h < input_h - 2 /*(input_h - 1) - 1*/; h += 2) {
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1067 1068 1069 
      const int8_t* input_ptr0 = input_ptr + h * input_w;
      const int8_t* input_ptr1 = input_ptr0 + input_w;
      const int8_t* input_ptr2 = input_ptr1 + input_w;
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1070 1071 
      int32_t* output_ptr0 = output_ptr + (h >> 1) * output_w;
      int loop = loops;
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 
      asm volatile(
          "vld1.32    {q0}, [%[filter_ptr]] \n"
          "vmovl.s8   q14, d0               \n"
          "vmovl.s8   q15, d1               \n"
          "vdup.s16   d0, d28[0]            \n"
          "vdup.s16   d1, d28[1]            \n"
          "vdup.s16   d2, d28[2]            \n"
          "vdup.s16   d3, d28[3]            \n"
          "vdup.s16   d4, d29[0]            \n"
          "vdup.s16   d5, d29[1]            \n"
          "vdup.s16   d6, d29[2]            \n"
          "vdup.s16   d7, d29[3]            \n"
          "vdup.s16   d8, d30[0]            \n"
          :
          : [filter_ptr] "r"(filter_ptr)
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1087 
          : "memory", "q0", "q1", "q2", "q3", "q4", "q14", "q15");
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1088 
      asm volatile(
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1089 
          "mov        r0, #12               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1090 1091 1092 
          "cmp        %[loop], #0           \n"
          "ble        start_remain_%=       \n"
          // loop 6 widths
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 
          "loop_1h6w_%=:                               \n"
          "vld2.8     {d10, d11}, [%[input_ptr0]], r0  \n"
          "vld2.8     {d12, d13}, [%[input_ptr1]], r0  \n"
          "vld2.8     {d14, d15}, [%[input_ptr2]], r0  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d10               \n"
          "vmovl.s8   q9, d11               \n"
          "vmull.s16  q11, d16, d0          \n"
          "vmlal.s16  q11, d18, d1          \n"
          "vmlal.s16  q11, d20, d2          \n"
          "vmull.s16  q12, d17, d0          \n"
          "vmlal.s16  q12, d19, d1          \n"
          "vmlal.s16  q12, d21, d2          \n"

          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q10, d9               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1110 1111 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 
          "vmlal.s16  q11, d16, d3          \n"
          "vmlal.s16  q11, d18, d4          \n"
          "vmlal.s16  q11, d20, d5          \n"
          "vmlal.s16  q12, d17, d3          \n"
          "vmlal.s16  q12, d19, d4          \n"
          "vmlal.s16  q12, d21, d5          \n"

          "vext.s8    d9, d14, d14, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d14               \n"
          "vmovl.s8   q9, d15               \n"
          "vmlal.s16  q11, d16, d6          \n"
          "vmlal.s16  q11, d18, d7          \n"
          "vmlal.s16  q11, d20, d8          \n"
          "vmlal.s16  q12, d17, d6          \n"
          "vmlal.s16  q12, d19, d7          \n"
          "vmlal.s16  q12, d21, d8          \n"
          // store row 0
          "vst1.32    {d22-d24}, [%[output_ptr0]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1131
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 
          "subs       %[loop], #1           \n"
          "bne        loop_1h6w_%=          \n"

          "start_remain_%=:                 \n"
          "cmp        %[remain], #0         \n"
          "ble        end_%=                \n"
          "vld2.8     {d10, d11}, [%[input_ptr0]]  \n"
          "vld2.8     {d12, d13}, [%[input_ptr1]]  \n"
          "vld2.8     {d14, d15}, [%[input_ptr2]]  \n"
          "vext.s8    d9, d10, d10, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d10               \n"
          "vmovl.s8   q9, d11               \n"
          "vmull.s16  q11, d16, d0          \n"
          "vmlal.s16  q11, d18, d1          \n"
          "vmlal.s16  q11, d20, d2          \n"
          "vmull.s16  q12, d17, d0          \n"
          "vmlal.s16  q12, d19, d1          \n"
          "vmlal.s16  q12, d21, d2          \n"

          "vext.s8    d9, d12, d12, #1      \n"
          "vmovl.s8   q10, d9               \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1154 1155 
          "vmovl.s8   q8, d12               \n"
          "vmovl.s8   q9, d13               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 
          "vmlal.s16  q11, d16, d3          \n"
          "vmlal.s16  q11, d18, d4          \n"
          "vmlal.s16  q11, d20, d5          \n"
          "vmlal.s16  q12, d17, d3          \n"
          "vmlal.s16  q12, d19, d4          \n"
          "vmlal.s16  q12, d21, d5          \n"

          "vext.s8    d9, d14, d14, #1      \n"
          "vmovl.s8   q10, d9               \n"
          "vmovl.s8   q8, d14               \n"
          "vmovl.s8   q9, d15               \n"
          "vmlal.s16  q11, d16, d6          \n"
          "vmlal.s16  q11, d18, d7          \n"
          "vmlal.s16  q11, d20, d8          \n"
          "vmlal.s16  q12, d17, d6          \n"
          "vmlal.s16  q12, d19, d7          \n"
          "vmlal.s16  q12, d21, d8          \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1173 1174 1175 

          "cmp        %[remain], #4               \n"
          "blt        store_1h2w_%=               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1176 
          "vst1.32    {q11}, [%[output_ptr0]]!    \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1177 1178 
          "cmp        %[remain], #5               \n"
          "blt        end_%=                      \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1179 
          "vst1.32    {d24[0]}, [%[output_ptr0]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1180 1181 1182 1183 1184 
          "b          end_%=                      \n"

          "store_1h2w_%=:                         \n"
          "cmp        %[remain], #2               \n"
          "blt        store_1h1w_%=               \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1185 
          "vst1.32    {d22}, [%[output_ptr0]]!    \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1186 1187 
          "cmp        %[remain], #3               \n"
          "blt        end_%=                      \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1188 
          "vst1.32    {d23[0]}, [%[output_ptr0]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1189 1190 1191 1192 1193 
          "b          end_%=                      \n"

          "store_1h1w_%=:                         \n"
          "cmp        %[remain], #1               \n"
          "blt        end_%=                      \n"
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1194 
          "vst1.32    {d22[0]}, [%[output_ptr0]]! \n"
H
Optimize: fuse quantize and pad op  
hjchen2 已提交
1195 1196 
          "end_%=:                                \n"
          : [output_ptr0] "+r"(output_ptr0), [input_ptr0] "+r"(input_ptr0),
H
Refine: fix depthwise conv bug and support stride=2  
hjchen2 已提交
1197 1198 1199 1200 1201 
            [input_ptr1] "+r"(input_ptr1), [input_ptr2] "+r"(input_ptr2),
            [loop] "+r"(loop)
          : [remain] "r"(remain)
          : "cc", "memory", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
            "q8", "q9", "q10", "q11", "q12", "r0");
H
Implement int8 depthwise conv3x3s1  
hjchen2 已提交
1202 1203 1204 1205 1206 1207 1208 1209 
    }
  }
#endif  // __aarch64__
}

}  // namespace math
}  // namespace operators
}  // namespace paddle_mobile