- 13 3月, 2009 1 次提交
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由 Jon Smirl 提交于
Set a non-zero speed in the MII register so that MII commands will work. Signed-off-by: NJon Smirl <jonsmirl@gmail.com>
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- 11 3月, 2009 2 次提交
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- 10 3月, 2009 5 次提交
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由 Paul Gortmaker 提交于
Commit af1c2b84 added a generic phy support, with an ID of zero and a 32 bit mask; meaning that it will match on any PHY ID. The problem is that there is a test that checked if a matching PHY was found, and if not, it printed the non-matching ID. But since there will always be a match (on the generic PHY, worst case), this test will never trip. In the case of a misconfigured PHY address, or of a PHY that isn't explicitly supported outside of the generic support, you will never see the ID of 0xffffffff, or the ID of the real (but unsupported) chip. It will silently fall through onto the generic support. This change makes that test useful again, and ensures that the selection of generic PHY support doesn't happen without some sort of notice. It also makes it explicitly clear that the generic PHY must be last in the PHY table. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NAndy Fleming <afleming@freescale.com>
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由 Wolfgang Denk 提交于
Fix typo in makefile which broke out of tree builds. Also use expolicit "rm" instead of "ln -sf" which is known to be unreliable. Signed-off-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 ksi@koi8.net 提交于
This adds tsec12ioovcr to include/asm-ppc/immap_85xx.h (was reserved.) Signed-off-by: NSergey Kubushyn <ksi@koi8.net>
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由 Andy Fleming 提交于
These were left in accidentally, and are not really useful unless the code is as broken as it was when it was being developed. Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Ed Swarthout 提交于
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com>
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- 09 3月, 2009 2 次提交
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由 Wolfgang Denk 提交于
Fix typo in makefile which broke out of tree builds. Also use expolicit "rm" instead of "ln -sf" which is known to be unreliable. Signed-off-by: NWolfgang Denk <wd@denx.de>
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git://git.denx.de/u-boot-mpc83xx由 Wolfgang Denk 提交于
Conflicts: lib_ppc/board.c Signed-off-by: NWolfgang Denk <wd@denx.de>
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- 06 3月, 2009 10 次提交
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由 Heiko Schocher 提交于
add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU. The bootcounter uses 8 bytes from the muram, because no other memory was found on this CPU for the bootcount feature. So we must correct the muram size in DTS before booting Linux. This feature is actual only implemented for MPC8360, because not all 83xx CPU have qe, and therefore no muram, which this feature uses. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
old code implemented the QE_ENET10 errata only for Silicon Revision 2.0. New code reads now the Silicon Revision register and sets dependend on the Silicon Revision the values as advised in the QE_ENET10 errata. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
- HRCW update HRCWH_BOOTSEQ_DISABLE not HRCWH_BOOTSEQ_NORMAL HRCWH_LALE_EARLY added - DDR-SDRAM settings modified. This solves sporadically problems with this memory. - CS1 now 128 MB window size - CS3 now 512 MB window size - PRAM activated - MTDPARTS_DEFAULT defined - CONFIG_HOSTNAME added - MONITOR_LEN now 384 KB Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
it is possible that some board variants have different DDR II RAM sizes. So we autodetect the size of the assembled RAM. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
This patch adds I2C mux support for the fsl_i2c driver. This allows you to add "new" i2c busses, which are reached over i2c muxes. For more infos, please look in the README and search for CONFIG_I2C_MUX. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
This patch adds I2C support for the Keymile kmeter1 board. It uses the First I2C Controller from the CPU, for accessing 4 temperature sensors, an eeprom with IVM data and the booteeprom over a pca9547 mux. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Heiko Schocher 提交于
In case where a board not uses CONFIG_POST, it is not necessary to init the DTTs when running from flash. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Dave Liu 提交于
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for tRTP according to DDR2 JEDEC spec. 2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec. 3. add the support of DDR2-533,667,800 DIMMs 4. cpo 5. make the AL to min to gain better performance. The Micron MT9HTF6472CHY-667D1 DIMMs test passed on MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate. items 1, 2 and 5: Acked-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se> Reported-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: NDave Liu <daveliu@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Valeriy Glushkov 提交于
The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by: NValeriy Glushkov <gvv@lstec.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
The SerDes initialization should be finished before negating the reset signal according to the reference manual. This isn't an issue on real hardware, but we'd better stick to the specifications anyway. Suggested-by: NLiu Dave <DaveLiu@freescale.com> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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- 02 3月, 2009 1 次提交
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由 Heiko Schocher 提交于
it is not necessary to init the DTTs so early, so move this init to board_init_r (). Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 26 2月, 2009 1 次提交
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由 Anatolij Gustschin 提交于
Fix following warning while compilation for mcc200 board: lcd.c: In function 'lcd_display_bitmap': lcd.c:625: warning: unused variable 'cmap' Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 25 2月, 2009 4 次提交
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由 Graeme Russ 提交于
Fixes commit 40797618 Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
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由 Mike Frysinger 提交于
The smc911x driver has a lot of useful defines/functions which can be used by pieces of code (such as example eeprom programmers). Rather than forcing each place to duplicate these defines/functions, split them out of the smdc911x driver into a local header. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Acked-by: NBen Warren <biggerbadderben@gmail.com> CC: Sascha Hauer <s.hauer@pengutronix.de> CC: Guennadi Liakhovetski <lg@denx.de> CC: Magnus Lilja <lilja.magnus@gmail.com> CC: Ben Warren <biggerbadderben@gmail.com>
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- 24 2月, 2009 14 次提交
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由 Guennadi Liakhovetski 提交于
The "eet" variant of the imx31_phycore board has an OLED display, using a s6e63d6 display controller on the first SPI interface, using GPIO57 as a chip-select for it. With this configuration you can display 256 colour BMP images in 16-bit RGB (RGB565) LCD mode. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Guennadi Liakhovetski 提交于
Add a driver for the Synchronous Display Controller and the Display Interface on i.MX31, using IPU for DMA channel setup. So far only displaying of bitmaps is supported, no text output. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Guennadi Liakhovetski 提交于
This patch also simplifies some ifdefs in lcd.c, introduces a generic vidinfo_t, which new drivers are encouraged to use and old drivers to switch over to. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Mark Jackson 提交于
This patch adds 16bpp BMP support to the common lcd code. Use CONFIG_BMP_16BPP and set LCD_BPP to LCD_COLOR16 to enable the code. At the moment it's only been tested on the MIMC200 AVR32 board, but extending this to other platforms should be a simple task !! Signed-off-by: NMark Jackson <mpfj@mimc.co.uk> Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Guennadi Liakhovetski 提交于
This is a driver for the S6E63D6 SPI OLED display controller from Samsung. It only provides access to controller's registers so the client can freely configure it. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Guennadi Liakhovetski 提交于
Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Guennadi Liakhovetski 提交于
This is a minimal driver, so far only managing output. It will be used by the mxc_spi.c driver. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Guennadi Liakhovetski 提交于
Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Anton Vorontsov 提交于
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe slots. Let's support them. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
We should use pci_last_busno() in pci_init_bus(), otherwise we'll erroneously re-use PCI0's first_busno for PCI1 hoses. NOTE: The patch is untested. All MPC83xx FSL boards I have have PCI1 in miniPCI form, for which I don't have any cards handy. But looking in cpu/mpc85xx/pci.c: ... #ifdef CONFIG_MPC85XX_PCI2 hose = &pci_hose[1]; hose->first_busno = pci_hose[0].last_busno + 1; And considering that we do the same for MPC83xx PCI-E support, I think this patch is correct. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
This patch fixes copy-paste issue: pci_hose[0]'s first and last busnos were used to fixup pci1's nodes. We don't see this bug triggering only because Linux reenumerate buses anyway. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
This patch fixes an issue in config space read accessors: we should fill-in the value even if we fail (e.g. skipping devices), otherwise CONFIG_PCI_SCAN_SHOW reports bogus values during boot up. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
Currently we assign first_busno = 0 for the first PCIe hose, but this scheme won't work if we have ordinary PCI hose already registered (its first_busno value is 0 too). The old code worked fine only because we have PCI disabled on MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae "mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards"). But on MPC837XERDB boards we have PCI and PCIe, so the bug actually triggers. So, to fix the issue, we should use pci_last_busno() + 1 for the first_busno (i.e. last available busno). Reported-by: NHuang Changming <Chang-Ming.Huang@freescale.com> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
This is just a handy routine that reports last PCI busno: we walk down all the hoses and return last hose's last_busno. Will be used by PCI/PCIe initialization code. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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