1. 21 5月, 2019 17 次提交
  2. 21 1月, 2019 1 次提交
  3. 08 12月, 2018 1 次提交
    • C
      ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 · ebb1a593
      Chris Packham 提交于
      This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
      of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
      Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
      release armada-18.09.2").
      
      The complete log of changes is best obtained from the mv-ddr-marvell.git
      repository but some relevant highlights are:
      
        ddr3: add missing txsdll parameter
        ddr3: fix tfaw timimg parameter
        ddr3: fix trrd timimg parameter
        merge ddr3 topology header file with mv_ddr_topology one
        mv_ddr: a38x: fix zero memory size scrubbing issue
      
      The upstream code is incorporated omitting the portions not relevant to
      Armada-38x and DDR3. After that a semi-automated step is used to drop
      unused features with unifdef
      
          find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
              xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
                       -UCONFIG_APN806 -UCONFIG_MC_STATIC \
                       -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
                       -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
                       -UA70X0
      Signed-off-by: NChris Packham <judge.packham@gmail.com>
      Reviewed-by: NStefan Roese <sr@denx.de>
      Tested-by: NBaruch Siach <baruch@tkos.co.il>
      Signed-off-by: NStefan Roese <sr@denx.de>
      ebb1a593
  4. 30 11月, 2018 1 次提交
  5. 29 9月, 2018 1 次提交
  6. 06 8月, 2018 3 次提交
  7. 26 5月, 2018 1 次提交
    • M
      tpm: disociate TPMv1.x specific and generic code · d677bfe2
      Miquel Raynal 提交于
      There are no changes in this commit but a new organization of the code
      as follow.
      
      * cmd/ directory:
              > move existing code from cmd/tpm.c in cmd/tpm-common.c
      	> move specific code in cmd/tpm-v1.c
      	> create a specific header file with generic definitions for
      	  commands only called cmd/tpm-user-utils.h
      
      * lib/ directory:
              > move existing code from lib/tpm.c in lib/tpm-common.c
      	> move specific code in lib/tpm-v1.c
      	> create a specific header file with generic definitions for
      	  the library itself called lib/tpm-utils.h
      
      * include/ directory:
              > move existing code from include/tpm.h in include/tpm-common.h
      	> move specific code in include/tpm-v1.h
      
      Code designated as 'common' is compiled if TPM are used. Code designated
      as 'specific' is compiled only if the right specification has been
      selected.
      
      All files include tpm-common.h.
      Files in cmd/ include tpm-user-utils.h.
      Files in lib/ include tpm-utils.h.
      Depending on the specification, files may include either (not both)
      tpm-v1.h or tpm-v2.h.
      Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      [trini: Fix a few more cases of tpm.h -> tpm-v1.h, some Kconfig logic]
      Signed-off-by: NTom Rini <trini@konsulko.com>
      d677bfe2
  8. 14 5月, 2018 2 次提交
  9. 09 5月, 2018 2 次提交
  10. 07 5月, 2018 1 次提交
    • T
      SPDX: Convert all of our single license tags to Linux Kernel style · 83d290c5
      Tom Rini 提交于
      When U-Boot started using SPDX tags we were among the early adopters and
      there weren't a lot of other examples to borrow from.  So we picked the
      area of the file that usually had a full license text and replaced it
      with an appropriate SPDX-License-Identifier: entry.  Since then, the
      Linux Kernel has adopted SPDX tags and they place it as the very first
      line in a file (except where shebangs are used, then it's second line)
      and with slightly different comment styles than us.
      
      In part due to community overlap, in part due to better tag visibility
      and in part for other minor reasons, switch over to that style.
      
      This commit changes all instances where we have a single declared
      license in the tag as both the before and after are identical in tag
      contents.  There's also a few places where I found we did not have a tag
      and have introduced one.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      83d290c5
  11. 28 4月, 2018 1 次提交
  12. 09 3月, 2018 1 次提交
    • M
      treewide: Fix gdsys mail addresses · d38826a3
      Mario Six 提交于
      The @gdsys.cc addresses are supposed to be used for mailing lists.
      Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc
      equivalent.
      
      Also, Dirk's address was wrong in one place; fix that as well.
      Signed-off-by: NMario Six <six@gdsys.cc>
      d38826a3
  13. 05 3月, 2018 1 次提交
  14. 07 12月, 2017 1 次提交
    • Y
      powerpc: mpc85xx: Fix static TLB table for SDRAM · 316f0d0f
      York Sun 提交于
      Most predefined TLB tables don't have memory coherence bit set for
      SDRAM. This wasn't an issue before invalidate_dcache_range() function
      was enabled. Without the coherence bit, dcache invalidation doesn't
      automatically flush the cache. The coherence bit is already set when
      dynamic TLB table is used. For some boards with different SPL boot
      method, or with legacy fixed setting, this bit needs to be set in
      TLB files.
      Signed-off-by: NYork Sun <york.sun@nxp.com>
      316f0d0f
  15. 30 11月, 2017 1 次提交
  16. 06 11月, 2017 1 次提交
    • T
      MAINTAINERS: Add missing boards and config entries · 79df00fd
      Tom Rini 提交于
      As part of my usual round of build testing, output about missing
      MAINTAINERS information was not logged, and thus often overlooked.
      Correct that mistake by ensuring that I log the output of
      genboardscfg.py every time.  As part of that, address a number of
      missing MAINTAINERS entires.  In the case of a missing file, I have put
      the original submitter down.  In the rest of the cases I have added the
      config (and sometimes relevant header file) to the existing set of file
      globs.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      79df00fd
  17. 16 8月, 2017 3 次提交
  18. 12 7月, 2017 1 次提交
    • M
      driver/ddr: Add support for setting timing in hws_topology_map · 90bcc3d3
      Marek Behún 提交于
      The DDR3 training code for Marvell A38X currently computes 1t timing
      when given board topology map of the Turris Omnia, but Omnia needs 2t.
      
      This patch adds support for enforcing the 2t timing in struct
      hws_topology_map, through a new enum hws_timing, which can assume
      following values:
        HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
                          from the number of CSs
        HWS_TIM_1T      - enforce 1t
        HWS_TIM_2T      - enforce 2t
      
      This patch also sets all the board topology maps (db-88f6820-amc,
      db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
      HWS_TIM_DEFAULT.
      Signed-off-by: NMarek Behun <marek.behun@nic.cz>
      Reviewed-by: NStefan Roese <sr@denx.de>
      Signed-off-by: NStefan Roese <sr@denx.de>
      90bcc3d3