Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>

This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: NNick Spence <nick.spence@freescale.com>

For some reason we duplicated the majority of code in lib_ppc/interrupts.c
Not know how that happened, but there is no good reason for it.

Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The flash_unlock_seq requires a sector for AMD_LEGACY.
Fix a retcode check typeo.
Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: NStefan Roese <sr@denx.de>

This patch fixes USB 2.0 communication issues on some DU440 boards.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Commit 445a7b38 introduced the following
compile warnings:

cmd_i2c.c:112: warning: missing braces around initializer
cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an error in the 8544 RM.
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com>

get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.
Signed-off-by: NRafal Czubak <rcz@semihalf.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
provides 2% or 0.4% precision depending on the
CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
boot-delay.
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>

due to the arm implementation which supposed that U-Boot is in RAM
when we jump to start_armboot
Signed-off-by: Ngnusercn <gnusercn@gmail.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

After changing SDRAM_CLKTR phase value rerun the memory preload
initialization sequence (INITPLR) to reset and relock the memory
DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
adjustment effects the phase relationship of the internal, to the
PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
Signed-off-by: NAdam Graham <agraham@amcc.com>
Signed-off-by: NVictor Gallardo <vgallardo@amcc.com>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
system information like mac addresses etc. This patch enables it.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
according to the board spec, and adds the 2nd i2c bus offset.
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>

On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
The display is still sync mode DDR freq. This patch try to fix
this. The display DDR freq is now the actual freq in both
sync and async mode.
Signed-off-by: NJason Jin <Jason.jin@freescale.com>

ePAPR says if the *cache-block-size is the same as *cache-line-size
than we don't need the *cache-line-size property.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Oops, screwed up the function name in the documenting comment for this
function.  Trivial correction in this patch.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Acked-by: NGerald Van Baren <vanbaren@cideas.com>

Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias.  This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>

The CFI flash driver starts at flash_init() which calls down into
flash_get_size().  This starts by calling flash_detect_cfi().  If said
function fails, flash_get_size() finishes by attempting to reset the
flash.  Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack.  On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address.  Which is what happens on a Blackfin system.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NStefan Roese <sr@denx.de>

Set force parameter in fdt_chosen() call in do_bootm_linux() call.
Without this, the chosen node is not overwritten if it already
exists.
Signed-off-by: NStefan Roese <sr@denx.de>

Using Gcc 4.3 detected this problem:

    ../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
    ../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
    occur when assuming that (X + c) < X is always false

To fix the problem, treat the offset as an unsigned int.

The problem report and proposed fix were provided
by Steve Papacharalambous <stevep@freescale.com>.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

The current implementation of fdt_get_path() has a couple of bugs,
fixed by this patch.

First, contrary to its documentation, on success it returns the length
of the node's path, rather than 0.  The testcase is correspondingly
wrong, and the patch fixes this as well.

Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
Specifically this happens when there is insufficient space even to
hold the path's second last component.  This behaviour is corrected,
and the testcase updated to check it.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>

Signed-off-by: NWolfgang Denk <wd@denx.de>

we need this due to the arm implementation which supposed that U-Boot
is in RAM when we jump to start_armboot

This reverts commit f96b44ce.
in order to do it for all arm board
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified.  Change to a positive value to allow
autobooting when a bootcmd is set.
Reported-by: NCoray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>