- 05 4月, 2017 4 次提交
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由 Andre Przywara 提交于
The Allwinner H5 Soc is bascially an H3 with high SRAM and ARMv8 cores. As the peripherals and the pinmuxing are almost identical, we piggy back on the shared MACH_SUN8I_H3_H5 config symbol. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Andre Przywara 提交于
Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB, while the first SRAM region is mapped at address 0. With the extended physical memory support of the A80 this was changed, so the BROM is now at address 0 and the SRAM region starts right behind this at 64KB. This configuration seems to be called "high SRAM". Instead of enumerating the SoCs which have copied this configuration, let's call a spade a spade and introduce a Kconfig option for this setup. SoCs implementing this (A80, A64 and H5, so far), can then select this configuration. Simplify the config header definition on the way. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 11 1月, 2017 1 次提交
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由 Masahiro Yamada 提交于
The bare default entry is wrong. Just remove it since the (real) entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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- 04 1月, 2017 4 次提交
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由 Andre Przywara 提交于
Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
To avoid enumerating the very same DRAM values in defconfig files for each and every Allwinner A64 board out there, let's put some sane default values in the Kconfig file. Boards with different needs can override them at any time. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The Allwinner A64 SoC starts execution in AArch32 mode, and both the boot ROM and Allwinner's boot0 keep running in this mode. So U-Boot gets entered in 32-bit, although we want it to run in AArch64. By using a "magic" instruction, which happens to be an almost-NOP in AArch64 and a branch in AArch32, we differentiate between being entered in 64-bit or 32-bit mode. If in 64-bit mode, we proceed with the branch to reset, but in 32-bit mode we trigger an RMR write to bring the core into AArch64/EL3 and re-enter U-Boot at CONFIG_SYS_TEXT_BASE. This allows a 64-bit U-Boot to be both entered in 32 and 64-bit mode, so we can use the same start code for the SPL and the U-Boot proper. We use the existing custom header (boot0.h) functionality, but restrict the existing boot0 header reservation to the non-SPL build now. A SPL wouldn't need such header anyway. This allows to have both options defined and lets us use one for the SPL and the other for U-Boot proper. Also add arch/arm/mach-sunxi/rmr_switch.S, which contains the original ARM assembly code and instructions how to re-generate the encoded version. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with other boards. To allow alternative code to be inserted, we create another, now function specific config symbol on top of it to simplify later additions. No functional change at this time. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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- 30 10月, 2016 4 次提交
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由 Chen-Yu Tsai 提交于
Both the A80 Optimus board and the Cubieboard 4 use a zq value of 4145117, or 0x3f3fdd. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
In Allwinner's SDK the A80 is clocked to 1008 MHz by default. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Philipp Tomsich 提交于
Now that DRAM initialization and clock setup is supported, we can enable SPL for the A80. [wens@csie.org: Added commit message] Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Philipp Tomsich 提交于
This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used. With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration. [wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: NChen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 24 10月, 2016 1 次提交
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由 Simon Glass 提交于
Move these option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jteki@openedev.com>
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- 20 9月, 2016 1 次提交
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Move the config IDENT_STRING to Kconfig and migrate all boards [sivadur: Migrate zynq boards] Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> [trini: Update configs, add some default to sunxi Kconfig] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 17 9月, 2016 7 次提交
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this option to Kconfig and tidy up existing uses. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 07 9月, 2016 1 次提交
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由 Masahiro Yamada 提交于
Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms can select. Then, move CONFIG_ARMV7_PSCI, which is automatically enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled. Reviewed-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 06 9月, 2016 1 次提交
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由 Andre Przywara 提交于
There is no "CONFIG_MACH_SUN50I_A64" in upstream U-Boot, so fix the name to prevent the option to be enabled. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 12 8月, 2016 1 次提交
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由 Masahiro Yamada 提交于
Linux stopped the use of keyword 'boolean' in Kconfig. Refer to commit 6341e62b212a2541efb0160c470e90bd226d5496 ("kconfig: use bool instead of boolean for type definition attributes") in Linux Kernel. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 21 6月, 2016 1 次提交
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由 Hans de Goede 提交于
This reverts commit 1a5f0de0("sunxi: make SoC variant choice mandatory"). With the optional marking in the Kconfig "make savedefconfig" will drop CONFIG_MACH_SUN4I=y from all the A10 boards, making it hard to see at a glance which family of sunxi chips the defconfig is for. This commit therefore restores the optional, and restores CONFIG_MACH_SUN4I=y to all defconfig's which had it dropped because of this. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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- 25 5月, 2016 5 次提交
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由 Hans de Goede 提交于
Recently a set of CONFIG_CMD_FOO defines was moved from being defined in config_distro_defaults to Kconfig, and added to all sunxi defconfigs to compensate. Instead of explictly selecting these in all sunxi defconfigs, simply always select these for sunxi boards. This makes the defconfigs simpler and ensures a consistent set of available commands across all sunxi boards. Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
The newer chips use a newer display pipeline, which is not supported. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
A83T, H3, and A64 have a dedicated pin for card detect on the PF pingroup. This is used in all designs. Set it as the default. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
In most other places, we sort SoC descriptions by family (sunXi) first, then by the chip name (A20). Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
The user should always select an SoC variant to support. Not choosing one doesn't make sense for a bootloader. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 12 4月, 2016 1 次提交
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由 Hans de Goede 提交于
Some boards have on board usb devices which need longer than the USB spec's 1 second to connect from board powerup. Add a config option which when non 0 adds an extra delay before the first usb bus scan. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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- 01 4月, 2016 1 次提交
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由 Siarhei Siamashka 提交于
The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: NAlexander Graf <agraf@suse.de> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 24 3月, 2016 1 次提交
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由 Hans de Goede 提交于
The H3 has USB0 - USB3, add support for having a USB vbus pin for USB3. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NIan Campbell <ijc@hellion.org.uk>
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- 24 2月, 2016 1 次提交
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由 Jelle van der Waa 提交于
SY8106A is a PMIC which is used on the Allwinner H3 Orange Pi Pc and Plus board. The VOUT1_SEL register is implemented to set the default V-CPU voltage to 1200 mV. This driver is required to ensure the SY8106A V-CPU voltage is set to 1200 mV after a software reset. On cold boot the default SY8106A output voltage is selected to be 1200 mV by a pair of resistors on the Orange Pi PC and Plus. Signed-off-by: NJelle van der Waa <jelle@vdwaa.nl> Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 26 1月, 2016 2 次提交
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由 Vishnu Patekar 提交于
Different A83T boards have different DRAM types. Banapi M3 has LPDDR3, Allwinner Homlet v1.2 has DDR3. This adds groundwork to support for new DRAM type for A83T. Introduce CONFIG_DRAM_TYPE, It'll be 3 for DDR3 and 7 for LPDDR3, must be set in respective board defconfig. Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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由 Chen-Yu Tsai 提交于
Now that we support PSCI and various security switches, we can let U-boot boot Linux into non-secure and HYP mode. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 21 1月, 2016 1 次提交
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由 Jelle van der Waa 提交于
Signed-off-by: NJelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: NHans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 10 12月, 2015 1 次提交
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由 vishnupatekar 提交于
Allwinner A83T is octa-core cortex-a7 SOC. This enables support for A83T. SMP is not yet supported. Signed-off-by: NVishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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- 22 11月, 2015 1 次提交
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由 Jens Kuske 提交于
Based on existing A23/A33 code and the original H3 boot0. Signed-off-by: NJens Kuske <jenskuske@gmail.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NHans de Goede <hdegoede@redhat.com>
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