The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
Add a (64-bit only) defconfig defining the required options to build
the U-Boot proper.

Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
and changing the differing components accordingly.
This is a preliminary device tree mostly for U-Boot's own sake, it
is expected to be updated once the official DT gets accepted upstream.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
[squash the commits, update the commit message]
Signed-off-by: NJagan Teki <jagan@openedev.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The Allwinner H5 Soc is bascially an H3 with high SRAM and ARMv8 cores.
As the peripherals and the pinmuxing are almost identical, we piggy
back on the shared MACH_SUN8I_H3_H5 config symbol.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
To allow sharing the clocks, GPIO and driver code easily, create an
architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol.
Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and
let it be selected by a new shared Kconfig option.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB,
while the first SRAM region is mapped at address 0.
With the extended physical memory support of the A80 this was changed,
so the BROM is now at address 0 and the SRAM region starts right behind
this at 64KB. This configuration seems to be called "high SRAM".
Instead of enumerating the SoCs which have copied this configuration,
let's call a spade a spade and introduce a Kconfig option for this setup.
SoCs implementing this (A80, A64 and H5, so far), can then select this
configuration.
Simplify the config header definition on the way.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Instead of enumerating all SoC families that need that bit set, let's
just express this more clearly: The SMP bits needs to be set on
SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the
other way round, so we use ! CPU_IS_UP and ! ARM64.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+
SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM,
Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the
board (also capable of OTG), a USB Type-A socket and a MicroSD slot.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The bare default entry is wrong.  Just remove it since the (real)
entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marex@denx.de>

Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We disable FEL support for now by making its compilation conditional
and disabling it for ARM64, as the code isn't ready yet.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jagan@openedev.com>

To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The Allwinner A64 SoC starts execution in AArch32 mode, and both
the boot ROM and Allwinner's boot0 keep running in this mode.
So U-Boot gets entered in 32-bit, although we want it to run in AArch64.

By using a "magic" instruction, which happens to be an almost-NOP in
AArch64 and a branch in AArch32, we differentiate between being
entered in 64-bit or 32-bit mode.
If in 64-bit mode, we proceed with the branch to reset, but in 32-bit
mode we trigger an RMR write to bring the core into AArch64/EL3 and
re-enter U-Boot at CONFIG_SYS_TEXT_BASE.
This allows a 64-bit U-Boot to be both entered in 32 and 64-bit mode,
so we can use the same start code for the SPL and the U-Boot proper.

We use the existing custom header (boot0.h) functionality, but restrict
the existing boot0 header reservation to the non-SPL build now. A SPL
wouldn't need such header anyway. This allows to have both options
defined and lets us use one for the SPL and the other for U-Boot proper.

Also add arch/arm/mach-sunxi/rmr_switch.S, which contains the original
ARM assembly code and instructions how to re-generate the encoded
version.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
other boards. To allow alternative code to be inserted, we create
another, now function specific config symbol on top of it to simplify
later additions. No functional change at this time.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Add board support for sun8i_r16 Nintendo NES Classic edition.
Signed-off-by: NFUKAUMI Naoki <naobsd@gmail.com>
[jagan: Add commit message body]
Signed-off-by: NJagan Teki <jagan@openedev.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

The Cubieboard4 is an A80 SoC based development board from Cubietech.

This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector,
HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT
combo chip, headphone and microphone jacks, IR receiver, and GPIO headers.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
 instead of adding a new defconfig]
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Both the A80 Optimus board and the Cubieboard 4 use a zq value of
4145117, or 0x3f3fdd.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

In Allwinner's SDK the A80 is clocked to 1008 MHz by default.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The A80 can support 8-bit eMMC with reset on the PC pingroups.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Now that DRAM initialization and clock setup is supported,
we can enable SPL for the A80.

[wens@csie.org: Added commit message]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.

With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.

[wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks]
[hdegoede@redhat.com: Fix checkpatch warnings]
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Move these option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jteki@openedev.com>

Move the config IDENT_STRING to Kconfig and migrate all boards

[sivadur: Migrate zynq boards]
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: NTom Rini <trini@konsulko.com>

The NanoPi NEO is a simple h3 board with 512MB RAM, ethernet, one usb
and one usb OTG connector.
Signed-off-by: NJelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this option to Kconfig and tidy up existing uses.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select.  Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Casting "int"s to pointers is only valid for 32-bit systems.
Add the appropriate pointer type cast to avoid a compiler warning
when compiling for AArch64.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

There is no "CONFIG_MACH_SUN50I_A64" in upstream U-Boot, so fix
the name to prevent the option to be enabled.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.

The dts file is identical to the one submitted to the upstream kernel,
except that it has the pending patch to enable the ethernet controller
squashed in, as u-boot already has sun8i-emac support.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

A33-OLinuXino is A33 development board designed by Olimex LTD.

It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector,
headphone and mic jacks, connector for LiPo battery and optional
4GB NAND Flash.

It has two 40-pin headers. One for LCD panel, and one for
additional modules. Also there is CSI/DSI connector.

The dts files are identical to the ones submitted to the upstream kernel.
Signed-off-by: NStefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

The iNet D978 rev2 is a tablet board designed by iNet, which is intended to
use on 10" tablets with a appearance like Apple iPad. It has A33 SoC, 1GB
RAM, 8GB/16GB NAND, SDIO Wi-Fi, a MicroUSB port and a MicroSD slot.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Add a defconfig and dts file for the Empire Electronix M712 tablet, this
is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.

The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>

Add a defconfig and dts file for tablets using the generic inet-q972 PCB.

Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.

This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.

The dts files are identical to the ones submitted to the upstream kernel.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Linux stopped the use of keyword 'boolean' in Kconfig.

Refer to commit 6341e62b212a2541efb0160c470e90bd226d5496 ("kconfig:
use bool instead of boolean for type definition attributes")
in Linux Kernel.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
are always 0 on H3 making it a poor candidate to use as source for the
serialnr / mac-address, and the other non constant words (1 and 2) also
have quite a few bits which are the same for some boards,

This commits switches to using the crc32 of words 1 - 3 to get a
more unique value for the mac-address / serialnr.

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>