- 03 2月, 2021 1 次提交
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由 Simon Glass 提交于
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 16 7月, 2020 1 次提交
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由 Sébastien Szymanski 提交于
Quoting Ye Li from NXP: "We have confirmed with PMIC team, 0x35 is used only on early chips and not used any more. 0x25 is the final address." Fix it by merging power_pca9450a_init and power_pca9450b_init into one function power_pca9450_init. Signed-off-by: NSébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NYe Li <ye.li@nxp.com>
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- 08 6月, 2020 4 次提交
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由 Peng Fan 提交于
We no need invoke the code, since spl framework could help us do that. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Peng Fan 提交于
Use spl_early_init to replace spl_init, spl_init will be invoked in board_init_r, we only need use spl_early_init to setup malloc and scan early dt. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Peng Fan 提交于
timer_init has been invoked in arch_cpu_init, no need to invoke it again in board code. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Peng Fan 提交于
Drop useless getting ccm device, there is no need to explicted do this in board code, and we not enable SPL CLK currently. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NFabio Estevam <festevam@gmail.com>
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- 19 5月, 2020 4 次提交
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由 Simon Glass 提交于
Move this header out of the common header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this uncommon header out of the common header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this uncommon header out of the common header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 01 5月, 2020 2 次提交
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由 Fabio Estevam 提交于
The comment does not relate to the setup_i2c() function, so just remove it. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Claudius Heine 提交于
Use the `do_reset` implementation of `arch/arm/lib/reset.c` in SPL instead. It is very close to what is done here, anyway, and plays more nicely with the rest of U-Boot than adding a custom `do_reset` implementation into board files. `do_reset` from `arch/arm/lib/reset.c` calls `reset_cpu` with 0 as the addr parameter while the boards are passing WDOG1_BASE_ADDR. This is ok because the `reset_cpu` implementation uses WDOG1_BASE_ADDR by default if 0 is passed in. Co-Authored-by: NHarald Seiler <hws@denx.de> Signed-off-by: NClaudius Heine <ch@denx.de> Signed-off-by: NHarald Seiler <hws@denx.de> Reviewed-by: NMarek Vasut <marex@denx.de>
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- 25 1月, 2020 2 次提交
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由 Simon Glass 提交于
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: NSimon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Move this function out of common.h and into a relevant header file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 18 1月, 2020 2 次提交
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由 Simon Glass 提交于
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: NSimon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Move this function out of common.h and into a relevant header file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 08 1月, 2020 1 次提交
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由 Peng Fan 提交于
Add basic i.MX8MP EVK board support U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) power_pca9450b_init DDRINFO: start DRAM init DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Failed to find clock node. Check device tree WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800) CPU: Freescale i.MX8MP rev1.0 at 1000 MHz Reset cause: POR Model: NXP i.MX8MPlus EVK board DRAM: 6 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 u-boot=> mmc list FSL_SDHC: 1 (SD) FSL_SDHC: 2 Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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- 05 11月, 2019 1 次提交
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由 Peng Fan 提交于
Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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- 04 11月, 2019 2 次提交
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由 Peng Fan 提交于
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for DRAM and linux suspend voltage requirement. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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由 Peng Fan 提交于
We are going to add i2c pmic support before dram could be used. So we need enable clk driver earlier, so use spl_early_init and move clock controller probe eariler to board_init_f. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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- 08 10月, 2019 1 次提交
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由 Peng Fan 提交于
Add board and SoC dts Add ddr training code support SD/MMC/GPIO/PINCTRL/UART Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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