Use more safer refresh time value for 6GB LPDDR4 on this EVK board.
Update the parameters for every frequency point.
Signed-off-by: NYe Li <ye.li@nxp.com>
Reviewed-by: NJacky Bai <ping.bai@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

After switching to new LPDDR4 firmware 202006 version, have to
update the LPDDR4 timing accordingly from RPA tool.
Signed-off-by: NYe Li <ye.li@nxp.com>
Tested-by: NSherry Sun <sherry.sun@nxp.com>
Tested-by: NJacky Bai <ping.bai@nxp.com>
Reviewed-by: NJacky Bai <ping.bai@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Add inline ECC support for lpddr4 on imx8mp-evk. And add a config which
can enable/disable inline ECC feature for lpddr4 on imx8mp-evk board.
Signed-off-by: NSherry Sun <sherry.sun@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

These files should not be in U-Boot repo
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg

The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Signed-off-by: NAlice Guo <alice.guo@nxp.com>

Add board code to configure the network interface
Add net defconfig
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)",
the last not 512bytes aligned data wat cut off and not burned into SD
card.

Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only
burned 1085440 bytes, the leaving 168 bytes were not burnned and cause
boot issue.

So update README dd command to add "conv=notrunc"
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Quoting Ye Li from NXP:

    "We have confirmed with PMIC team, 0x35 is used only on early chips
    and not used any more. 0x25 is the final address."

Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.
Signed-off-by: NSébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NYe Li <ye.li@nxp.com>

Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.
Signed-off-by: NYe Li <ye.li@nxp.com>
Signed-off-by: NSilvano di Ninno <silvano.dininno@nxp.com>
Tested-by: NSilvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.
Reviewed-by: NYe Li <ye.li@nxp.com>
Signed-off-by: NJian Li <jian.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

1. set SCHED.rdwr_idle_gap=0
2. set SCHED.pageclose=1
Reviewed-by: NJacky Bai <ping.bai@nxp.com>
Signed-off-by: NJian Li <jian.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Need to enable read urgent for NoC panic signal

Signed-off-by: Jian Li <jian.li@nxp.com
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

We no need invoke the code, since spl framework could help
us do that.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Use spl_early_init to replace spl_init, spl_init will be invoked
in board_init_r, we only need use spl_early_init to setup malloc
and scan early dt.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NFabio Estevam <festevam@gmail.com>

timer_init has been invoked in arch_cpu_init, no need to invoke
it again in board code.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Drop useless getting ccm device, there is no need to explicted do this
in board code, and we not enable SPL CLK currently.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Add a README file explaining the U-Boot build and SD card flash procedures.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Move this header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The comment does not relate to the setup_i2c() function, so just
remove it.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Use the `do_reset` implementation of `arch/arm/lib/reset.c` in SPL
instead.  It is very close to what is done here, anyway, and plays
more nicely with the rest of U-Boot than adding a custom `do_reset`
implementation into board files.

`do_reset` from `arch/arm/lib/reset.c` calls `reset_cpu` with 0 as the
addr parameter while the boards are passing WDOG1_BASE_ADDR.  This is
ok because the `reset_cpu` implementation uses WDOG1_BASE_ADDR by
default if 0 is passed in.
Co-Authored-by: NHarald Seiler <hws@denx.de>
Signed-off-by: NClaudius Heine <ch@denx.de>
Signed-off-by: NHarald Seiler <hws@denx.de>
Reviewed-by: NMarek Vasut <marex@denx.de>

At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.
Signed-off-by: NSimon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: NTom Rini <trini@konsulko.com>

Move this function out of common.h and into a relevant header file.
Signed-off-by: NSimon Glass <sjg@chromium.org>

At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.
Signed-off-by: NSimon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: NTom Rini <trini@konsulko.com>

Move this function out of common.h and into a relevant header file.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2
Signed-off-by: NPeng Fan <peng.fan@nxp.com>