1. 16 9月, 2007 6 次提交
  2. 14 9月, 2007 1 次提交
  3. 12 9月, 2007 1 次提交
  4. 11 9月, 2007 5 次提交
  5. 10 9月, 2007 3 次提交
  6. 09 9月, 2007 3 次提交
  7. 08 9月, 2007 2 次提交
    • G
      [PPC440SPe] PCIe environment settings for Katmai and Yucca · 6efc1fc0
      Grzegorz Bernacki 提交于
      - 'pciconfighost' is set by default in order to be able to scan bridges
      behind the primary host/PCIe
      
      - 'pciscandelay' env variable is recognized to allow for user-controlled
      delay before the PCIe bus enumeration; some peripheral devices require a
      significant delay before they can be scanned (e.g. LSI8408E); without the
      delay they are not detected
      Signed-off-by: NGrzegorz Bernacki <gjb@semihalf.com>
      6efc1fc0
    • G
      [PPC440SPe] Improve PCIe configuration space access · 7f191393
      Grzegorz Bernacki 提交于
      - correct configuration space mapping
      - correct bus numbering
      - better access to config space
      
      Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
      first device on the first bus. We now allow to configure up to 16 buses;
      also, scanning for devices behind the PCIe-PCIe bridge is supported, so
      peripheral devices farther in hierarchy can be identified.
      Signed-off-by: NGrzegorz Bernacki <gjb@semihalf.com>
      7f191393
  8. 07 9月, 2007 15 次提交
  9. 06 9月, 2007 3 次提交
  10. 05 9月, 2007 1 次提交
    • K
      Fix ULI RTC support on MPC8544 DS · 56a92705
      Kumar Gala 提交于
      The RTC on the M1575 ULI chipset requires a dummy read before
      we are able to talk to the RTC.  We accomplish this by adding a
      second memory region to the PHB the ULI is on and read from it.
      
      The second region is added to maintain compatiabilty with Linux's
      view of the PCI memory map.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      56a92705