- 19 1月, 2021 38 次提交
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由 Jorge Ramirez-Ortiz 提交于
Fix typo which would cause a build error. Fixes: 3eaac630 ("net: introduce packet capture support") Signed-off-by: NJorge Ramirez-Ortiz <jorge@foundries.io>
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由 Harm Berntsen 提交于
When the tftp server did not send any OACK, the tftp_next_ack variable was not set to the correct value . As the server was transmitting blocks we generated a lot of 'Received unexpected block: $n, expected $n+1' error messages. Depending on the timeout setting the transfer could still complete though. Signed-off-by: NHarm Berntsen <harm.berntsen@nedap.com> CC: Ramon Fried <rfried.dev@gmail.com> Reviewed-By: NRamon Fried <rfried.dev@gmail.com>
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由 David Rivshin 提交于
While doing DHCP the interface IP is set to 0.0.0.0. This causes the check in net.c on dst_ip to be effectively skipped, and all IP datagrams are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the matching MAC address (regardless of destination IP), the result is that an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is 0.0.0.0, which is an illegal source address. This can happen in common practice with the following sequence: DHCP (U-Boot or OS) acquires IP address 10.0.0.1 System reboots U-Boot starts DHCP and send DHCP DISCOVER DHCP server decides to OFFER 10.0.0.1 again (perhaps because of existing lease or manual configuration) DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it DHCP server still has our MAC address in its ARP table for 10.0.0.1 U-Boot receives PING, and responds with an illegal source address This may further result in a the DHCP server seeing the response as confirmation that someone is squatting on 10.0.0.1, and picking a new IP address from the pool to try again Signed-off-by: NDavid Rivshin <drivshin@allworx.com>
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由 Ian Ray 提交于
Implement programming MAC address to the hardware also for device model configuration. Fixes: b565b18a ("board: ge: bx50v3: Enable DM for PCI and ethernet") Signed-off-by: NIan Ray <ian.ray@ge.com> Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.com>
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由 Matthias Schiffer 提交于
Running the start() handler twice without a stop() inbetween completely breaks communication for some ethernet drivers like fec_mxc. eth_halt() is called before each eth_init(). Due to the switch to eth_is_active() in commit 68acb51f ("net: Only call halt on a driver that has been init'ed"), this is not sufficient anymore when netconsole is active: eth_init_state_only()/eth_halt_state_only() manipulate the state check that is performed by eth_is_active() without actually calling into the driver. The issue can be triggered by starting a network operation (e.g. ping or tftp) while netconsole is active. Add an additional "running" flag that reflects the actual state of the driver and use it to ensure that eth_halt() actually stops the device as it is supposed to. Fixes: 68acb51f ("net: Only call halt on a driver that has been init'ed") Signed-off-by: NMatthias Schiffer <matthias.schiffer@ew.tq-group.com>
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由 Tom Rini 提交于
- Assorted MediaTek, AST2x00 updates - Assorted driver fixes for various platforms - Keymile platform updates - Add pwm command, mp5416 pmic driver
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由 Weijie Gao 提交于
The input system clock for mt7622 timer is 10MHz and can be retrieved through the clk driver. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
The timer being used by this driver may have already been used by first stage bootloader (e.g. ATF/preloader), and it's settings may differ from what this driver is going to use. This may cause issues, such as inaccurate timer frequency due to incorrect clock divider. This patch adds the initialization code to avoid them. Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Heinrich Schuchardt 提交于
If no GPIO controller is found, the return value should not depend on a random value on the stack. Initialize variable ret. The problem was indicated by cppcheck. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: NChunfeng Yun <chunfeng.yun@mediatek.com>
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由 Heinrich Schuchardt 提交于
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write() and mw_eeprom_read() have incorrect loop conditions: while (len <= 2) { CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Avoid calling free(addr) twice if the device for ucode is not found. The problem was indicated by cppcheck. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Freeing a buffer before calling hang() is superfluous. Removing the call reduces the SPL size. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Andrey Zhizhikin 提交于
Update branch and version information of ATF and DDR firmware files to point to latest releases provided by NXP. This is especially critical for imx8mp evk, as the ATF support for that SoC is only available in latest releases. Align all SoCs from imx8m family to use identical revisions of ATF and DDR firmware. Signed-off-by: NAndrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Heinrich Schuchardt 提交于
Calling calloc() for 0 members does not make any sense. Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally unreasonable. The current code will lead to a NULL dereference in bcm6348_iudma_enable(). The assignments for ch_priv->busy_desc are obviously swapped. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Pragnesh Patel 提交于
Add the command "pwm" for controlling the pwm channels. This command provides pwm invert/config/enable/disable functionalities via PWM uclass drivers Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tim Harvey 提交于
This adds basic register access and child regulator binding for the Monolithic MP5416 Power Management IC which integrates four DC/DC switching converters and five LDO regulators. Signed-off-by: NTim Harvey <tharvey@gateworks.com>
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由 Chia-Wei, Wang 提交于
Add the default configuration for the AST2600 EVB. Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Chia-Wei, Wang 提交于
Add low level platform initialization for the AST2600 SoC. The 2-stage booting with U-Boot SPL are leveraged to support different booting mode. However, currently the patch supports only the booting from memory-mapped SPI flash. Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Chia-Wei, Wang 提交于
AST2600 is the 7th generation of Aspeed SoC designated for Interated Remote Management Processor. AST2600 has significant performance improvement by integrating 1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the controllers are also improved with more features and better performance than preceding AST24xx/AST25xx. Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Chia-Wei, Wang 提交于
Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Chia-Wei, Wang 提交于
AST2600 has 8 watchdog timers including 8 sets of 32-bit decrement counters, based on 1MHz clock. A 64-bit reset mask is also supported to specify which controllers should be reset by the WDT reset. Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Dylan Hung 提交于
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600. The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb), 512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported. Signed-off-by: NDylan Hung <dylan_hung@aspeedtech.com> Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: NRyan Chen <ryan_chen@aspeedtech.com>
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由 Ryan Chen 提交于
This patch adds the clock control driver for the AST2600 SoC. Signed-off-by: NRyan Chen <ryan_chen@aspeedtech.com> Signed-off-by: NChia-Wei, Wang <chiawei_wang@aspeedtech.com>
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由 Kate Liu 提交于
Set environment for Nand flash (U-boot 2020.04): - add nand flash in the device tree - add new default configuration file for G3 using parallel Nand - set nand parameters in presidio_asic.h Signed-off-by: NKate Liu <kate.liu@cortina-access.com> Signed-off-by: NAlex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Kate Liu 提交于
Add Cortina Access parallel Nand support for CAxxxx SOCs Signed-off-by: NKate Liu <kate.liu@cortina-access.com> Signed-off-by: NAlex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> CC: Scott Wood <oss@buserror.net> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Holger Brunck 提交于
Disable some unneeded config options and adapt the ident string. CC: Stefan Roese <sr@denx.de> Signed-off-by: NHolger Brunck <holger.brunck@hitachi-powergrids.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Holger Brunck 提交于
Our kirkwood device embeds a USB host controller that is now used on some boards. This enables the support of USB and the corresponding driver. Signed-off-by: NHolger Brunck <holger.brunck@hitachi-powergrids.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Harm Berntsen 提交于
The driver only needs to retrieve the pin for the ACPI info. The driver itself works without depending on GPIO. Signed-off-by: NHarm Berntsen <harm.berntsen@nedap.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Harm Berntsen 提交于
The pci_mmc.c driver can generate ACPI info and therefore includes asm/acpi_table.h by proxy. This file does not exist for the ARM architecture and thus code compilation failed when using this driver on ARM. Signed-off-by: NHarm Berntsen <harm.berntsen@nedap.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Harm Berntsen 提交于
As no gpio.h is defined for this architecture, to avoid compilation failure, do not include <asm/arch/gpio.h> for QEMU. Signed-off-by: NHarm Berntsen <harm.berntsen@nedap.com>
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由 Fabien Parent 提交于
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183 SoC. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
mkimage is only able to package aarch32 binaries. Add support for AArch64 images. One can create a ARM64 image using the following command line: mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1" -d bl2.bin bl2.img Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
Enable fastboot commands for mt8516 pumpkin board. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
Enable USB gadget on pumpkin. This requires to also enable BOARD_LATE_INIT since the init is done in board_late_init function. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
Initialize USB device on pumpkin if it is enabled in the config. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
Enable the USB port for MT8516 Pumpkin Board. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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由 Fabien Parent 提交于
Add support for USB on mt8516 based SoC. Signed-off-by: NFabien Parent <fparent@baylibre.com>
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- 18 1月, 2021 2 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-riscv由 Tom Rini 提交于
- Update qemu-riscv.rst build instructions. - Add support for SPI on Kendryte K210. - Add Microchip PolarFire SoC Icicle Kit support. - Add support for an early timer. - Select TIMER_EARLY to avoid infinite recursion for Trace.
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for documentation tag doc-2021-04-rc1 * document man-page base command * move README.fdt-overlays to HTML documentation * add synopsis for pstore command
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