- 08 10月, 2020 2 次提交
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由 Andre Przywara 提交于
The cfi-flash driver uses an open-coded version of the generic algorithm to decode and translate multiple frames of a "reg" property. This starts off the wrong foot by using the address-cells and size-cells properties of *this* very node, and not of the parent. This somewhat happened to work back when we were using a wrong default size of 2, but broke about a year ago with commit 0ba41ce1 ("libfdt: return correct value if #size-cells property is not present"). Instead of fixing the reinvented wheel, just use the generic function that does all of this properly. This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding a wrong flash base address: DRAM: 1 GiB Flash: "Synchronous Abort" handler, esr 0x96000044 elr: 00000000000211dc lr : 00000000000211b0 (reloc) elr: 000000007ff5e1dc lr : 000000007ff5e1b0 x0 : 00000000000000f0 x1 : 000000007ff5e1d8 x2 : 000000007edfbc48 x3 : 0000000000000000 x4 : 0000000000000000 x5 : 00000000000000f0 x6 : 000000007edfbc2c x7 : 0000000000000000 x8 : 000000007ffd8d70 x9 : 000000000000000c x10: 0400000000000003 x11: 0000000000000055 ^^^^^^^^^^^^^^^^ Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Vignesh Raghavendra 提交于
When possible use DMA for reading from CFI flash, this provides upto 5x improvement in read performance with high speed CFI compliant flashes like HyperFlash. Code will gracefully fallback to CPU copy when DMA is unavailable. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NStefan Roese <sr@denx.de>
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- 30 9月, 2020 9 次提交
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由 Sean Anderson 提交于
This member was presumably dropped when this driver was converted from Linux. However, it is still used in log statements during initialization. This patch adds the member back. In addition, allocation of struct vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows it to be allocated by DM (if it is being used) and for dev to be initialized. Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
There are too many levels of indirection when calling dev_err. This is an artifact of the conversion of brcmnand_host.pdev from a struct platform_device (which has a member `dev` pointing to a struct device) to struct udevice. Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
Use mtd_info to get a device to log with. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
Get it from spinand->slave->dev. Another option would be to use spinand_to_mtd(spinand)->dev, but this is what the existing code uses. Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
This fixes dev_xxx() not always being called with a device. In spi_nor_reg_read, a the slave device may not always be available, so we use bus and cs instead. Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
This header is needed so struct udevice can be used in dev_xxx(). Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
Usually the device is gotten from sunxi_nfc. This is a struct device and not a struct udevice, but the whole driver seems to be written wihout DM anyway... In a few instances, this patch modifies functions to take an nfc to log with. In once instance we use mtd_info's device since there is no nfc. Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Sean Anderson 提交于
Use the device from any mtd already available, or from the active mtd via pxa3xx_nand_info if one is not. Signed-off-by: NSean Anderson <seanga2@gmail.com> Tested-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Heinrich Schuchardt 提交于
Fix a typo %s/interract/interact/ Use Samsung's capitalization of their trademarks %s/onenand/OneNAND/ %s/Hyperflash/HyperFlash/ Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NStefan Roese <sr@denx.de> [trini: Add other Hyperflash cases as noted by Stefan] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 24 9月, 2020 1 次提交
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由 Vladimir Vid 提交于
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU and ESPRESSObin v7. Signed-off-by: NVladimir Vid <vladimir.vid@sartura.hr> [a.heider: adapt commit message to mainline] Signed-off-by: NAndre Heider <a.heider@gmail.com>
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- 23 9月, 2020 2 次提交
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由 Michal Simek 提交于
NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with !DM that's why Kconfig it showing it as error: WARNING: unmet direct dependencies detected for DM_MTD Depends on [n]: DM [=n] Selected by [y]: - NAND_ARASAN [=y] && MTD_RAW_NAND [=y] Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Michal Simek 提交于
The most of drivers are using '_' instead of '-' in driver name. That's why sync up these names to be aligned. It looks quite bad to see both in use. It is visible via dm tree command. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 9月, 2020 1 次提交
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由 T Karthik Reddy 提交于
Nand writes should skip the bad blocks with "nand write" command. In case of bad blocks with above 32-bit address, nand_block_isbad() returns false due to truncated bad block address. In below code segment, if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is happening. Cast 'mtd->erasesize' with loff_t to fix this issue. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 13 8月, 2020 7 次提交
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由 Christophe Kerello 提交于
FMC2 EBI support has been added. Common resources (registers base address and clock) can now be shared between the 2 drivers using "st,stm32mp1-fmc2-nfc" compatible string. It means that the common resources should now be found in the parent device when EBI node is available. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
This patch uses clrsetbits_le32 function instead of multiple instructions. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
This patch removes custom macros and uses FIELD_PREP and FIELD_GET macros. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
This patch renames functions and local variables. This cleanup is done to get all functions starting by stm32_fmc2_nfc in the FMC2 raw NAND driver when all functions will start by stm32_fmc2_ebi in the FMC2 EBI driver. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
FMC2_TIMEOUT_5S will be used each time that we need to wait. It was seen, during stress tests in an overloaded system, that we could be close to 1 second, even if we never met this value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
Remove inline comments that are useless since function label are self explanatory. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Christophe Kerello 提交于
The chip select defined in the device tree could only be 0 or 1. Signed-off-by: NChristophe Kerello <christophe.kerello@st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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- 05 8月, 2020 1 次提交
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由 Doyle, Patrick 提交于
In the unlikely event that both blocks 10 and 11 are marked as bad (on a 32 bit machine), then the process of marking block 10 as bad stomps on cached entry for block 11. There are (of course) other examples. Signed-off-by: NPatrick Doyle <pdoyle@irobot.com> Reviewed-by: NRichard Weinberger <richard@nod.at>
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- 04 8月, 2020 3 次提交
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由 Simon Glass 提交于
This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The -ENODEV error value in spi_nor_read_id() is incorrect since there clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead which has the virtue of being less common. Fix the return value in spi_nor_scan(). Also there are a few printf() statements which should be debug() since they bloat the code with unused strings at present. Fix those while here. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
In some cases SPL needs to be able to erase but TPL just needs to read. Allow these to have separate settings for SPI_FLASH_TINY. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 21 7月, 2020 6 次提交
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由 Shivamurthy Shastri 提交于
Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Shivamurthy Shastri 提交于
Add device table for M70A series Micron SPI NAND devices. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Shivamurthy Shastri 提交于
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Shivamurthy Shastri 提交于
Add device table for M79A and M78A series Micron SPI NAND devices. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Shivamurthy Shastri 提交于
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage details as a comment. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Shivamurthy Shastri 提交于
In order to add new Micron SPI NAND devices, we generalized the OOB layout structure and function names. Signed-off-by: NShivamurthy Shastri <sshivamurthy@micron.com> Acked-by: NJagan Teki <jagan@amarulasolutions.com>
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- 17 7月, 2020 1 次提交
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由 Martin Kaistra 提交于
The types of "offset" and "size" of "struct mtd_partition" are uint64_t, while mtd_parse_partitions() uses int to work with these values. When the offset reaches 2GB, it is interpreted as a negative value, which leads to error messages like mtd: partition "<partition name>" is out of reach -- disabled eg. when using the "ubi part" command. Fix this by using uint64_t for cur_off and cur_sz. Signed-off-by: NMartin Kaistra <martin.kaistra@linutronix.de> Reviewed-by: NKurt Kanzenbach <kurt@linutronix.de> Reviewed-by: NHeiko Schocher <hs@denx.de>
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- 11 7月, 2020 2 次提交
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由 Ley Foon Tan 提交于
Fixed delay 200us is not working in certain platforms. Change to poll for reset completion status to have more reliable reset process. Controller will set the rst_comp bit in intr_status register after controller has completed its reset and initialization process. Tested-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NRadu Bacrau <radu.bacrau@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Ley Foon Tan 提交于
Always put the controller in reset, then take it out of reset. This is to make sure controller always in reset state in both SPL and proper Uboot. This is preparation for the next patch to poll for reset completion (rst_comp) bit after reset. Tested-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NRadu Bacrau <radu.bacrau@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 10 7月, 2020 3 次提交
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由 Walter Lozano 提交于
Currently when using OF_PLATDATA the binding between devices and drivers is done trying to match the compatible string in the node with a driver name. However, usually a single driver supports multiple compatible strings which causes that only devices which its compatible string matches a driver name get bound. To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro, which generates no code at all, but allows an easy way to declare driver name aliases. Thanks to this, dtoc could be improve to look for the driver name based on its alias when it populates the U_BOOT_DEVICE entry. Signed-off-by: NWalter Lozano <walter.lozano@collabora.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Walter Lozano 提交于
When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: NWalter Lozano <walter.lozano@collabora.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Heinrich Schuchardt 提交于
Compiling drivers/mtd/spi/sandbox.c fails when compiled with CONFIG_LOG=n: In file included from include/common.h:20, from drivers/mtd/spi/sandbox.c:13: drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=] 295 | log_content(" cmd: transition to %s state\n", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’ 37 | #define pr_fmt(fmt) fmt | ^~~ include/log.h:128:30: note: in expansion of macro ‘log_nop’ 128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \ | ^~~~~~~ drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro ‘log_content’ 295 | log_content(" cmd: transition to %s state\n", | ^~~~~~~~~~~ drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here 295 | log_content(" cmd: transition to %s state\n", | ~^ | | | char * | %d Supply function sandbox_sf_state_name() independent of CONFIG_LOG. Fixes: c3aed5db ("sandbox: spi: Add more logging") Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 09 7月, 2020 2 次提交
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由 Pragnesh Patel 提交于
Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Signed-off-by: NPragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Dario Binacchi 提交于
The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NDario Binacchi <dariobin@libero.it> Reviewed-by: NMichael Trimarchi <michael@amarulasolutions.com>
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