U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.

To be able to use SPL, boards have to provide a supported SPL boot
device.
Signed-off-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>

U-Boot SPL can be run in a different privilege mode from U-Boot proper.
Add new configuration entries for SPL to allow the run mode to be
configured independently of U-Boot proper.

Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE
configuration symbols to also cover the SPL equivalents. Ensure that
files compatible with only one privilege mode are not included in builds
targeting an incompatible privilege mode.
Signed-off-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>

Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: NAdam Ford <aford173@gmail.com>

Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

This is based off of Klaus Goger's work in 8adc9d
Signed-off-by: NRohan Garg <rohan.garg@collabora.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Since there is no one using this board, remove it.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Rock64 has a USB3.0 port, enable the controller so that we can use it.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, edma, qdma, gpu, display and sec.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add defines for all the SEC job rings base addresses.
Signed-off-by: NLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: NHoria Geantă <horia.geanta@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Define ARCH_MISC_INIT for LS1028AQDS platform to handle board
related mux.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

One ls1088a, there are four I2C controllers. So add all I2C node
for ls1088a in device tree.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1088a.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable related configs on all ls2088aqds boards to support ds3231
rtc DM function.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds
boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add some slave nodes to support the i2c dm on the device side under the i2c0.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

One ls2088a, there are four I2C controllers. So add I2C nodes in dts
for ls2088a.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2080a.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the pcf2127-rtc node under the i2c1 in dts for ls1028aqds boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add pca9547 node to support i2c multiplexer under the i2c0 controller
in dts for ls1028aqds boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable related configs on all ls1028aqds boards to support pcf2127
rtc DM function.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NAlex Marginean <alexm.osslist@gmail.com>
Tested-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add some slave nodes to support the i2c dm on the device side under the i2c0.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1028a.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NAlex Marginean <alexm.osslist@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable related configs on all lx2160ardb boards to support pcf2127
rtc DM feature.

Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from
Kconfig.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: NBiwen Li <biwen.li@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 in dts for
lx2160aqds boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Lx2160ardb need to use i2c0 before relocation, so we also need to set
u-boot, dm-pre-reloc to initialize node before relocation.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Adds the pcf2127-rtc node under the i2c4 node dts of lx2160ardb boards.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2160a.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

I2C dm mode enablemenet causes below compilation errors:

In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~
In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~

board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
  i2c_early_init_f();
  ^~~~~~~~~~~~~~~~
  arch_early_init_r

 drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
  drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
  did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
  ret = enable_i2c_clk(1, bus->seq);
        ^~~~~~~~~~~~~~
        enable_irq_wake

So fix these compilation errors.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Select BOARD_LATE_INIT for ls1028ardb and ls1028aqds targets
so that late init work can be done.
Signed-off-by: NYuantian Tang <andy.tang@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

TI HS platforms generate *dtb_HS binary blobs and there is no
rule for cleanup. Added entry for cleanup in clean-files target.
Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

The commit 1b42ab3e ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") updates the kernel device-tree blob to adjust
the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected
in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks
DT node.

The hierarchy of this clocks DT node has changed in newer Linux kernels
starting from v5.0, and this results in a failure in ft_fixup_clocks()
function to update the clock rates on these newer kernels. Fix this by
updating the lookup logic to look through both the newer and older
DT hierarchy paths for the cm_core_aon clocks node.
Signed-off-by: NSuman Anna <s-anna@ti.com>