- 18 4月, 2017 17 次提交
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由 York Sun 提交于
Use CONFIG_ARCH_LS1021A instead. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
Use CONFIG_ARCH_LS1043A instead. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
Use CONFIG_ARCH_LS2080A instead. Signed-off-by: NYork Sun <york.sun@nxp.com>
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由 Ruchika Gupta 提交于
- Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ruchika Gupta 提交于
Add NAND secure boot target for ls1043ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript from NAND to DDR. Offsets for Bootscript on NAND and DDR have been also defined. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ruchika Gupta 提交于
- Add SD secure boot target for ls1043ardb. - Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for secure boto header. - Error messages during SPL boot are limited to error code numbers instead of strings to reduce the size of SPL image. Signed-off-by: NVinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Vinitha Pillai-B57223 提交于
Add QSPI Secure Boot target to enable chain of trust Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: NRuchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Vinitha Pillai-B57223 提交于
Define bootscript and its header addresses for QSPI target Also add PPA header address in Kconfig Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Vinitha Pillai-B57223 提交于
Add QSPI Secure Boot target. Also enable sec init. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Add NOR secure boot target. Also enable sec init. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Vinitha Pillai-B57223 提交于
Define bootscript and its header addresses for QSPI target. Also define PPA header address to enable PPA validation. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
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由 Vinitha Pillai-B57223 提交于
Enable PPA in secure boot by defining FSL_LS_PPA macro in its defconfig file. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Vinitha Pillai-B57223 提交于
The header address of PPA defined in Kconfig. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 VINITHA PILLAI 提交于
BLOB feature is not required during SPL compilation. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Using changes in this patch we were able to reduce approx 10k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1043ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. 5. Remove I2C driver support from SPL in case of LS1043ARDB. Signed-off-by: NVinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Thomas Schaefer 提交于
Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: NThomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: NYork Sun <york.sun@nxp.com>
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- 15 4月, 2017 2 次提交
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由 Tom Rini 提交于
When writing out some of our results we may now have UTF-8 characters in there as well. Translate these to latin-1 and ignore any errors (as this is for diagnostic and given the githash anything else can be reconstructed by the user. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 14 4月, 2017 21 次提交
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由 Troy Kisky 提交于
This fixes a regression caused by commit 07b2b78c dm: usb: Convert USB storage to use driver-model for block devs which caused part_init to be called when it was not previously. Without this patch, the following happens when a USB sd card reader is used. => usb start starting USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 3 USB Device(s) found scanning usb for storage devices... Device NOT ready Request Sense returned 02 3A 00 ### ERROR ### Please RESET the board ### This happens because dev_desc->blksz is 0. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
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由 Eddie Cai 提交于
We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on. Signed-off-by: NEddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: NStefan Brüns <stefan.bruens@rwth-aachen.de>
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由 Philipp Tomsich 提交于
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Felipe Balbi 提交于
Both these numbers are calculated in runtime and dynamically assigned to the device descriptor during bind(). Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
We don't want to claim that we support a serial number string and later return nothing. Because of that, if g_dnl_serial is an empty string, let's skip setting iSerialNumber to a valid number. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 Felipe Balbi 提交于
A USB String descriptor can be up to 255 characters long and it's not NULL terminated according to the USB spec. This means our MAX_STRING_SERIAL should be 256 (to cope with NULL terminator). Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
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由 eric.gao@rock-chips.com 提交于
After enabling log printing to lcd, when the screen starts scrolling, system crashes. Log is shown as bellow: "Synchronous Abort" handler, esr 0x96000045 "Synchronous Abort" handler, esr 0x96000045 Checking the source code, we found that the variable "pixels" gets a wrong value: int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length; "pixels" here means the value of pixels for a character, rather than the bytes for a character. So the variable "pixels" is 4 times bigger than it's exact value, which will cause the memory overflow when the cpu runs the following code: for (i = 0; i < pixels; i++) *dst++ = clr; <<---- Signed-off-by: NEric Gao <eric.gao@rock-chips.com>
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由 Songjun Wu 提交于
DT binding documentation for atmel HLCDC driver. Signed-off-by: NSongjun Wu <songjun.wu@microchip.com>
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由 Songjun Wu 提交于
Add driver-model support to this driver. Signed-off-by: NSongjun Wu <songjun.wu@microchip.com>
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由 Kever Yang 提交于
Some board do not use the dwc2 internal VBUS_DRV signal, but use a gpio pin to enable the 5.0V VBUS power, add interface to enable the power in dwc2 driver. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Dalon Westergreen 提交于
This removes the default environment from the sr1500 header and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board has no upstream devicetree in the kernel source, so set to socfpga_cyclone5_sr1500.dtb. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
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由 Dalon Westergreen 提交于
This removes the default environment from the socrates headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
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由 Dalon Westergreen 提交于
This removes the default environment from the SoCKit headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
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由 Dalon Westergreen 提交于
This removes the default environment from the de1 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board does not have a devicetree in the upstream kernel source so set devicetree to socfpga_cyclone5_de1_soc.dtb. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in V2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
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由 Dalon Westergreen 提交于
This removes the default environment from the C5 SoCDK headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
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由 Dalon Westergreen 提交于
This removes the default environment from the A5 socdk headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v3: - Fix small typo in defconfig, missing "C" Changes in v2: - Remove unneeded CONFIG_BOOTFILE - Fix dtb name a5config test Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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由 Dalon Westergreen 提交于
This removes the default environment from the de0 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
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