提交 b7bf4a95 编写于 作者: P Philipp Tomsich 提交者: Marek Vasut

usb: dwc3: ensure consistent types for dwc3_flush_cache

The dwc3_flush_cache() call was declared and used inconsistently:
 * The declaration assumed 'int' for addresses (a potential issue
   when running in a LP64 memory model).
 * The invocation cast the address to 'long'.

This change ensures that both the declaration and usage of this
function consistently uses 'uintptr_t' for correct behaviour even
when the allocated buffers (to be flushed) reside outside of the
lower 32bits of memory.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
上级 207835b1
......@@ -81,8 +81,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
trb->ctrl |= (DWC3_TRB_CTRL_IOC
| DWC3_TRB_CTRL_LST);
dwc3_flush_cache((long)buf_dma, len);
dwc3_flush_cache((long)trb, sizeof(*trb));
dwc3_flush_cache((uintptr_t)buf_dma, len);
dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
if (chain)
return 0;
......@@ -790,7 +790,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
if (!r)
return;
dwc3_flush_cache((long)trb, sizeof(*trb));
dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
status = DWC3_TRB_SIZE_TRBSTS(trb->size);
if (status == DWC3_TRBSTS_SETUP_PENDING) {
......@@ -821,7 +821,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
ur->actual += transferred;
trb++;
dwc3_flush_cache((long)trb, sizeof(*trb));
dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
length = trb->size & DWC3_TRB_SIZE_MASK;
ep0->free_slot = 0;
......@@ -831,7 +831,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
maxp);
transferred = min_t(u32, ur->length - transferred,
transfer_size - length);
dwc3_flush_cache((long)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE);
dwc3_flush_cache((uintptr_t)dwc->ep0_bounce, DWC3_EP0_BOUNCE_SIZE);
memcpy(buf, dwc->ep0_bounce, transferred);
} else {
transferred = ur->length - length;
......
......@@ -244,7 +244,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
list_del(&req->list);
req->trb = NULL;
dwc3_flush_cache((long)req->request.dma, req->request.length);
dwc3_flush_cache((uintptr_t)req->request.dma, req->request.length);
if (req->request.status == -EINPROGRESS)
req->request.status = status;
......@@ -771,8 +771,8 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
trb->ctrl |= DWC3_TRB_CTRL_HWO;
dwc3_flush_cache((long)dma, length);
dwc3_flush_cache((long)trb, sizeof(*trb));
dwc3_flush_cache((uintptr_t)dma, length);
dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
}
/*
......@@ -1769,7 +1769,7 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
slot %= DWC3_TRB_NUM;
trb = &dep->trb_pool[slot];
dwc3_flush_cache((long)trb, sizeof(*trb));
dwc3_flush_cache((uintptr_t)trb, sizeof(*trb));
__dwc3_cleanup_done_trbs(dwc, dep, req, trb, event, status);
dwc3_gadget_giveback(dep, req, status);
......@@ -2670,7 +2670,7 @@ void dwc3_gadget_uboot_handle_interrupt(struct dwc3 *dwc)
for (i = 0; i < dwc->num_event_buffers; i++) {
evt = dwc->ev_buffs[i];
dwc3_flush_cache((long)evt->buf, evt->length);
dwc3_flush_cache((uintptr_t)evt->buf, evt->length);
}
dwc3_thread_interrupt(0, dwc);
......
......@@ -48,7 +48,7 @@ static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
writel(value, base + offs);
}
static inline void dwc3_flush_cache(int addr, int length)
static inline void dwc3_flush_cache(uintptr_t addr, int length)
{
flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE));
}
......
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