The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

Add missing KSZ9021 PHY skew configuration for the EBV socrates board.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

Add code to process the KSZ9021/KSZ9031 OF props if they are present
and configure skew registers based on the information from the OF.
This code is only enabled if the DM support for ethernet is also
enabled.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

V2: - Implement struct ksz90x1_reg_field to describe the skew register
      fields more accurately.
    - Fix RXDV/TXEN skew register default value and offset.

watchdog and gpio are not validated for SPL that's why do not use them.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable DM for the whole architecture.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

LL_TEMAC is available at big endian MB and it is not properly tested
that's why the patch removes it.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Clean board specific file.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Create space below u-boot binary for early malloc.
It means memory layout is stack grows down, space for early malloc,
u-boot code.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

All ethernet operation needs to be updated for architectures which
requires MANUAL_RELOC.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Clear driver dependecies via Kconfig. Remove PHYLIB dependency from
the driver.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Use core to call net_process_received_packet() instead of call inside
the driver.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

recv function should return 0 instead of frame_len not to
proceed the same packet again in core.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Undefined phy address is -1 not 0.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Update the ZYBO device tree and enable config options that relate to the
added devices in the device tree.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

When the Zynq Boot ROM code loads the payload from QSPI it uses the
LQSPI feature of the QSPI device, however it does not clean up its
configuration before handing over to the payload which leaves the device
confgured to by-pass the standard non-linear operating mode.

This ensures the Linear QSPI mode is disabled before re-enabling the
device.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Clean up the param checking, removing some code paths that will never
happen.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Tom Rini <trini@konsulko.com>
Reported-by: Coverity (CID 133251)
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add ps7_init_gpl.c/h for the ZYBO board. This instance of the ps7_init
is generated by the Vivado 2015.3 tools using the system configuration
provided by Digilent located on their website.

Update the kconfig so that the defconfig is not overrided to use the
custom init ps7_init_gpl target by default.
Signed-off-by: NNathan Rossi <nathan@nathanrossi.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable u-boot,dm-pre-reloc for sdhci for zc706, zed and zybo.
And create aliases for it.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

When CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is enabled, use a
GET_REPORT control transfer to retrieve the initial state of the
keyboard. This matches the technique used to poll the keyboard state.
This is useful since it eliminates the remaining use of interrupt
transfers from the USB keyboard driver, which allows it to work with
USB HCD that don't support interrupt transfers.

Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This driver is meant to be used with any OHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>

With the old order of initialization the hcor pointer has been setup to
the same address as Exynos EHCI base address (0x12110000 instead of
0x12110010).
Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI
HCCPBASE register without doing proper clock initialization before.

To fix this problem hcor initialization has been moved after USB PHY setup.
Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>

The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.

The rename is done automatically:
	$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
		`git grep "s3c_udc\.h" | cut -d : -f 1`
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.

The rename is done automatically:
	$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
		`git grep s3c_udc_probe | cut -d : -f 1`
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.

The rename is done automatically:
	$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
		`git grep s3c_plat_otg_data | cut -d : -f 1`
Signed-off-by: NMarek Vasut <marex@denx.de>

The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the
config option to make it less misleading. No functional change, just
a mechanical change done using the following script:

  git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \
  while read line ; do
    sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ;
  done
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
Tweak the comments in the driver to reflect this fact.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the remaining S3C_* macros to match the
DWC2 naming.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the local source files to dwc2_*c and
adjusts the Makefile to use the new names.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the local header files to dwc2_*h and
adjusts the sources to use the new names.
Signed-off-by: NMarek Vasut <marex@denx.de>

Just change the driver name.
Signed-off-by: NMarek Vasut <marex@denx.de>

The extern statements are useless, remove them. Also remove the
extern ... controller, which is completely useless.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the remaining local s3c_*() functions
to reflect this.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep_*() functions to reflect this.
The function s3c_udc_probe() is a special case and is not
renamed by this patch yet.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep_*() functions to reflect this.
Signed-off-by: NMarek Vasut <marex@denx.de>

The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep0_*() functions to reflect this.
Signed-off-by: NMarek Vasut <marex@denx.de>

Just staticize the functions, they are not used outside of the file.
Signed-off-by: NMarek Vasut <marex@denx.de>