- 19 10月, 2008 4 次提交
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由 Heiko Schocher 提交于
With this Command it is possible to add new I2C Busses, which are behind 1 .. n I2C Muxes. Details see README. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 richardretanubun 提交于
The GUID (Globally Unique Identifier) Partition Table (GPT) is a part of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table Based on linux/fs/partitions/efi.[ch] Signed-off-by: NRichard Retanubun <RichardRetanubun@RugggedCom.com>
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由 Bartlomiej Sieka 提交于
The auto-update feature allows to automatically download software updates from a TFTP server and store them in Flash memory during boot. Updates are contained in a FIT file and protected with SHA-1 checksum. More detailed description can be found in doc/README.update. Signed-off-by: NRafal Czubak <rcz@semihalf.com> Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>
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由 richardretanubun 提交于
Added as a convenience for other platforms that uses MPC8360 (has 8 UCC). Six eth interface is chosen because the platform I am using combines UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth. Signed-off-by: NRichard Retanubun <RichardRetanubun@RugggedCom.com> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 13 9月, 2008 2 次提交
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Luigi 'Comio' Mantellini 提交于
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 11 9月, 2008 6 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 10 9月, 2008 1 次提交
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由 Victor Gallardo 提交于
On AMCC Arches board DTT_I2C_DEV_CODE is different then canyonlands and glacier. Signed-off-by: NVictor Gallardo <vgallardo@amcc.com>
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- 09 9月, 2008 4 次提交
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由 Peter Tyser 提交于
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
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由 Kumar Gala 提交于
Pantelis Antoniou stated: AFAIK, it is still used but the products using PPC are long gone. Nuke it plz (from orbit). So remove it since it cleans up a usage of env_get_char outside of the environment code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Andreas Engel 提交于
Signed-off-by: NAndreas Engel <andreas.engel@ericsson.com>
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由 Markus Heidelberg 提交于
Signed-off-by: NMarkus Heidelberg <markus.heidelberg@web.de>
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- 13 8月, 2008 1 次提交
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rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 11 8月, 2008 1 次提交
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由 Magnus Lilja 提交于
Signed-off-by: NMagnus Lilja <lilja.magnus@gmail.com>
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- 10 7月, 2008 1 次提交
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由 Marcel Ziswiler 提交于
Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>
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- 10 6月, 2008 1 次提交
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由 Gerald Van Baren 提交于
Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is cleaner, has better functionality, and is better supported. Signed-off-by: NGerald Van Baren <vanbaren@cideas.com>
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- 23 5月, 2008 1 次提交
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由 Jens Gehrlein 提交于
Signed-off-by: NJens Gehrlein <sew_s@tqs.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 10 5月, 2008 2 次提交
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由 Stelian Pop 提交于
This patch adds support for the ATMEL LCDC driver which is used on some AT91 and AVR platforms. Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy. Signed-off-by: NStelian Pop <stelian@popies.net> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Adrian Filipi 提交于
This patch fixes three typos. The first is a repetition of CONFIG_CMD_BSP. The second makes the #endif comment match its #if. The third is a spelling error. Signed-off-by: NAdrian Filipi <adrian.filipi@eurotech.com>
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- 29 4月, 2008 1 次提交
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由 Guennadi Liakhovetski 提交于
Currently the timeout waiting for an ARP reply is hard set to 5 seconds. On i.MX31ADS due to a hardware "strangeness" up to four first IP packets to the boards get lost, which typically are ARP replies. By configuring the timeout to a lower value we significantly improve the first network transfer time on this board. The timeout is specified in milliseconds, later internally it is converted to deciseconds, because it has to be converted to hardware ticks, and CFG_HZ ranges from 900 to 27000000 on different boards. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 18 4月, 2008 3 次提交
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由 Guennadi Liakhovetski 提交于
MC13783 is a multifunction IS with an SPI interface to the host. This driver handles the RTC controller in this chip. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
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由 Guennadi Liakhovetski 提交于
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
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由 Bartlomiej Sieka 提交于
- document 'bootm_low' and 'bootm_size' environment variables - update inaccurate CFG_BOOTMAPSZ entry Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>
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- 12 4月, 2008 1 次提交
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由 Guennadi Liakhovetski 提交于
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit series require different addresses for buffered write commands. Define a configuration option to support buffered writes on those chips. A more elegant solution would be to automatically detect those chips by parsing their CFI records, but that would require introduction of a fixup table into the cfi_flash driver. Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
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- 08 4月, 2008 3 次提交
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由 Daniel Hellstrom 提交于
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
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由 Daniel Hellstrom 提交于
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
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由 Daniel Hellstrom 提交于
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>
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- 02 4月, 2008 1 次提交
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由 Kim Phillips 提交于
finish off what commit 43ddd9c8, "Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T" started. Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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- 30 3月, 2008 2 次提交
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由 Andre Schwarz 提交于
Add 82541ER device with latest integrated IGP2 PHY. Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom. Signed-off-by: NAndre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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由 Aras Vaichas 提交于
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional delay before sending "DHCP Request" in net/bootp.c. Required to overcome interoperability problems with Windows Server 200x DHCP server when U-Boot client responds too fast for server to handle. Signed-off-by: NAras Vaichas <arasv@magtech.com.au> Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
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- 28 3月, 2008 1 次提交
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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- 27 3月, 2008 2 次提交
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由 Stefan Roese 提交于
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of ram and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed the now "corrected" memory size and won't touch it either. This should work for arch/ppc and arch/powerpc. Only Linux board ports in arch/powerpc with bootwrapper support, which recalculate the memory size from the SDRAM controller setup, will have to get fixed in Linux additionally. This patch enables this config option on some PPC440EPx boards as a workaround for the CHIP 11 errata. Here the description from the AMCC documentation: CHIP_11: End of memory range area restricted access. Category: 3 Overview: The 440EPx DDR controller does not acknowledge any transaction which is determined to be crossing over the end-of-memory-range boundary, even if the starting address is within valid memory space. Any such transaction from any PLB4 master will result in a PLB time-out on PLB4 bus. Impact: In case of such misaligned bursts, PLB4 masters will not retrieve any data at all, just the available data up to the end of memory, especially the 440 CPU. For example, if a CPU instruction required an operand located in memory within the last 7 words of memory, the DCU master would burst read 8 words to update the data cache and cross over the end-of-memory-range boundary. Such a DCU read would not be answered by the DDR controller, resulting in a PLB4 time-out and ultimately in a Machine Check interrupt. The data would be inaccessible to the CPU. Workaround: Forbid any application to access the last 256 bytes of DDR memory. For example, make your operating system believe that the last 256 bytes of DDR memory are absent. AMCC has a patch that does this, available for Linux. This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards: lwmon5, korat, sequoia The other remaining 440EPx board were intentionally not included since it is not clear to me, if they use the end of ram for some other purpose. This is unclear, since these boards have CONFIG_PRAM defined and even comments like this: PMC440.h: /* esd expects pram at end of physical memory. * So no logbuffer at the moment. */ It is strongly recommended to not use the last 256 bytes on those boards too. Patches from the board maintainers are welcome. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Anatolij Gustschin 提交于
Fix typo in README Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 26 3月, 2008 2 次提交
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由 Joakim Tjernlund 提交于
The default settings for RTC DS1337 keeps the OSC output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to turn it off. Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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