- 08 4月, 2013 11 次提交
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由 Andreas Bießmann 提交于
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <weber@corscience.de> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com>
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由 Andreas Bießmann 提交于
The kernel states: ---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8--- And we do so in u-boot. This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mansoor Ahamed <mansoor.ahamed@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
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由 Andreas Bießmann 提交于
With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
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由 Andreas Bießmann 提交于
This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Andreas Bießmann 提交于
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header. Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Andreas Bießmann 提交于
This patch adds the BCH result registers to register mapping for OMAP3 gpmc. Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: NTom Rini <trini@ti.com>
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由 Manfred Huber 提交于
Flush UART3 xmit on enable if TEMT is broken On some OMAP3 devices when UART3 is configured for boot mode before SPL starts only THRE bit is set. We have to empty the transmitter before initialization starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT. Signed-off-by: NManfred Huber <man.huber@arcor.de> Tested-by: NJavier Martinez Canillas <javier@dowhile0.org> Tested-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Tom Rini 提交于
We must not assume ROM has enabled the clock for MMC1. Reported-by: NKoen Kooi <koen@dominion.thruhere.net> Signed-off-by: NTom Rini <trini@ti.com> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
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由 Lars Poeschel 提交于
This is done already for am335x in 59dcf970 and also applies for pcm051. It powers down the IO receiver when not performing read which helps reducing the overall power consuption in low power states (suspend/standby). Signed-off-by: NLars Poeschel <poeschel@lemonage.de>
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由 Bin Liu 提交于
Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED is not set, in which case Ether gadget only operates in fullspeed. Reviewed-by: NTom Rini <trini@ti.com> Signed-off-by: NBin Liu <b-liu@ti.com>
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由 Bin Liu 提交于
On TI AM335x devices, MUSB has bulk split/combine feature enabled in the ConfigData register, but the current MUSB driver does not support it yet. Therefore, disable the feature for now, until the driver adds the support. One usecase which is broken because of this feature is that Ether gadget stops working in Fullspeed mode (by un-defining CONFIG_USB_GADGET_DUALSPEED) After desabled this feature, MUSB driver send packets in proper size (no more than 64 bytes) in Fullspeed mode. This has been validated with Ether gadget in Fullspeed mode on AM335x EVM. Signed-off-by: NBin Liu <b-liu@ti.com>
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- 06 4月, 2013 1 次提交
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由 Josh Wu 提交于
Atmel change to new logo since 2012. This patch update the logo to new one. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 04 4月, 2013 5 次提交
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由 Albert ARIBAUD 提交于
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由 Minkyu Kang 提交于
Fix the indentation of some defines by tab. Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Albert ARIBAUD 提交于
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由 Dirk Behme 提交于
Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
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由 Stephen Warren 提交于
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this. Have the timer implementation export a custom API get_timer_us() for use by the BCM2835 MMC API, which needs us resolution for a HW workaround. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
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- 03 4月, 2013 14 次提交
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由 Javier Martinez Canillas 提交于
board/freescale/mx6qsabrelite/README explain a procedure to update the SPI-NOR on the SabreLite board without Freescale manufacturing tool but following this procedure leads to both "sf erase" and "sf write" failing on a mx6qsabrelite board: MX6QSABRELITE U-Boot > sf probe 1 MX6QSABRELITE U-Boot > sf erase 0 0x40000 SPI flash erase failed MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000 SPI flash write failed This is because the chip-select 1 is wrong and the correct value is 0x7300. Since commit c1173bd0 ("sf command: allow default bus and chip selects") the chip-select and bus arguments for the sf probe command are optional so let's just remove it and use "sf probe" instead. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
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由 Fabio Estevam 提交于
CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Fabio Estevam 提交于
No need to call 'mmc dev' twice. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Fabio Estevam 提交于
No need to call 'mmc dev' twice. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Fabio Estevam 提交于
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Processing Unit) library in the kernel and causes the video playback to fail. The expected values for get_board_rev are: 0x63xxx: For mx6quad/dual 0x61xxx: For mx6dual-lite/solo So adjust get_board_rev() accordingly and make it as weak function, so that we do not need to define it in every mx6 board file. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NDirk Behme <dirk.behme@de.bosch.com> Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>
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The netargs variable was referencing the non-existing variable console_mainline. Change that to console variable instead. Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Abbas Raza 提交于
Maximum bus width supported by some i.MX6 boards is not 8bit like others. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while some boards support only 4bit interface. Due to this reason the mmc 8bit default mode fails on these boards. To rectify this, define maximum bus width supported by these boards (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by: NAbbas Raza <Abbas_Raza@mentor.com> cc: stefano Babic <sbabic@denx.de> cc: Andy Fleming <afleming@gmail.com> Acked-by: NDirk Behme <dirk.behme@de.bosch.com> Acked-by: NAndrew Gabbasov <andrew_gabbasov@mentor.com>
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由 Otavio Salvador 提交于
Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>". Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Benoît Thébaudeau 提交于
The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This allows to compile-test the imxdi driver in the mainline tree. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
The u-boot.imx binary is generated by default, so no need to pass it in the 'make' line. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Introduce 'mx28evk_nand' target for saving environment variables into NAND. The mx28evk board does not come with a NAND flash populated from the factory. It comes with an empty slot (U23), which allows the insertion of a 48-pin TSOP flash device. Tested with a K9LBG08U0D. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Adds support for 'bmode' command which let user to choose where to boot from; this allows U-Boot to load system from another storage without messing with jumpers. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
This changes the code so in case an unkown value is passed it will return as invalid. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
This documents the SD card identifier so it is easier for user to spot which card number will be used, if need. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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- 01 4月, 2013 9 次提交
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由 Akshay Saraswat 提交于
As we shall now be using clock_get_periph_rate function. We find no reason for keeping code in function exynos5_get_pwm_clk. Hence, removing it. Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Padmavathi Venna 提交于
Use generic api to get the pwm clock frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Padmavathi Venna 提交于
MPLL is selected as the source clk of pwm by default Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Padmavathi Venna 提交于
Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by dividing with first and second dividers based on the requirement. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Padmavathi Venna 提交于
Add peripherial id for pwm inorder to support generic api to get the clk frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Gabe Black 提交于
Some small fixes in the exynos pwm driver: 1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually describes the number of nanoseconds in a second. Renamed it to NS_IN_SEC. Also dropped the unnecessary parenthesis. 2. The variable "period" is not used to hold a period, it's used to hold a frequency. Renamed it to "frequency". 3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if which checks that condition will never execute. Also, there should be no problem if the pwm never switches, so there's no reason to subtract one from tcmp and therefore no reason to compare it against zero. Removed both ifs. If they weren't removed, tcmp should be a signed value. 4. Add a check for a 0 period. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NGabe Black <gabeblack@google.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Gabe Black 提交于
The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config with a 0ns period and a 0ns duty cycle. That doesn't actually make any sense physically, and results in a divide by zero in the driver. This change changes the parameters to be a 100000ns period and duty cycle. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NGabe Black <gabeblack@google.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Gabe Black 提交于
First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead. Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4. This change also takes the opportunity to tidy up the pwm_init function. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: NGabe Black <gabeblack@google.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Che-Liang Chiou 提交于
timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long period; instead, it wraps around (that is, the reference point is reset to some other point of history) after some periods. The frequency of wrapping around is about an hour (or 2^32 microseconds). Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: NChe-Liang Chiou <clchiou@chromium.org> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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