- 26 6月, 2020 14 次提交
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由 Simon Glass 提交于
Unfortunately PowerPC has a lot of special stuff. Move it into the generic function for now, so we can have it all in one place. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This arch has none of its own info to show. Move it over to use the generic do_bdinfo(). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This arch has none of its own info to show. Move it over to use the generic do_bdinfo(). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Sandbox has a printout of 'FB base' but this code is not used since sandbox uses driver model for everything. Move sandbox over to use the generic do_bdinfo(). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This arch shows 'ethspeed' info but only the freescale drivers use it, so it can be dropped. It also calls print_bi_dram() which is safe to call from any arch since it has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86 over to use it. Put it first since pytests rely on seeing it before memstart in find_ram_base(). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This arch has no code that is not already in the generic function. Drop the arch-specific function and change sh over to use the generic one. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Microblaze prints out ethernet and FDT information. This is useful to most archs, so move it into the generic code and move microblaze over to use it. Note that FDT information is shown for all boards, since they should be using device tree by now. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Nios2 currently has some code to output SRAM information which is behind an #ifdef. No nios2 boards define this option, so the code can be removed. Move Nios2 over to use the generic function. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
MIPS currently has a few extra things which are generally useful. Add them to the generic function and move MIPS over to use it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Simon Glass 提交于
This arch uses only the generic function. It would be nice if all the archs did the same. As a first step, create a new generic function for the 'bd' command and make xtensa use it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This field is not used anymore. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present riscv still uses its own private bd_info struct. Move it over to use the generic one like other archs. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
At present nds32 still uses its own private bd_info struct. Move it over to use the generic one like other archs. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This board is very close to its limit. Drop this command before the bd refactoring, which increases the size slightly on one toolchain. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 25 6月, 2020 4 次提交
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由 Tom Rini 提交于
Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.10 Versal: - xspi bootmode fix - Removing one clock from clk driver - Align u-boot memory setting with OS by default - Map TCM and OCM by default ZynqMP: - Minor DT improvements - Reduce console buffer for mini configurations - Add fix for AMS - Add support for XDP platform Zynq: - Support for AES engine - Enable bigger memory test by default - Extend documentation for SD preparation - Use different freq for Topic miami board mmc: - minor GD pointer removal net: - Support fixed-link cases by zynq gem - Fix phy looking loop in axi enet driver spi: - Cleanup global macros for xilinx spi drivers firmware: - Add support for pmufw reloading fpga: - Improve error status reporting common: - Remove 4kB addition space for FDT allocation
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由 Ashok Reddy Soma 提交于
There is no technical reason to add additional 4k space for FDT. This space is completely unused and just increase memory requirements. This is problematic on systems with limited memory resources as Xilinx Zynq CSE/ZynqMP mini and Versal mini configurations. The patch is removing additional 4k space. EFI code is using copy_fdt() which copy FDT to different location. And all boot commands in case of using U-Boot's FDT pointed by $fdtcontroladdr are copying FDT to different locations by image_setup_libfdt(). That's why in proper flow none should modified DTB used by U-Boot that's why there is no need for additional space. Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NStephen Warren <swarren@nvidia.com>
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由 Michal Simek 提交于
PMU FW has functionality to accept and reload configuration object at run time. The patch is adding support for doing it via u-boot prompt. For example: tftpboot 100000 pmu_obj.bin zynqmp pmufw 100000 $filesize The most of pmufw configurations don't allow config reloading. Also official Xilinx PMUFW doens't support this feature properly but the patch should open a way to call PMUFW with this request. Here is example of PMUFW config fragment which enables config reloading. /* SET CONFIG SECTION */ PM_CONFIG_SET_CONFIG_SECTION_ID, /* Section ID */ PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */ Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
It is better to print multiboot value in decimal because boot images are also composed in decimal not in hex. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 24 6月, 2020 22 次提交
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由 Mike Looijmans 提交于
XDP - Xilinx Drone Platform is a board for drones or other UAV. Pinmux the SD card by default, and if the SD card detect line is high (inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on extension card and shares connection with on board wife. That means that when SD card is present in the board wifi can't be used. There seems to be an issue with DDR access from PL at 2400MT/s, after updating the PMU and ATF firmware this is causing extremely slow DDR access. Reducing the DDR speed from 2400 to 2133 appears to solve that issue, even though the hardware has proven to be 2400 capable. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Mike Looijmans 提交于
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to exchange the PS supply voltages 0 and 1. On Xilinx boards this is not noticeable since these are tied together, it's only really noticeable if banks 500 and 501 have different supplies. Xilinx' tech support reported this undocumented register to be the cause, and this patch applies a fix for all boards by programming the correct value. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Mike Looijmans 提交于
In all reference designs the FCLK1 runs at 150MHz, but the bootloader doesn't set it up like that. Set the divider to 8 to generate the correct clock. Fixes (a.o.) the DMA speed being too slow. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Patrick van Gelder 提交于
The index used to iterate over the possible PHYs in axiemac_phy_init was an unsigned int and decremented. Therefor it was always >= 0 and never exited the loop. Signed-off-by: NPatrick van Gelder <patrick.vangelder@nl.bosch.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Johannes Krottmayer 提交于
Add a short description in the ZYNQ documentation how to prepare a SD card and copy the related images to SD card. Signed-off-by: NJohannes Krottmayer <krjdev@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Ashok Reddy Soma 提交于
Remove below config options and convert them to macros. They have never been configured to different values than default one. And also it makes sense to reduce the config_whitelist. CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_XILINX_SPI_IDLE_VAL Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Disable PCS autonegotiation if fixed-link node is present in device tree. This way systems with multiple GEM instances with a combination of SGMII-fixed and SGMII-PHY will work. Reported-by: NGoran Marinkovic <goran.marinkovic@psi.ch> Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the frequency similar to full u-boot qspi flash spi-max-frequency. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Saeed Nowshadi 提交于
Align clock output names with node references. Signed-off-by: NSaeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
Reduce console buffer size to 1kbyte to accommodate memory allocations in mini u-boot for zynqmp. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Ashok Reddy Soma 提交于
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory. Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Ashok Reddy Soma 提交于
Enable alternative memory test for zynq platforms. Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
Added support for zynq aes load & loadp commands. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Ibai Erkiaga 提交于
AES engine cannot be used if has not been enabled at boot time with an encrypted boot image. Signed-off-by: NIbai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Acked-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 T Karthik Reddy 提交于
This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There is no need to panic all the time when pmufw config object loading failed. The patch improves function logic to report permission deny case and also panic only for SPL case. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NLuca Ceresoli <luca@lucaceresoli.net>
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由 Rajan Vaja 提交于
alt_ref_clk is applicable only for PS extended version. For PS base version there is no separate alt_ref_clk. It is tied with ref_clk, so remove it from driver. Signed-off-by: NRajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There is no reason not to let U-Boot to update memory node by default. In past this was disabled by purpose to be able to test different memory configurations from one U-Boot instance. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Driver is not calling gd anywhere that's why there is not need to define it. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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