1. 16 4月, 2018 2 次提交
  2. 15 4月, 2018 21 次提交
    • T
      Merge git://git.denx.de/u-boot-imx · ebca902a
      Tom Rini 提交于
      Signed-off-by: NTom Rini <trini@konsulko.com>
      ebca902a
    • T
      Merge git://git.denx.de/u-boot-net · df13a443
      Tom Rini 提交于
      df13a443
    • T
      Merge git://git.denx.de/u-boot-sh · 6d0409f2
      Tom Rini 提交于
      6d0409f2
    • J
      mx6cuboxi: Fix some memory configuration errors · b4e9bdcd
      Jon Nettleton 提交于
      These changes bring mainline back into line with the configurations
      that were originally set in our stable BSP.
      Signed-off-by: NJon Nettleton <jon@solid-run.com>
      Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
      b4e9bdcd
    • T
      imx: Create distinct pre-processed mkimage config files · f9167573
      Trent Piepho 提交于
      Each imx image is created by a separate sub-make and during this process
      the mkimage config file is run though cpp.
      
      The cpp output is to the same file no matter what imx image is being
      created.
      
      This means if two imx images are generated in parallel they will attempt
      to independently produce the same pre-processed mkimage config file at
      the same time.
      
      Avoid the problem by making the pre-processed config file name unique
      based on the imx image it will be used in.  This way each image will
      create a unique config file and they won't clobber each other when run
      in parallel.
      
      This should fixed the build bug referenced in b5b0e4e3 ("imximage:
      Remove failure when no IVT offset is found").
      
      Cc: Breno Lima <breno.lima@nxp.com>
      Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Signed-off-by: NTrent Piepho <tpiepho@impinj.com>
      Tested-by: NFabio Estevam <fabio.estevam@nxp.com>
      f9167573
    • T
      mx31ads: Delete · 448fc44f
      Tom Rini 提交于
      This platform has been marked as orphaned since September 2013, remove.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      448fc44f
    • T
      imx31_phycore: Delete · bcca8aa9
      Tom Rini 提交于
      This platform has been marked as orphaned since September 2013, remove.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      bcca8aa9
    • V
      pico-imx7d: Replace fatload command · ebca6013
      Vanessa Maegima 提交于
      Replace fatload with the fs generic loading interface ('load' command).
      Signed-off-by: NVanessa Maegima <vanessa.maegima@nxp.com>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      ebca6013
    • B
      imx: mx7: snvs: Add an SNVS init routine · 723f8359
      Bryan O'Donoghue 提交于
      Working with HAB on the i.MX7 we've encountered a case where a board that
      successfully authenticates u-boot when booting Linux via OPTEE subsequently
      fails to properly bring up the RTC.
      
      The RTC registers live in the low-power block of the Secure Non-Volatile
      Storage (SNVS) block.
      
      The root cause of the error has been traced to the HAB handing off the
      SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
      Non-Privileged Software Access Enable bit is zero. In ordinary
      circumstances this is OK since we typically do not run in TZ mode, however
      when we boot via HAB and enablng TrustZone, it is required to set
      HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
      sufficient permissions to manipulate the SNVS-LP block.
      
      On our reference board it is the difference between Linux doing this:
      
      root@imx7s-warp-mbl:~# dmesg | grep rtc
      snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
      snvs_rtc_enable read 0x00000021 from SNVS_LPCR @ 0x00000038
      snvs_rtc_enable read 0x00000000 from SNVS_HPLR @ 0x00000000
      snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x00000004
      snvs_rtc 30370000.snvs:snvs-rtc-lp: rtc core: registered
               30370000.snvs:snvs-rtc-lp as rtc0
      snvs_rtc 30370000.snvs:snvs-rtc-lp: setting system clock to2018-04-01 00:51:04 UTC (1522543864)
      
      and doing this:
      
      root@imx7s-warp-mbl:~# dmesg | grep rtc
      snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
      snvs_rtc_enable read 0x00000020 from SNVS_LPCR @ 0x00000038
      snvs_rtc_enable read 0x00000001 from SNVS_HPLR @ 0x00000000
      snvs_rtc_enable read 0x00002020 from SNVS_HPCOMR @ 0x00000004
      snvs_rtc 30370000.snvs:snvs-rtc-lp: failed to enable rtc -110
      snvs_rtc: probe of 30370000.snvs:snvs-rtc-lp failed with error -110
      hctosys: unable to open rtc device (rtc0)
      
      Note bit 1 of LPCR is not set in the second case and is set in the first
      case and that bit 31 of HPCOMR is set in the second case but not in the
      first.
      
      Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
      and continue onto the kernel. The kernel then has the necessary permissions
      to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
      contrast - in the failing case the non-privileged kernel cannot do so.
      
      This patch adds a simple init_snvs() call which sets the permission-bit
      called from soc.c for the i.MX7. It may be possible, safe and desirable to
      perform this on other i.MX processors but for now this is only tested on
      i.MX7 as working.
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      723f8359
    • L
      boot: script: The boot.scr file for K+P's boards · b04ff9bf
      Lukasz Majewski 提交于
      By using this file one can avoid cluttering <board>.h file with u-boot
      HUSH commands necessary for booting target device.
      
      With such approach the commands are stored only in one place and can be
      reused if needed.
      Signed-off-by: NLukasz Majewski <lukma@denx.de>
      Reviewed-by: NStefano Babic <sbabic@denx.de>
      b04ff9bf
    • L
      imx: board: Add support for the K+P's kp_imx6q_tpc board · dd4671cb
      Lukasz Majewski 提交于
      This commit provides support for Kieback & Peter GmbH IMX6Q based
      TPC board.
      
      U-boot console output:
      
      U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
      Trying to boot from MMC1
      
      U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
      
      CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
      CPU:   Extended Commercial temperature grade (-20C to 105C) at 37C
      Reset cause: POR
      Board: K+P KP_IMX6Q_TPC i.MX6Q
             Watchdog enabled
      I2C:   ready
      DRAM:  2 GiB
      MMC:   FSL_SDHC: 0, FSL_SDHC: 1
      Loading Environment from MMC... OK
      In:    serial
      Out:   serial
      Err:   serial
      Net:   FEC [PRIME]
      Autoboot in 3 seconds
      dd4671cb
    • I
      board: ge: bx50v3: enable backlight on demand · 6c0e6b45
      Ian Ray 提交于
      Enable display backlight only if a message needs to be displayed.
      The kernel re-initializes the backlight, which results in some
      unwanted artifacts.
      Signed-off-by: NIan Ray <ian.ray@ge.com>
      Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>
      6c0e6b45
    • K
      arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board · 7a0ce1f7
      Ken Lin 提交于
      Windbond's been in the AVL list and need to enable the support
      Signed-off-by: NKen Lin <yungching0725@gmail.com>
      7a0ce1f7
    • B
      imx: hab: Provide hab_auth_img_or_fail command · 49e62426
      Bryan O'Donoghue 提交于
      This patch adds hab_auth_img_or_fail() a command line function that
      encapsulates a common usage of authenticate and failover, namely if
      authenticate image fails, then drop to BootROM USB recovery mode.
      
      For secure-boot systems, this type of locked down behavior is important to
      ensure no unsigned images can be run.
      
      It's possible to script this logic but, when done over and over again the
      environment starts get very complex and repetitive, reducing that script
      repetition down to a command line function makes sense.
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
      Cc: Breno Lima <breno.lima@nxp.com>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Tested-by: NBreno Lima <breno.lima@nxp.com>
      49e62426
    • B
      imximage: Encase majority of header in __ASSEMBLY__ declaration · f4d8fccd
      Bryan O'Donoghue 提交于
      Subsequent patches will want to include imageimage.h but in doing so
      include it on an assembly compile path causing a range of compile errors.
      Fix the errors pre-emptively by encasing the majority of the declarations
      in imximage.h inside an ifdef __ASSEMBLY__ block.
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
      Cc: Breno Lima <breno.lima@nxp.com>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Tested-by: NBreno Lima <breno.lima@nxp.com>
      f4d8fccd
    • B
      warp7: Set u-boot serial# based on OTP value · 852cc548
      Bryan O'Donoghue 提交于
      u-boot has a standard "serial#" environment variable that is suitable
      for storing the iSerial number we will supply via the USB device
      descriptor. serial# is automatically picked up by the disk subsystem in
      u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
      detailed below.
      
      Storing the hardware serial identifier in serial# means we can change the
      serial# if we want before USB enumeration - thus making iSerial automatic
      via OTP but overridable if necessary.
      
      This patch reads the defined OTP fuse and sets environment variable
      "serial#" to the value read.
      
      With this patch in place the USB mass storage device will appear in
      /dev/disk/by-id with a unique name based on the OTP value. For example
      
      /dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0:0
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Cc: Rui Miguel Silva <rui.silva@linaro.org>
      Cc: Ryan Harkin <ryan.harkin@linaro.org>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      852cc548
    • B
      imx: mx7: Add comment to describe OTP TESTER registers · 1ab1ffde
      Bryan O'Donoghue 提交于
      The tester registers provide a unique chip-level identifier which
      get_board_serial() returns in a "struct tag_serialnr".
      
      This patch documents the properties of the registers; in summary.
      
      31:0 OCOTP_TESTER0 (most significant)
      - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
      
      OCOTP_TESTER1 (least significant)
      31:24
      - The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
        ID
      23:16
      - The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
        ID
      15:11
      - The wafer number of the wafer on which the device was fabricated/SJC
        CHALLENGE/ Unique ID
      10:0
      - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
      
      The 64 bits of data generate a unique serial number per-chip.
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Cc: Peng Fan <peng.fan@nxp.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      1ab1ffde
    • B
      imx: mx7: Fix CONFIG_SERIAL_TAG compilation · ca831822
      Bryan O'Donoghue 提交于
      Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
      define "struct tag_serialnr".
      
      This structure is defined in <asm/setup.h>, this patch includes
      <asm/setup.h> to fix.
      Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
      Cc: Fabio Estevam <fabio.estevam@nxp.com>
      Cc: Peng Fan <peng.fan@nxp.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      ca831822
    • M
      ARM: mx6: ddr: Add write leveling correction code · 14eeb683
      Marek Vasut 提交于
      When the DDR calibration is enabled, a situation may happen that it
      will fail on a few select boards out of a whole production lot. In
      particular, after the first write leveling stage, the MPWLDECTRLx
      registers will contain a value 0x1nn , for nn usually being 0x7f or
      slightly lower.
      
      What this means is that the HW write leveling detected that the DQS
      rising edge on one or more bundles arrives slightly _after_ CLK and
      therefore when the DDR DRAM samples CLK on the DQS rising edge, the
      CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18).
      
      The HW write leveling then ends up adding almost an entire cycle (thus
      the 0x17f) to the DQS delay, which indeed aligns it, but also triggers
      subsequent calibration failure in DQS gating due to this massive offset.
      
      There are two observations here:
      - If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the
        DQS gating passes, the entire calibration passes as well and the
        DRAM is perfectly stable even under massive load.
      - When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so
        in MPWLDECTRx register is not there, but it is replaced by 0x0 as one
        would expect.
      
      Someone from NXP finally explains why, quoting [1]:
      
          "
          Having said all that, the DDR Stress Test does something that we
          do not advertise to the users. The Stress Test iself looks at the
          values of the MPWLDECTRL0/1 fields before reporting results, and
          if it sees any filed with a value greater than 200/256 delay
          (reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR
          Stress test will reset the Write Leveling delay for this lane
          to 0x000 and not report it in the log.
      
          The reason that the DDR Stress test does this is because a delay
          of more than 78% a clock cycle means that the DQS edge is arriving
          within the JEDEC tolerence of 25% of the clock edge. In most cases,
          DQS is arriving < 5% tCK of the SDCLK edge in the early case, and
          it does not make sense to delay the DQS strobe almost a full clock
          cycle and add extra latency to each Write burst just to make the
          two edges align exactly. In this case, we are guilty of making a
          decision for the customer without telling them we are doing it so
          that we don't have to provide the above explanation to every customer.
          They don't need to know it.
          "
      
      This patch adds the correction described above, that is if the MPWLDECTRx
      value is over 0x148, the value is corrected back to 0x0.
      
      [1] https://community.nxp.com/thread/456246Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: NEric Nelson <eric@nelint.com>
      Reviewed-by: NStefano Babic <sbabic@denx.de>
      14eeb683
    • R
      tools/imximage: use 0x prefix in HAB Blocks line · 8519c9c9
      Rasmus Villemoes 提交于
      The u-boot-ivt.img.log file contains 0x prefixes in the HAB Blocks line,
      while the SPL.log does not. For consistency, and to make it easier to
      extract and put into a .csf file for use with NXP's code signing tool,
      add 0x prefixes here.
      Signed-off-by: NRasmus Villemoes <rasmus.villemoes@prevas.dk>
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      Tested-by: NBreno Lima <breno.lima@nxp.com>
      8519c9c9
    • R
      Makefile: always preserve output for images that can contain HAB Blocks · 06587617
      Rasmus Villemoes 提交于
      The current makefile logic disables creation of the
      SPL.log/u-boot-ivt.img.log etc. files when V=1 is given on the command
      line, the rationale presumably being that the user wants and gets the
      information on the console.
      
      However, from general principles, I don't think a higher V= level
      should affect which build artifacts get generated (and certainly
      shouldn't produce fewer). Concretely, it's also a problem that when
      doing a V=1 build in a terminal, the relevant HAB blocks lines easily
      drown in all the other V=1 output.
      
      Moreover, build systems such as Yocto by default pass V=1, so in that
      case the information gets hidden away in the do_compile log file, making
      it nigh impossible to create a recipe for creating signed U-boot images
      - I don't want to disable V=1, because having verbose output in the log
      file is valuable when things go wrong, but OTOH trying to go digging in
      the do_compile log file (and getting exactly the right lines) is not
      pleasant to even think about.
      
      So change the logic so that for V=0, the mkimage output is redirected
      to MKIMAGEOUTPUT (which is also the current behaviour), while for any
      other value of V, we _additionally_ write the information to make's
      stdout, whatever that might be.
      Signed-off-by: NRasmus Villemoes <rasmus.villemoes@prevas.dk>
      Tested-by: NBreno Lima <breno.lima@nxp.com>
      06587617
  3. 14 4月, 2018 17 次提交