- 04 11月, 2015 8 次提交
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由 Simon Glass 提交于
At present in SPL we place the device tree immediately after BSS. This avoids needing to copy it out of the way before BSS can be used. However on some boards BSS is not placed with the image - e.g. it can be in RAM if available. Add an option to tell U-Boot that the device tree should be placed at the end of the image binary (_image_binary_end) instead of at the end of BSS. Note: A common reason to place BSS in RAM is to support the FAT filesystem. We should update the code so that it does not use so much BSS. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Simon Glass 提交于
At present this file is generated even when device tree is not enabled in SPL. Avoid this, since this file serves no purpose in that case. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Simon Glass 提交于
Sometimes stdout-path contains a UART alias along with speed, etc. For example: stdout-path = "serial0:115200n8"; Add support for decoding this. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Simon Glass 提交于
We don't need to allocate a new region list when we run out of space. The outer function can take care of this for us. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Simon Glass 提交于
At present the last four bytes of the alias region are dropped in the case where the last alias is included. This results in a corrupted device tree. Fix this. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Simon Glass 提交于
It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add DTS for ep108 board. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Series-to: u-boot
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Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1 enabled in a board config.This fixes the issue of i2c error during board init if board specific doesnt have either I2C0 or I2C1. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 03 11月, 2015 13 次提交
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由 Daniel Gorsulowski 提交于
Signed-off-by: NDaniel Gorsulowski <daniel.gorsulowski@esd.eu>
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由 Wenyou Yang 提交于
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 specification. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
Some peripherals may need a second clock source that may be different from the system clock. This second clock is the generated clock (GCK) and is managed by the PMC via PMC_PCR. For simplicity, the clock source of the GCK is fixed to PLLA_CLK. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
According to the SDHC specification, stopping the SD Clock is by setting the SD Clock Enable bit in the Clock Control register at 0, instead of setting all bits at 0. Before stopping the SD clock, we need to make sure all SD transactions to complete, so add checking the CMD and DAT bits in the Presen State register, before stopping the SD clock. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Wenyou Yang 提交于
Provide the specific addresses for the Chip ID and Chip ID Extension registers, instead of the offset, which make it use on other chips. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Shengzhou Liu 提交于
T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing for PLL ratio. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Codrin Ciubotariu 提交于
On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to the Ethernet PHY because the wrong PHY address is used. Also, T1040D4RDB supports SGMII on one port only. Signed-off-by: NCodrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yangbo Lu 提交于
When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable EVDD automatic control via SDHC_VS. This could support SD card IO voltage switching for UHS-1 speed mode. Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yangbo Lu 提交于
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yangbo Lu 提交于
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yangbo Lu 提交于
If adapter card type identification is supported for platform, we would enable dat[4:7] for eMMC4.5 Adapter Card. Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Shaohui Xie 提交于
commit b8e5b072 "Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS board", T4160 also needs this fix. Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Zhao Qiang 提交于
qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed pins to qe-tdm, then delete diu node from device tree. Signed-off-by: NZhao Qiang <qiang.zhao@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 02 11月, 2015 7 次提交
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由 Josh Wu 提交于
As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5 boards is bigger than 16k (0x4000). That will overlap the U-Boot environment. So I move environment to 0x6000. And reduce its size as well. Following shows the size of the spl binaries (v2015.04 vs v2015.07): % ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}' 15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin % ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}' 16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin The gcc version is: gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1) Signed-off-by: NJosh Wu <josh.wu@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com> Acked-by: NBo Shen <voice.shen@gmail.com>
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由 Marek Vasut 提交于
Add 32bpp framebuffer support for the Atmel HLCDC driver. This is needed for output bpp higher than 16bpp. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Marek Vasut 提交于
Global variables are bad. Get rid of this particular one, so we can correctly instantiate multiple atmel mci interfaces, without having them interfere with one another. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Marek Vasut 提交于
Instead of passing just the register area as a private data, introduce a proper struct atmel_mci_priv structure instead. This will become useful in the subsequent patch, where we eliminate the global variable from this driver. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com> [fix free()] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Marek Vasut 提交于
After silencing the prints which were generated when reconfiguring the clock of the SD/MMC bus, surprisingly, the driver stopped working such that every attempt to use the SD/MMC bus caused the CPU to get totally stuck hard. It turns out that the prints generated a short delay, which was necessary for the CPU to reconfigure the clock without getting stuck. Thus, this patch adds a short delay after the clock configuration instead. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Marek Vasut 提交于
This driver generates clearly debugging prints when changing clock speed, so silence those. Furthermore, the driver generates further prints in case a command fails to complete. The later case woud be useful, but for eMMC, command 8 can fail and it's not an error but a part of the specification. Thus, make this debug() as well. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com> [fix checkpatch warnings] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Josh Wu 提交于
crt0.S do both memset the bss section and call board_init_r for us, so remove them from board_init_f(). Signed-off-by: NJosh Wu <josh.wu@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 31 10月, 2015 7 次提交
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由 Simon Glass 提交于
At present the debug UART is not selected which causes a build error. Correct this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Alison Wang 提交于
As more features are added for SD boot on LS1021A QDS board, the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS needs to be adjusted to a suitable value. Starting address of the malloc pool used in SPL needs to be adjusted too, or it will occupy the address u-boot loads. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Yao Yuan 提交于
I2C1 can work on ls102xa rev2.0 SD boot, so add ID EEPROM for SD boot. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 tang yuantian 提交于
It will take more than 1s when wake up from deep sleep. Most of the time is spent on outputing information. This patch reduced the deep sleep latency by: 1. avoid outputing system informaton 2. remove flush cache after DDR restore 3. skip reloading second stage uboot binary when SD boot Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Aneesh Bansal 提交于
The ITS bit was being read incorrectly beacause of operator precedence. The same ahs been corrected. Signed-off-by: NLawish Deshmukh <lawish.deshmukh@freescale.com> Signed-off-by: NAneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Joakim Tjernlund 提交于
SR_IE(Self-refresh interrupt enable) is needed for Hardware Based Self-Refresh. Make it configurable and let board code handle the rest. Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@transmode.se> Reviewed-by: NYork Sun <yorksun@freescale.com>
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- 30 10月, 2015 5 次提交
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Bin Meng 提交于
eth_get_dev() can return NULL which means device_probe() fails for that ethernet device. Add return value check in various places or U-Boot will crash due to NULL pointer access. With this commit, 'dm_test_eth_act' test case passes. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Bin Meng 提交于
U-Boot crashes when doing a 'ping' with the following test scenario: - All ethernet devices are not probed - "ethaddr" for all ethernet devices are not set - "ethact" is set to a valid ethernet device name Add a new test case 'dm_test_eth_act' to hit such scenario. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Bin Meng 提交于
platdata->enetaddr was assigned to a value in dev_probe() last time. If we don't clear it, for dev_probe() at the second time, dm eth will end up treating it as a MAC address from ROM no matter where it came from originally (maybe env, ROM, or even random). Fix this by clearing platdata->enetaddr when removing an Ethernet device. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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