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体验新版 GitCode,发现更多精彩内容 >>
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83bf0057
编写于
11月 02, 2015
作者:
D
Daniel Gorsulowski
提交者:
Andreas Bießmann
11月 03, 2015
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电子邮件补丁
差异文件
arm: at91: reworked meesc board support
Signed-off-by:
N
Daniel Gorsulowski
<
daniel.gorsulowski@esd.eu
>
上级
a3b59b15
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
36 addition
and
26 deletion
+36
-26
board/esd/meesc/meesc.c
board/esd/meesc/meesc.c
+16
-4
include/configs/meesc.h
include/configs/meesc.h
+20
-22
未找到文件。
board/esd/meesc/meesc.c
浏览文件 @
83bf0057
...
...
@@ -3,7 +3,7 @@
* Stelian Pop <stelian@popies.net>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2009-201
1
* (C) Copyright 2009-201
5
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
...
...
@@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
* Miscelaneous platform dependent initialisations
*/
#ifdef CONFIG_REVISION_TAG
static
int
hw_rev
=
-
1
;
/* hardware revision */
int
get_hw_rev
(
void
)
...
...
@@ -45,6 +46,7 @@ int get_hw_rev(void)
return
hw_rev
;
}
#endif
/* CONFIG_REVISION_TAG */
#ifdef CONFIG_CMD_NAND
static
void
meesc_nand_hw_init
(
void
)
...
...
@@ -125,12 +127,18 @@ static void meesc_ethercat_hw_init(void)
int
dram_init
(
void
)
{
gd
->
ram_size
=
get_ram_size
(
(
void
*
)
CONFIG_SYS_SDRAM_BASE
,
CONFIG_S
YS_SDRAM_SIZE
);
/* dram_init must store complete ramsize in gd->ram_size */
gd
->
ram_size
=
get_ram_size
((
void
*
)
PHYS_SDRAM
,
PH
YS_SDRAM_SIZE
);
return
0
;
}
void
dram_init_banksize
(
void
)
{
gd
->
bd
->
bi_dram
[
0
].
start
=
PHYS_SDRAM
;
gd
->
bd
->
bi_dram
[
0
].
size
=
PHYS_SDRAM_SIZE
;
}
int
board_eth_init
(
bd_t
*
bis
)
{
int
rc
=
0
;
...
...
@@ -140,6 +148,7 @@ int board_eth_init(bd_t *bis)
return
rc
;
}
#ifdef CONFIG_DISPLAY_BOARDINFO
int
checkboard
(
void
)
{
char
str
[
32
];
...
...
@@ -173,10 +182,13 @@ int checkboard(void)
puts
(
", serial# "
);
puts
(
str
);
}
#ifdef CONFIG_REVISION_TAG
printf
(
"
\n
Hardware-revision: 1.%d
\n
"
,
get_hw_rev
());
#endif
printf
(
"Mach-type: %lu
\n
"
,
gd
->
bd
->
bi_arch_number
);
return
0
;
}
#endif
/* CONFIG_DISPLAY_BOARDINFO */
#ifdef CONFIG_SERIAL_TAG
void
get_board_serial
(
struct
tag_serialnr
*
serialnr
)
...
...
include/configs/meesc.h
浏览文件 @
83bf0057
...
...
@@ -3,7 +3,7 @@
* Stelian Pop <stelian@popies.net>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2009-201
1
* (C) Copyright 2009-201
5
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
...
...
@@ -27,7 +27,7 @@
* Since the linker has to swallow that define, we must use a pure
* hex number here!
*/
#define CONFIG_SYS_TEXT_BASE 0x2
0002
000
#define CONFIG_SYS_TEXT_BASE 0x2
1F00
000
/*
* since a number of boards are not being listed in linux
...
...
@@ -56,14 +56,13 @@
#define CONFIG_DISPLAY_CPUINFO
/* display cpu info and speed */
#define CONFIG_PREBOOT
/* enable preboot variable */
#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT
/*
* Hardware drivers
*/
/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
/* general purpose I/O */
#define CONFIG_AT91_GPIO
...
...
@@ -87,10 +86,17 @@
/*
* Command line configuration.
*/
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#ifdef CONFIG_SYS_USE_NANDFLASH
#define CONFIG_CMD_NAND
#
define CONFIG_CMD_USB
#
endif
/* LED */
#define CONFIG_AT91_LED
...
...
@@ -99,9 +105,12 @@
* SDRAM: 1 bank, min 32, max 128 MB
* Initialized before u-boot gets started.
*/
#define PHYS_SDRAM ATMEL_BASE_CS1
/* 0x20000000 */
#define PHYS_SDRAM_SIZE 0x02000000
/* 32 MByte */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE
0x20000000
/* ATMEL_BASE_CS1 */
#define CONFIG_SYS_SDRAM_SIZE
0x02000000
#define CONFIG_SYS_SDRAM_BASE
PHYS_SDRAM
#define CONFIG_SYS_SDRAM_SIZE
PHYS_SDRAM_SIZE
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
...
...
@@ -133,7 +142,7 @@
#ifdef CONFIG_CMD_NAND
# define CONFIG_NAND_ATMEL
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_BASE
0x40000000
/* ATMEL_BASE_CS3
*/
# define CONFIG_SYS_NAND_BASE
ATMEL_BASE_CS3
/* 0x40000000
*/
# define CONFIG_SYS_NAND_DBW_8
# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
...
...
@@ -148,19 +157,6 @@
#define CONFIG_NET_RETRY_COUNT 20
#undef CONFIG_RESET_PHY_R
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
/* CAN */
#define CONFIG_AT91_CAN
/* hw-controller addresses */
#define CONFIG_ET1100_BASE 0x70000000
...
...
@@ -190,6 +186,8 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
/*
* Size of malloc() pool
...
...
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