arm: ls1021atwr: optimize the deep sleep latency

It will take more than 1s when wake up from deep sleep. Most of the
time is spent on outputing information. This patch reduced the deep
sleep latency by:
1. avoid outputing system informaton
2. remove flush cache after DDR restore
3. skip reloading second stage uboot binary when SD boot
Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

board/freescale/common/arm_sleep.c

@@ -12,7 +12,6 @@
 #include <asm/secure.h>
 #endif
 #include <asm/armv7.h>
-#include <asm/cache.h>
 
 #if defined(CONFIG_LS102XA)
 #include <asm/arch/immap_ls102xa.h>
@@ -65,8 +64,6 @@ static void dp_ddr_restore(void)
 
 	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
 		*dst++ = *src++;
-
-	flush_dcache_all();
 }
 
 static void dp_resume_prepare(void)
@@ -74,7 +71,6 @@ static void dp_resume_prepare(void)
 	dp_ddr_restore();
 	board_sleep_prepare();
 	armv7_init_nonsec();
-	cleanup_before_linux();
 #ifdef CONFIG_U_QE
 	u_qe_resume();
 #endif

board/freescale/ls1021atwr/ls1021atwr.c

@@ -436,8 +436,10 @@ int board_early_init_f(void)
 	}
 
 #if defined(CONFIG_DEEP_SLEEP)
-	if (is_warm_boot())
-		fsl_dp_disable_console();
+	if (is_warm_boot()) {
+		timer_init();
+		dram_init();
+	}
 #endif
 
 	return 0;
@@ -446,6 +448,8 @@ int board_early_init_f(void)
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong dummy)
 {
+	void (*second_uboot)(void);
+
 	/* Clear the BSS */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -466,6 +470,17 @@ void board_init_f(ulong dummy)
 	enable_layerscape_ns_access();
 #endif
 
+	/*
+	 * if it is woken up from deep sleep, then jump to second
+	 * stage uboot and continue executing without recopying
+	 * it from SD since it has already been reserved in memeory
+	 * in last boot.
+	 */
+	if (is_warm_boot()) {
+		second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
+		second_uboot();
+	}
+
 	board_init_r(NULL, 0);
 }
 #endif