“76cc7b284f2ce32d123d44e77e08028962bd6985”上不存在“projects/GusionTan/imports.yml”
  1. 26 1月, 2012 1 次提交
  2. 05 1月, 2012 3 次提交
  3. 03 1月, 2012 1 次提交
  4. 26 12月, 2011 1 次提交
  5. 25 12月, 2011 1 次提交
    • H
      ARM: mx5: use generic irq chip pm interface for pm functions on · 010dc8af
      Hui Wang 提交于
      Two problems exist in the current i.MX5 pm suspend/resume and idle
      functions. The first is the current i.MX5 suspend routine will call
      tzic_enable_wake(1) to set wake source, this will set all enabled
      irq as wake source rather than those wake capable. The second
      is i.MX5 idle will call mx5_cpu_lp_set() to prepare enter low power
      mode, but it forgets to call wfi instruction to enter this mode.
      
      To fix these two problems, using generic irq chip pm interface and
      modify function imx5_idle().
      
      [Tested by Shawn Guo on imx51 babbage board.
       Tested by Hui Wang on imx51 pdk board.]
      Signed-off-by: NHui Wang <jason77.wang@gmail.com>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      010dc8af
  6. 19 12月, 2011 1 次提交
  7. 08 12月, 2011 1 次提交
    • S
      video i.MX IPU: Fix display connections · f910fb8f
      Sascha Hauer 提交于
      The IPU internally works on 32bit colors. It can arbitrarily map
      between pixel formats and internal representation and also between
      internal representation and the physical connection to the display.
      The driver used to change the mapping between internal representation
      and display connection depending on the user selected bpp which is
      wrong. Instead, the mapping is specified by the hardware, so an
      additional field in platform data is added to describe the connection
      between i.MX and the display. The default for this field is RGB666
      which seems to be the only configuration which works without this
      patch, so I assumed that all in Kernel boards are connected this
      way.
      This patch has been tested on a RGB666 connected display and a
      RGB888 connected display in both 16bpp and 32bpp modes.
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      f910fb8f
  8. 27 11月, 2011 1 次提交
  9. 17 11月, 2011 1 次提交
  10. 16 11月, 2011 3 次提交
  11. 11 11月, 2011 2 次提交
  12. 04 11月, 2011 1 次提交
  13. 31 10月, 2011 5 次提交
  14. 25 10月, 2011 1 次提交
    • P
      plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired · 6571534b
      Paul Fertser 提交于
      To configure pads during the initialisation a set of special constants
      is used, e.g.
      #define MX25_PAD_FEC_MDIO__FEC_MDIO IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
      
      The problem is that no pull-up/down is getting activated unless both
      PAD_CTL_PUE (pull-up enable) and PAD_CTL_PKE (pull/keeper module
      enable) set. This is clearly stated in the i.MX25 datasheet and is
      confirmed by the measurements on hardware. This leads to some rather
      hard to understand bugs such as misdetecting an absent ethernet PHY (a
      real bug i had), unstable data transfer etc. This might affect mx25,
      mx35, mx50, mx51 and mx53 SoCs.
      
      It's reasonable to expect that if the pullup value is specified, the
      intention was to have it actually active, so we implicitly add the
      needed bits.
      
      Cc: stable@kernel.org
      Signed-off-by: NPaul Fertser <fercerpav@gmail.com>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      6571534b
  15. 18 10月, 2011 4 次提交
  16. 17 10月, 2011 1 次提交
  17. 14 10月, 2011 1 次提交
  18. 07 10月, 2011 1 次提交
  19. 04 10月, 2011 2 次提交
  20. 26 9月, 2011 4 次提交
  21. 23 9月, 2011 1 次提交
  22. 20 9月, 2011 3 次提交