Disintegrate asm/system.h for OpenRISC.  Not compiled.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
cc: linux@lists.openrisc.net

Several architectures define their own empty irq_dispose_mapping().  Since
the irq_domain code is centralized now, there is little need to do so.  This
patch removes them and creates a new empty copy when !CONFIG_IRQ_DOMAIN is
selected.

The patch also means that IRQ_DOMAIN becomes selectable on all architectures.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: sparclinux@vger.kernel.org
Cc: linux@lists.openrisc.net

Commits d7e7528b and
b05d8447 simplified the usage of the
audit_syscall_[entry|exit] functions.  Unfortunately, the OpenRISC
architecture didn't get fixed up along with the other architectures when
those patches were pushed.  This makes the relevant changes to this
architecture.
Signed-off-by: NJonas Bonn <jonas@southpole.se>

Use of EXPORT_SYMBOL requires inclusion of export.h
Signed-off-by: NJonas Bonn <jonas@southpole.se>

This hooks dtc into Kbuild's dependency system.

Thus, for example, "make dtbs" will rebuild tegra-harmony.dtb if only
tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
lack of this feature recently caused me to have very confusing "git
bisect" results.

For ARM, it's obvious what to add to $(targets). I'm not familiar enough
with other architectures to know what to add there. Powerpc appears to
already add various .dtb files into $(targets), but the other archs may
need something added to $(targets) to work.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
[mmarek: Dropped arch/c6x part to avoid merging commits from the middle
of the merge window]
Signed-off-by: NMichal Marek <mmarek@suse.cz>

frv, h8300, m68k, microblaze, openrisc, score, um and xtensa currently
do not register a CPU device.  Add the config option GENERIC_CPU_DEVICES
which causes a generic CPU device to be registered for each present CPU,
and make all these architectures select it.

Richard Weinberger <richard@nod.at> covered UML and suggested using
per_cpu.
Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Those two APIs were provided to optimize the calls of
tick_nohz_idle_enter() and rcu_idle_enter() into a single
irq disabled section. This way no interrupt happening in-between would
needlessly process any RCU job.

Now we are talking about an optimization for which benefits
have yet to be measured. Let's start simple and completely decouple
idle rcu and dyntick idle logics to simplify.
Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: NJosh Triplett <josh@joshtriplett.org>
Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>

It is assumed that rcu won't be used once we switch to tickless
mode and until we restart the tick. However this is not always
true, as in x86-64 where we dereference the idle notifiers after
the tick is stopped.

To prepare for fixing this, add two new APIs:
tick_nohz_idle_enter_norcu() and tick_nohz_idle_exit_norcu().

If no use of RCU is made in the idle loop between
tick_nohz_enter_idle() and tick_nohz_exit_idle() calls, the arch
must instead call the new *_norcu() version such that the arch doesn't
need to call rcu_idle_enter() and rcu_idle_exit().

Otherwise the arch must call tick_nohz_enter_idle() and
tick_nohz_exit_idle() and also call explicitly:

- rcu_idle_enter() after its last use of RCU before the CPU is put
to sleep.
- rcu_idle_exit() before the first use of RCU after the CPU is woken
up.
Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>

The tick_nohz_stop_sched_tick() function, which tries to delay
the next timer tick as long as possible, can be called from two
places:

- From the idle loop to start the dytick idle mode
- From interrupt exit if we have interrupted the dyntick
idle mode, so that we reprogram the next tick event in
case the irq changed some internal state that requires this
action.

There are only few minor differences between both that
are handled by that function, driven by the ts->inidle
cpu variable and the inidle parameter. The whole guarantees
that we only update the dyntick mode on irq exit if we actually
interrupted the dyntick idle mode, and that we enter in RCU extended
quiescent state from idle loop entry only.

Split this function into:

- tick_nohz_idle_enter(), which sets ts->inidle to 1, enters
dynticks idle mode unconditionally if it can, and enters into RCU
extended quiescent state.

- tick_nohz_irq_exit() which only updates the dynticks idle mode
when ts->inidle is set (ie: if tick_nohz_idle_enter() has been called).

To maintain symmetry, tick_nohz_restart_sched_tick() has been renamed
into tick_nohz_idle_exit().

This simplifies the code and micro-optimize the irq exit path (no need
for local_irq_save there). This also prepares for the split between
dynticks and rcu extended quiescent state logics. We'll need this split to
further fix illegal uses of RCU in extended quiescent states in the idle
loop.
Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Reviewed-by: NJosh Triplett <josh@joshtriplett.org>

The only function of memblock_analyze() is now allowing resize of
memblock region arrays.  Rename it to memblock_allow_resize() and
update its users.

* The following users remain the same other than renaming.

  arm/mm/init.c::arm_memblock_init()
  microblaze/kernel/prom.c::early_init_devtree()
  powerpc/kernel/prom.c::early_init_devtree()
  openrisc/kernel/prom.c::early_init_devtree()
  sh/mm/init.c::paging_init()
  sparc/mm/init_64.c::paging_init()
  unicore32/mm/init.c::uc32_memblock_init()

* In the following users, analyze was used to update total size which
  is no longer necessary.

  powerpc/kernel/machine_kexec.c::reserve_crashkernel()
  powerpc/kernel/prom.c::early_init_devtree()
  powerpc/mm/init_32.c::MMU_init()
  powerpc/mm/tlb_nohash.c::__early_init_mmu()  
  powerpc/platforms/ps3/mm.c::ps3_mm_add_memory()
  powerpc/platforms/embedded6xx/wii.c::wii_memory_fixups()
  sh/kernel/machine_kexec.c::reserve_crashkernel()

* x86/kernel/e820.c::memblock_x86_fill() was directly setting
  memblock_can_resize before populating memblock and calling analyze
  afterwards.  Call memblock_allow_resize() before start populating.

memblock_can_resize is now static inside memblock.c.
Signed-off-by: NTejun Heo <tj@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "H. Peter Anvin" <hpa@zytor.com>

memblock_init() initializes arrays for regions and memblock itself;
however, all these can be done with struct initializers and
memblock_init() can be removed.  This patch kills memblock_init() and
initializes memblock with struct initializer.

The only difference is that the first dummy entries don't have .nid
set to MAX_NUMNODES initially.  This doesn't cause any behavior
difference.
Signed-off-by: NTejun Heo <tj@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "H. Peter Anvin" <hpa@zytor.com>

24aa0788 (memblock, x86: Replace memblock_x86_reserve/free_range()
with generic ones) removed arch/x86/include/asm/memblock.h and dropped
its inclusion from include/linux/memblock.h which breaks other
architectures which depended on the generic memblock.h pulling in the
arch specific one.

However, the proper fix isn't adding back the asm inclusion.  memblock
doesn't have any arch dependent part and doesn't need arch specific
header file and asm/memblock.h files are either practically empty or
contain mostly unrelated arch specific stuff.

* In microblaze, sh, powerpc, sparc and openrisc, asm/memblock.h is
  either empty or just contains unused MEMBLOCK_DBG() macro.  Remove
  them.

* In arm and unicore32, asm/memblock.h contains arch specific stuff.
  Include it directly from its users.  It might be a good idea to
  rename the header file to avoid confusion.
Signed-off-by: NTejun Heo <tj@kernel.org>
Reported-by: N"H. Peter Anvin" <hpa@zytor.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>

define GENERIC_IOMAP in a central location
instead of all architectures. This will be helpful
for the follow-up patch which makes it select
other configs. Code is also a bit shorter this way.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

There are numerous broken references to Documentation files (in other
Documentation files, in comments, etc.). These broken references are
caused by typo's in the references, and by renames or removals of the
Documentation files. Some broken references are simply odd.

Fix these broken references, sometimes by dropping the irrelevant text
they were part of.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

For the initial architecture submission, not all of the DMA ops were
implemented.  This patch adds the *map_page and *map_sg variants of the
DMA mapping ops.

This patch is currently of interest mainly to some drivers that haven't
been submitted upstream yet.
Signed-off-by: NJonas Bonn <jonas@southpole.se>

As it was decided not to export struct pt_regs to userspace, struct
sigcontext shouldn't be using it either.  The pt_regs struct for OpenRISC
is kernel internal and the layout of the registers may change in the
future.  The struct user_regs_struct is what is guaranteed to remain
stable, so struct sigcontext may use that instead.

This patch removes the usage of struct pt_regs in struct sigcontext and
makes according changes in signal.c to get the register layout right.

The usp field is removed from the sigcontext structure as this information
is already contained in the user_regs_struct.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NEmilio Cota <cota@braap.org>

Adds README file, TODO list, and a couple of other pieces that didn't seem
to fit into any other patch.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Minimal functionality...
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

The OpenRISC Linux kernel conforms to the "generic" syscall interface which
contains only the reduced set of syscalls deemed necessary for new
architectures.  Unfortunately, the uClibc port for OpenRISC does not fully
support this reduced set; as such, an additional patch available out-of-tree
needs to be applied to the kernel in order to use the current uClibc.  This
is just a temporary measure until the libc port can be straightened out; it
is likely that OpenRISC will make the transition to glibc shortly where the
generic syscall interface is better supported.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

This patch adds support for the OpenRISC PIC.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Implements support for the OpenRISC timer which is a 28 bit cycle counter
that can be read out of a special purpose register.  This counter is
used as a both a clock event and clocksource device.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Simple DMA implementation.  Allows for allocation of coherent memory
(simply uncached) for DMA operations.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

This patch implements minimal PTrace support.  The pt_regs structure is
not exported to userspace for OpenRISC; rather, the GETREGSET mechanism
is intended to be used and the registers, as such, exported in the core
dump format which is ABI stable.  This is in line with what is intended
for new architectures as of 2.6.34 and has the advantage of permitting
the layout of the registers on the kernel stack (as per pt_regs) to be
freely modified.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

The OpenRISC architecture uses the device tree infrastructure for the
platform description.  This is currently limited to having a device tree
built into the kernel, but work is underway within the OpenRISC project
to define how this device tree blob should be passed into the kernel from
an external resource.

Patch contains a single example DTS file to go with the defconfig for
or1ksim.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: devicetree-discuss@lists.ozlabs.org
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Architecture code and early setup routines for booting Linux.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>