- 08 11月, 2011 3 次提交
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由 Tomi Valkeinen 提交于
The OMAP4 HWMOD data currently contains errors with DSS clocks: dss_hdmi and dss_venc have their main_clks wrong. The clocks should be dss_48mhz_clk and dss_tv_clk, respectively. These problems were temporarily fixed with the DSS patches 9ede365a ("HACK: OMAP: DSS2: clk hack for OMAP2/3"), and df5d3ed2 ("OMAP: DSS2: HDMI: fix hdmi clock name"), which can be reverted after this patch. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tomi Valkeinen 提交于
DSS needs all DSS clocks to be enabled to be able to finish reset properly. Before v3.1-rc1 the omapdss driver was managing clocks and resets correctly. However, when omapdss started using runtime PM at v3.1-rc1, the responsibility for the reset moved to HWMOD framework. HWMOD framework does not currently enable all the DSS clocks when resetting the DSS hardware. This causes the HWMOD frameworks boot-time reset to fail, possibly leaving the DSS hardware in undefined state. This patch sets HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core. The flag is actually not used on OMAP4, because dss_core hardware does not have soft-reset functionality and thus the HWMOD framework never resets nor waits for the reset to finish. However, while the flag is not strictly needed currently, I think it represents the HW correctly: all the DSS clocks should be enabled after power-on to allow DSS hardware to finish its reset. A custom reset function will be added in the following patches which manages this correctly for OMAP4. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tomi Valkeinen 提交于
Remove the dss_dss_clk from dss_core's opt-clocks. dss_dss_clk already defined as the dss main_clk, and thus is not needed as an opt-clock. Remove opt-clocks for dss_dispc, as dispc only uses the main_clk. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 22 9月, 2011 2 次提交
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由 Peter Ujfalusi 提交于
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Jorge Eduardo Candelaria Signed-off-by: Margarita Olaya Cabrera Signed-off-by: NLiam Girdwood <lrg@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NBenoit Cousson <b-cousson@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tarun Kanti DebBarma 提交于
Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: NThara Gopinath <thara@ti.com> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCousson, Benoit <b-cousson@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 9月, 2011 1 次提交
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由 Paul Walmsley 提交于
At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and replace it instead with chip family, variant, and ES level-specific lists of hwmods to register. Thanks to Gražvydas Ignotas <notasas@gmail.com> for finding a bug in the AM3517/3505 support, and for other review comments. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Gražvydas Ignotas <notasas@gmail.com>
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- 10 7月, 2011 19 次提交
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由 Benoit Cousson 提交于
Add a new field to provide the mode supported by the module. The mode will control the way mandatory clocks are managed by the PRCM. 0 : Module is temporarily disabled by SW. OCP access to module are stalled. Can be used to change timing parameter of GPMC module. 1 : Module is managed automatically by HW according to clock domain transition. A clock domain sleep transition put module into idle. A wakeup domain transition put it back into function. If CLKTRCTRL=3, any OCP access to module is always granted. Module clocks may be gated according to the clock domain state. 2 : Module is explicitly enabled. Interface clock (if not used for functions) may be gated according to the clock domain state. Functional clocks are guarantied to stay present. As long as in this configuration, power domain sleep transition cannot happen. Some modules will have a modulemode initialized at 1 (HWCTRL) by default. This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Add a 'context_offs' entry in the prcm.omap4 structure to all IPs when applicable. The offset will be used to retrieve the per module context lost information now available on OMAP4. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The RSTCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of an offset will allow future improvement like migration from the current architecture code toward a module driver. Update prm_xxx accessors, move definition to the proper header file and update copyrights. Change the s16 register offset parameter to u16. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: use '_prminst_' in function names that are part of the prminst44xx.c file] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The CLKCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of a offset will allow future improvement like migration from the current architecture code toward a module driver. Update cm_xxx accessor, move definition to the proper header file and update copyrights. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Todd Poynor <toddpoynor@google.com> [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty fn prototype section from cm44xx.h; incorporated comments from Todd; documented some functions] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
In OMAP PRCM terminology, the clock domain is defined as a group of IPs that share some clocks and most of the time an interface clock. Every IP does belong to a clockdomain. For the moment the clock domain attribute is affected to a clock node. The issue with that approach, is that a clock might or not belong to a clock domain. Moreover during module transition, it is up to a module to handle properly the clock domain state and not to a clock node. Create a clkdm_name attribute to provide this information per hwmod. Populate this attribute for every OMAP4 hwmod entries. Future cleanup series with remove that information from the OMAP4 clock when it is relevant. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: fix the mpuss_clkdm name] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Avinash.H.M 提交于
The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NAvinash.H.M <avinashhm@ti.com> [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Andy Green 提交于
This adds the new functionality flags for omap i2c unit to all OMAP2 hwmod definitions Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndy Green <andy.green@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Andy Green 提交于
Since we cannot trust (or even reliably find) the OMAP I2C peripheral unit's own revision register, we must inform the OMAP i2c driver of which IP version it is running on. We do this by tagging the omap_hwmod_class for i2c on all the OMAP2+ platform / cpu specific hwmod init and passing it up to the driver (next patches). Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndy Green <andy.green@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Andy Green 提交于
Peter Maydell noticed when running under QEMU he was getting errors reporting 32-bit access to I2C peripheral unit registers that are documented to be 8 or 16-bit only[1][2] The I2C driver is blameless as it wraps its accesses in a function using __raw_writew and __raw_readw, it turned out it is the hwmod stuff. However the hwmod code already has a flag to force a perhipheral unit to only be accessed using 16-bit operations. This patch applies the 16-bit only flag to the 2430, OMAP3xxx and OMAP44xx hwmod structs. 2420 was already correctly marked up as 16-bit. The 2430 change will need testing by TI as arranged in the comments to the previous patch version. When the 16-bit flag is or-ed with other flags, it is placed first as requested in comments. [1] OMAP4430 Technical reference manual section 23.1.6.2 [2] OMAP3530 Techincal reference manual section 18.6 Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndy Green <andy.green@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tomi Valkeinen 提交于
Currently using pm_runtime with DSS requires the DSS driver to enable the DSS functional clock before calling pm_runtime_get(). That makes it impossible to use pm_runtime in DSS as it is meant to be used, with pm_runtime callbacks. This patch changes the hwmod database for OMAP4 so that enabling the hwmod via pm_runtime will also enable the DSS functional clock, allowing us to use pm_runtime properly in DSS driver. The DSS HWMOD side is not really correct, not before nor after this patch, and getting DSS to retention will probably not work currently. However, it is not supported in the mainline kernel anyway, so this won't break anything. So this patch allows us to write the pm_runtime adaptation for the DSS driver the way it should be done, and the HWMOD/PM side can be fixed later. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tomi Valkeinen 提交于
Add missing DSS optional clocks to HWMOD data for OMAP4xxx. Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> [b-cousson@ti.com: Remove a comment and update the subject] Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> [paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's request] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The interconnect modules were using a slightly different layout than the regular modules. Align the layout for better consitency. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Fix .prcm alignement and usb_otg_hs class and hwmod structures. Add a couple of more potential hwmods in the comment. Remove hsi, since it is already included in the data. Remove one blank line. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
A couple of parens were added around some flags. Remove them, since they are not needed and not used for any other hwmods. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Change the position of the ocp_if structure to match the template. Remove unneeded comma at the end of address space flag field. Remove USER_SDMA since this ocp link is only from the l3_main_1 path that is accessible only from the MPU in that case and not the SDMA. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
Previously, struct omap_hwmod_addr_space arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space arrays and uses a null structure member as the array terminator instead. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Add the flag to every IPs that support it to allow the framework to enable it instead of the SMART_STANDBY default mode. Without that, an IP with busmaster capability will not be able to wakeup the interconnect at all. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 01 6月, 2011 1 次提交
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由 Shubhrajyoti D 提交于
Commit 407a6888 (OMAP4: hwmod data: Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU) added the entry for keypad, but did not enable it. Enable the keypad in the hwmod database so it works. Signed-off-by: Shubhrajyoti D<shubhrajyoti@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 4月, 2011 1 次提交
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由 Benoit Cousson 提交于
OMAP2420, 2430 and 3xxx were using the OMAP4 end address that unfortunately is not located at the same base address. Moreover the OMAP4 size was set to 256 instead of 4096. Change all .pa_end to set them to .pa_start + 0xfff Cc: "G, Manjunath Kondaiah" <manjugk@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Reported-by: NMichael Fillinger <m-fillinger@ti.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 3月, 2011 1 次提交
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由 sricharan 提交于
Add the address spaces, irqs of the l3 interconnect to the hwmod data. The hwmod change is aligned with Benoit Cousson. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Nsricharan <r.sricharan@ti.com> Acked-by: NBenoit Cousson <b-cousson@ti.com>
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- 05 3月, 2011 1 次提交
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由 Benoit Cousson 提交于
The following commit: 38698bef: OMAP2+: clockevent: set up GPTIMER clockevent hwmod right before timer init Fixed properly the issue with early init for the timer1 So reverts commit 3b03b58d that is now generated a warning at boot time. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 3月, 2011 2 次提交
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由 Kishore Kadiyala 提交于
Add a device attribute to hwmod data of omap2430, omap3, omap4. Currently the device attribute holds information regarding dual volt MMC card support by the controller which will be later passed to the host driver via platform data. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Anand Gadiyar 提交于
Enabling hsmmc hwmod for OMAP4 Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 3月, 2011 1 次提交
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由 Paul Walmsley 提交于
Rename omap_hwmod_init() to omap_hwmod_register(). Rename omap_hwmod_late_init() to omap_hwmod_setup_all(). Also change all of the callers to reflect the new names. While here, update some copyrights. Suggested by Tony Lindgren <tony@atomide.com>. N.B. The comment in mach-omap2/serial.c may no longer be correct, given recent changes in init order. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com>
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- 25 2月, 2011 1 次提交
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由 Kishon Vijay Abraham I 提交于
Added a name to address space belonging to SDMA and MPU facilitating the driver to get the address space info by name. Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap. Also added a platform_get_irq in probe to get irq number by index since from OMAP4, there will be a single irq line. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 2月, 2011 1 次提交
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由 Benoit Cousson 提交于
Since the timer1 is now started before the hwmod_init, we cannot reset it and idle it anymore. Add the appropriate flags to prevent the hwmod framework to do that. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 2月, 2011 1 次提交
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由 Benoit Cousson 提交于
- Add a rev attribute to identify various McSPI IP version. - Add a dev_attr structure to provide the number of chipselect supported by the instance. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 2月, 2011 5 次提交
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由 Benoit Cousson 提交于
OMAP4 hwmod data structures are populated with base address, L3 and L4 interface clocks, IRQs and sysconfig register details. As per OMAP USBOTG specification, need to configure the USBOTG to smart idle/standby or no idle/standby during data transfer and force idle/standby when not in use to support retention and offmode. By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags,framework will take care of configuring to no idle/standby when module is enabled and force idle/standby when idled. Signed-off-by: NCousson, Benoit <b-cousson@ti.com> Signed-off-by: NHema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> [b-cousson@ti.com: Fix position, opt_clk, and author]
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由 Benoit Cousson 提交于
Add more hwmod structures but keep them commented out for the moment until the driver adaptation to hwmod / omap_device is done. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com>
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由 Benoit Cousson 提交于
Add mcbsp data including a revision member in hwmod_class in order to provide mcbsp revision information in different omap. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NCharulatha V <charu@ti.com> [b-cousson@ti.com: Remove the mcbsp4 memory name, re-order properly the structures]
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由 Benoit Cousson 提交于
Add HWMOD entries for the OMAP DMIC. The HWMOD entires define the system resource requirements for the driver such as DMA addresses, channels, and IRQ's. Placing this information in the HWMOD database allows for more generic drivers to be written and having the specific implementation details defined in HWMOD. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NDavid Lambert <dlambert@ti.com> [b-cousson@ti.com: Change the wrong hwmod name, add missing flag and re-order structures]
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由 Benoit Cousson 提交于
Mailbox hwmod data for omap4. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NOmar Ramirez Luna <omar.ramirez@ti.com> [b-cousson@ti.com: Re-order the structures and remove the irq line name]
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