1. 08 11月, 2011 3 次提交
    • T
      ARM: OMAP4: HWMOD: fix DSS clock data · 4d0698d9
      Tomi Valkeinen 提交于
      The OMAP4 HWMOD data currently contains errors with DSS clocks:
      
      dss_hdmi and dss_venc have their main_clks wrong. The clocks should be
      dss_48mhz_clk and dss_tv_clk, respectively.
      
      These problems were temporarily fixed with the DSS patches
      9ede365a ("HACK: OMAP: DSS2: clk hack
      for OMAP2/3"), and df5d3ed2 ("OMAP:
      DSS2: HDMI: fix hdmi clock name"), which can be reverted after this
      patch.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      4d0698d9
    • T
      ARM: OMAP4: HWMOD: Add HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core · 37ad0855
      Tomi Valkeinen 提交于
      DSS needs all DSS clocks to be enabled to be able to finish reset
      properly. Before v3.1-rc1 the omapdss driver was managing clocks and
      resets correctly. However, when omapdss started using runtime PM at
      v3.1-rc1, the responsibility for the reset moved to HWMOD framework.
      
      HWMOD framework does not currently enable all the DSS clocks when
      resetting the DSS hardware. This causes the HWMOD frameworks boot-time
      reset to fail, possibly leaving the DSS hardware in undefined state.
      
      This patch sets HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core. The flag
      is actually not used on OMAP4, because dss_core hardware does not have
      soft-reset functionality and thus the HWMOD framework never resets nor
      waits for the reset to finish.
      
      However, while the flag is not strictly needed currently, I think it
      represents the HW correctly: all the DSS clocks should be enabled after
      power-on to allow DSS hardware to finish its reset.
      
      A custom reset function will be added in the following patches which
      manages this correctly for OMAP4.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      37ad0855
    • T
      ARM: OMAP4: HWMOD: remove extra clocks · 4247878e
      Tomi Valkeinen 提交于
      Remove the dss_dss_clk from dss_core's opt-clocks. dss_dss_clk already
      defined as the dss main_clk, and thus is not needed as an opt-clock.
      
      Remove opt-clocks for dss_dispc, as dispc only uses the main_clk.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      4247878e
  2. 22 9月, 2011 2 次提交
  3. 15 9月, 2011 1 次提交
    • P
      OMAP2+: hwmod: remove OMAP_CHIP* · d6504acd
      Paul Walmsley 提交于
      At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and
      replace it instead with chip family, variant, and ES level-specific lists
      of hwmods to register.
      
      Thanks to Gražvydas Ignotas <notasas@gmail.com> for finding a bug in the
      AM3517/3505 support, and for other review comments.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Gražvydas Ignotas <notasas@gmail.com>
      d6504acd
  4. 10 7月, 2011 19 次提交
    • B
      OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure · 03fdefe5
      Benoit Cousson 提交于
      Add a new field to provide the mode supported by the module.
      The mode will control the way mandatory clocks are managed by the PRCM.
      
        0 : Module is temporarily disabled by SW. OCP access to module are stalled.
            Can be used to change timing parameter of GPMC module.
        1 : Module is managed automatically by HW according to clock domain
            transition. A clock domain sleep transition put module into idle.
            A wakeup domain transition put it back into function.
            If CLKTRCTRL=3, any OCP access to module is always granted.
            Module clocks may be gated according to the clock domain state.
        2 : Module is explicitly enabled. Interface clock (if not used for
            functions) may be gated according to the clock domain state.
            Functional clocks are guarantied to stay present. As long as
            in this configuration, power domain sleep transition cannot happen.
      
      Some modules will have a modulemode initialized at 1 (HWCTRL) by default.
      This is the case for interconnect and simple module like GPIO, WDT, MAILBOX.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      03fdefe5
    • B
      OMAP4: hwmod data: Add PRM context register offset · 27bb00b5
      Benoit Cousson 提交于
      Add a 'context_offs' entry in the prcm.omap4 structure to all
      IPs when applicable.
      The offset will be used to retrieve the per module context lost
      information now available on OMAP4.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      27bb00b5
    • B
      OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros · eaac329d
      Benoit Cousson 提交于
      The RSTCTRL register was accessed using an absolute address.
      The usage of hardcoded macros to calculate virtual address from physical
      one should be avoided as much as possible.
      The usage of an offset will allow future improvement like migration from
      the current architecture code toward a module driver.
      
      Update prm_xxx accessors, move definition to the proper header file and
      update copyrights.
      Change the s16 register offset parameter to u16.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: use '_prminst_' in function names that are part of the
       prminst44xx.c file]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      eaac329d
    • B
      OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros · d0f0631d
      Benoit Cousson 提交于
      The CLKCTRL register was accessed using an absolute address.
      The usage of hardcoded macros to calculate virtual address from physical
      one should be avoided as much as possible.
      The usage of a offset will allow future improvement like migration from
      the current architecture code toward a module driver.
      
      Update cm_xxx accessor, move definition to the proper header file and
      update copyrights.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Todd Poynor <toddpoynor@google.com>
      [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty
       fn prototype section from cm44xx.h; incorporated comments from Todd;
       documented some functions]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      d0f0631d
    • B
      OMAP4: hwmod data: Add clock domain attribute · a5322c6f
      Benoit Cousson 提交于
      In OMAP PRCM terminology, the clock domain is defined as a group of IPs
      that share some clocks and most of the time an interface clock.
      Every IP does belong to a clockdomain.
      For the moment the clock domain attribute is affected to a clock node.
      The issue with that approach, is that a clock might or not belong to a
      clock domain. Moreover during module transition, it is up to a module
      to handle properly the clock domain state and not to a clock node.
      
      Create a clkdm_name attribute to provide this information per hwmod.
      
      Populate this attribute for every OMAP4 hwmod entries.
      
      Future cleanup series with remove that information from the OMAP4 clock
      when it is relevant.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: fix the mpuss_clkdm name]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      a5322c6f
    • A
      OMAP: hwmod: fix the i2c-reset timeout during bootup · 6d3c55fd
      Avinash.H.M 提交于
      The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a
      special sequence to reset the module. The sequence is
       - Disable the I2C.
       - Write to SOFTRESET bit.
       - Enable the I2C.
       - Poll on the RESETDONE bit.
      The sequence is implemented as a function and the i2c_class is updated with
      the correct 'reset' pointer.  omap_hwmod_softreset function is implemented
      which triggers the softreset by writing into sysconfig register. On following
      this sequence, i2c module resets properly and timeouts are not seen.
      
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NAvinash.H.M <avinashhm@ti.com>
      [paul@pwsan.com: combined this patch with a patch to remove
       HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register
       offset conditional code to use the IP block revision; minor code
       cleanup]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      6d3c55fd
    • A
      I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr · 4d4441a6
      Andy Green 提交于
      This adds the new functionality flags for omap i2c unit to all OMAP2
      hwmod definitions
      
      Cc: patches@linaro.org
      Cc: Ben Dooks <ben-linux@fluff.org>
      Reported-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NAndy Green <andy.green@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      4d4441a6
    • A
      I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision · db791a75
      Andy Green 提交于
      Since we cannot trust (or even reliably find) the OMAP I2C
      peripheral unit's own revision register, we must inform the
      OMAP i2c driver of which IP version it is running on.  We
      do this by tagging the omap_hwmod_class for i2c on all the
      OMAP2+ platform / cpu specific hwmod init and passing it up
      to the driver (next patches).
      
      Cc: patches@linaro.org
      Cc: Ben Dooks <ben-linux@fluff.org>
      Reported-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NAndy Green <andy.green@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      db791a75
    • A
      I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c · 3e600522
      Andy Green 提交于
      Peter Maydell noticed when running under QEMU he was getting
      errors reporting 32-bit access to I2C peripheral unit registers
      that are documented to be 8 or 16-bit only[1][2]
      
      The I2C driver is blameless as it wraps its accesses in a
      function using __raw_writew and __raw_readw, it turned out it
      is the hwmod stuff.
      
      However the hwmod code already has a flag to force a
      perhipheral unit to only be accessed using 16-bit operations.
      
      This patch applies the 16-bit only flag to the 2430,
      OMAP3xxx and OMAP44xx hwmod structs.  2420 was already
      correctly marked up as 16-bit.
      
      The 2430 change will need testing by TI as arranged
      in the comments to the previous patch version.
      
      When the 16-bit flag is or-ed with other flags, it is placed
      first as requested in comments.
      
      [1] OMAP4430 Technical reference manual section 23.1.6.2
      [2] OMAP3530 Techincal reference manual section 18.6
      
      Cc: patches@linaro.org
      Cc: Ben Dooks <ben-linux@fluff.org>
      Reported-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NAndy Green <andy.green@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      3e600522
    • T
      OMAP4: hwmod data: Change DSS main_clk scheme · da7cdfac
      Tomi Valkeinen 提交于
      Currently using pm_runtime with DSS requires the DSS driver to enable
      the DSS functional clock before calling pm_runtime_get(). That makes it
      impossible to use pm_runtime in DSS as it is meant to be used, with
      pm_runtime callbacks.
      
      This patch changes the hwmod database for OMAP4 so that enabling the
      hwmod via pm_runtime will also enable the DSS functional clock, allowing
      us to use pm_runtime properly in DSS driver.
      
      The DSS HWMOD side is not really correct, not before nor after this
      patch, and getting DSS to retention will probably not work currently.
      However, it is not supported in the mainline kernel anyway, so this
      won't break anything.
      
      So this patch allows us to write the pm_runtime adaptation for the DSS
      driver the way it should be done, and the HWMOD/PM side can be fixed
      later.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      da7cdfac
    • T
      OMAP4: hwmod data: Modify DSS opt clocks · 3a23aafc
      Tomi Valkeinen 提交于
      Add missing DSS optional clocks to HWMOD data for OMAP4xxx.
      
      Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      [b-cousson@ti.com: Remove a comment and update the subject]
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      [paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's
       request]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      3a23aafc
    • B
      OMAP4: hwmod data: Align interconnect format with regular modules · 7e69ed97
      Benoit Cousson 提交于
      The interconnect modules were using a slightly different layout than
      the regular modules.
      Align the layout for better consitency.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      7e69ed97
    • B
      OMAP4: hwmod data: Fix bad alignement · 00fe610b
      Benoit Cousson 提交于
      Fix .prcm alignement and usb_otg_hs class and hwmod structures.
      
      Add a couple of more potential hwmods in the comment.
      Remove hsi, since it is already included in the data.
      
      Remove one blank line.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      00fe610b
    • B
      OMAP4: hwmod data: Remove un-needed parens · 7ecc5373
      Benoit Cousson 提交于
      A couple of parens were added around some flags.
      
      Remove them, since they are not needed and not used
      for any other hwmods.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      7ecc5373
    • B
      OMAP4: hwmod data: Fix L3 interconnect data order and alignement · 9b4021be
      Benoit Cousson 提交于
      Change the position of the ocp_if structure to match the template.
      
      Remove unneeded comma at the end of address space flag field.
      
      Remove USER_SDMA since this ocp link is only from the l3_main_1
      path that is accessible only from the MPU in that case and not
      the SDMA.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      9b4021be
    • P
      omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays · bc614958
      Paul Walmsley 提交于
      Previously, struct omap_hwmod_dma_info arrays were unterminated; and
      users of these arrays used the ARRAY_SIZE() macro to determine the
      length of the array.  However, ARRAY_SIZE() only works when the array
      is in the same scope as the macro user.
      
      So far this hasn't been a problem.  However, to reduce duplicated
      data, a subsequent patch will move common data to a separate, shared
      file.  When this is done, ARRAY_SIZE() will no longer be usable.
      
      This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info
      arrays and uses a sentinel value (irq == -1) as the array terminator
      instead.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      bc614958
    • P
      omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays · 212738a4
      Paul Walmsley 提交于
      Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and
      users of these arrays used the ARRAY_SIZE() macro to determine the
      length of the array.  However, ARRAY_SIZE() only works when the array
      is in the same scope as the macro user.
      
      So far this hasn't been a problem.  However, to reduce duplicated
      data, a subsequent patch will move common data to a separate, shared
      file.  When this is done, ARRAY_SIZE() will no longer be usable.
      
      This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs
      arrays and uses a sentinel value (irq == -1) as the array terminator
      instead.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      212738a4
    • P
      omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays · 78183f3f
      Paul Walmsley 提交于
      Previously, struct omap_hwmod_addr_space arrays were unterminated; and
      users of these arrays used the ARRAY_SIZE() macro to determine the
      length of the array.  However, ARRAY_SIZE() only works when the array
      is in the same scope as the macro user.
      
      So far this hasn't been a problem.  However, to reduce duplicated
      data, a subsequent patch will move common data to a separate, shared
      file.  When this is done, ARRAY_SIZE() will no longer be usable.
      
      This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space
      arrays and uses a null structure member as the array terminator
      instead.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      
      
      
      
      78183f3f
    • B
      OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag · c614ebf6
      Benoit Cousson 提交于
      Add the flag to every IPs that support it to allow the
      framework to enable it instead of the SMART_STANDBY default
      mode.
      Without that, an IP with busmaster capability will not
      be able to wakeup the interconnect at all.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      c614ebf6
  5. 01 6月, 2011 1 次提交
    • S
      omap4: hwmod: Enable the keypad · 4998b245
      Shubhrajyoti D 提交于
      Commit 407a6888 (OMAP4: hwmod data:
      Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU) added the
      entry for keypad, but did not enable it.
      
      Enable the keypad in the hwmod database so it works.
      
      Signed-off-by: Shubhrajyoti D<shubhrajyoti@ti.com>
      Acked-by: Benoit Cousson<b-cousson@ti.com>
      [tony@atomide.com: updated comments]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      4998b245
  6. 20 4月, 2011 1 次提交
  7. 09 3月, 2011 1 次提交
  8. 05 3月, 2011 1 次提交
  9. 02 3月, 2011 2 次提交
  10. 01 3月, 2011 1 次提交
    • P
      OMAP2+: hwmod: rename some init functions · 550c8092
      Paul Walmsley 提交于
      Rename omap_hwmod_init() to omap_hwmod_register().  Rename
      omap_hwmod_late_init() to omap_hwmod_setup_all().  Also change all of
      the callers to reflect the new names.  While here, update some
      copyrights.
      
      Suggested by Tony Lindgren <tony@atomide.com>.
      
      N.B. The comment in mach-omap2/serial.c may no longer be correct, given
           recent changes in init order.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      550c8092
  11. 25 2月, 2011 1 次提交
  12. 23 2月, 2011 1 次提交
  13. 22 2月, 2011 1 次提交
  14. 18 2月, 2011 5 次提交