qla_mbx.c 130.9 KB
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/*
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Andrew Vasquez 已提交
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2013 QLogic Corporation
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 *
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Andrew Vasquez 已提交
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"
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#include "qla_target.h"
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#include <linux/delay.h>
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#include <linux/gfp.h>
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/*
 * qla2x00_mailbox_command
 *	Issue mailbox command and waits for completion.
 *
 * Input:
 *	ha = adapter block pointer.
 *	mcp = driver internal mbx struct pointer.
 *
 * Output:
 *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
 *
 * Returns:
 *	0 : QLA_SUCCESS = cmd performed success
 *	1 : QLA_FUNCTION_FAILED   (error encountered)
 *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
 *
 * Context:
 *	Kernel context.
 */
static int
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qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
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{
	int		rval;
	unsigned long    flags = 0;
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	device_reg_t *reg;
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	uint8_t		abort_active;
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	uint8_t		io_lock_on;
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	uint16_t	command = 0;
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	uint16_t	*iptr;
	uint16_t __iomem *optr;
	uint32_t	cnt;
	uint32_t	mboxes;
	unsigned long	wait_time;
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	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
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	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
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	if (ha->pdev->error_state > pci_channel_io_frozen) {
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		ql_log(ql_log_warn, vha, 0x1001,
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		    "error_state is greater than pci_channel_io_frozen, "
		    "exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
57
	}
58

59
	if (vha->device_flags & DFLG_DEV_FAILED) {
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		ql_log(ql_log_warn, vha, 0x1002,
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		    "Device in failed state, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	reg = ha->iobase;
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	io_lock_on = base_vha->flags.init_done;
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	rval = QLA_SUCCESS;
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	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
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	if (ha->flags.pci_channel_io_perm_failure) {
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		ql_log(ql_log_warn, vha, 0x1003,
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		    "Perm failure on EEH timeout MBX, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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		/* Setting Link-Down error */
		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
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		ql_log(ql_log_warn, vha, 0x1004,
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		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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		return QLA_FUNCTION_TIMEOUT;
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	}

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	/*
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	 * Wait for active mailbox commands to finish by waiting at most tov
	 * seconds. This is to serialize actual issuing of mailbox cmds during
	 * non ISP abort time.
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	 */
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	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
		/* Timeout occurred. Return error. */
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		ql_log(ql_log_warn, vha, 0x1005,
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		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
		    mcp->mb[0]);
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		return QLA_FUNCTION_TIMEOUT;
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	}

	ha->flags.mbox_busy = 1;
	/* Save mailbox command for debug */
	ha->mcp = mcp;

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	ql_dbg(ql_dbg_mbx, vha, 0x1006,
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	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
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	spin_lock_irqsave(&ha->hardware_lock, flags);

	/* Load mailbox registers. */
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	if (IS_P3P_TYPE(ha))
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		optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
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	else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
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		optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
	else
		optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
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	iptr = mcp->mb;
	command = mcp->mb[0];
	mboxes = mcp->out_mb;

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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
	    "Mailbox registers (OUT):\n");
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	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
		if (IS_QLA2200(ha) && cnt == 8)
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			optr =
			    (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
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		if (mboxes & BIT_0) {
			ql_dbg(ql_dbg_mbx, vha, 0x1112,
			    "mbox[%d]<-0x%04x\n", cnt, *iptr);
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			WRT_REG_WORD(optr, *iptr);
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		}
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		mboxes >>= 1;
		optr++;
		iptr++;
	}

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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
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	    "I/O Address = %p.\n", optr);
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	/* Issue set host interrupt command to send cmd out. */
	ha->flags.mbox_int = 0;
	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Unlock mbx registers and wait for interrupt */
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	ql_dbg(ql_dbg_mbx, vha, 0x100f,
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	    "Going to unlock irq & waiting for interrupts. "
	    "jiffies=%lx.\n", jiffies);
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	/* Wait for mbx cmd completion until timeout */

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	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
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		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha)) {
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			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1010,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

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		if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
		    mcp->tov * HZ)) {
			ql_dbg(ql_dbg_mbx, vha, 0x117a,
			    "cmd=%x Timeout.\n", command);
			spin_lock_irqsave(&ha->hardware_lock, flags);
			clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
			spin_unlock_irqrestore(&ha->hardware_lock, flags);
		}
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	} else {
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		ql_dbg(ql_dbg_mbx, vha, 0x1011,
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		    "Cmd=%x Polling Mode.\n", command);
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		if (IS_P3P_TYPE(ha)) {
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			if (RD_REG_DWORD(&reg->isp82.hint) &
				HINT_MBX_INT_PENDING) {
				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				ha->flags.mbox_busy = 0;
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				ql_dbg(ql_dbg_mbx, vha, 0x1012,
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				    "Pending mailbox timeout, exiting.\n");
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
		} else if (IS_FWI2_CAPABLE(ha))
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			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
		else
			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
		while (!ha->flags.mbox_int) {
			if (time_after(jiffies, wait_time))
				break;

			/* Check for pending interrupts. */
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			qla2x00_poll(ha->rsp_q_map[0]);
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			if (!ha->flags.mbox_int &&
			    !(IS_QLA2200(ha) &&
			    command == MBC_LOAD_RISC_RAM_EXTENDED))
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				msleep(10);
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		} /* while */
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		ql_dbg(ql_dbg_mbx, vha, 0x1013,
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		    "Waited %d sec.\n",
		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
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	}

	/* Check whether we timed out */
	if (ha->flags.mbox_int) {
		uint16_t *iptr2;

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		ql_dbg(ql_dbg_mbx, vha, 0x1014,
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		    "Cmd=%x completed.\n", command);
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		/* Got interrupt. Clear the flag. */
		ha->flags.mbox_int = 0;
		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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			ha->flags.mbox_busy = 0;
			/* Setting Link-Down error */
			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
			ha->mcp = NULL;
			rval = QLA_FUNCTION_FAILED;
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			ql_log(ql_log_warn, vha, 0x1015,
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			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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			goto premature_exit;
		}

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		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
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			rval = QLA_FUNCTION_FAILED;

		/* Load return mailbox registers. */
		iptr2 = mcp->mb;
		iptr = (uint16_t *)&ha->mailbox_out[0];
		mboxes = mcp->in_mb;
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		ql_dbg(ql_dbg_mbx, vha, 0x1113,
		    "Mailbox registers (IN):\n");
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		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
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			if (mboxes & BIT_0) {
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				*iptr2 = *iptr;
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				ql_dbg(ql_dbg_mbx, vha, 0x1114,
				    "mbox[%d]->0x%04x\n", cnt, *iptr2);
			}
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			mboxes >>= 1;
			iptr2++;
			iptr++;
		}
	} else {

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		uint16_t mb0;
		uint32_t ictrl;

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		if (IS_FWI2_CAPABLE(ha)) {
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			mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
			ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
		} else {
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			mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
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			ictrl = RD_REG_WORD(&reg->isp.ictrl);
		}
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		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
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		    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
		    "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
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		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
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		/*
		 * Attempt to capture a firmware dump for further analysis
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		 * of the current firmware state.  We do not need to do this
		 * if we are intentionally generating a dump.
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		 */
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		if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
			ha->isp_ops->fw_dump(vha, 0);
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		rval = QLA_FUNCTION_TIMEOUT;
	}

	ha->flags.mbox_busy = 0;

	/* Clean up */
	ha->mcp = NULL;

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	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
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		ql_dbg(ql_dbg_mbx, vha, 0x101a,
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		    "Checking for additional resp interrupt.\n");
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		/* polling mode for non isp_abort commands. */
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		qla2x00_poll(ha->rsp_q_map[0]);
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	}

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	if (rval == QLA_FUNCTION_TIMEOUT &&
	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
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		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
		    ha->flags.eeh_busy) {
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			/* not in dpc. schedule it for dpc to take over. */
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			ql_dbg(ql_dbg_mbx, vha, 0x101b,
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			    "Timeout, schedule isp_abort_needed.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112a,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101c,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
				    "abort.\n", command, mcp->mb[0],
				    ha->flags.eeh_busy);
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				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
				qla2xxx_wake_dpc(vha);
			}
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		} else if (!abort_active) {
			/* call abort directly since we are in the DPC thread */
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			ql_dbg(ql_dbg_mbx, vha, 0x101d,
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			    "Timeout, calling abort_isp.\n");
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			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
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				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112b,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
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				ql_log(ql_log_info, base_vha, 0x101e,
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				    "Mailbox cmd timeout occurred, cmd=0x%x, "
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				    "mb[0]=0x%x. Scheduling ISP abort ",
				    command, mcp->mb[0]);
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				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
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				/* Allow next mbx cmd to come in. */
				complete(&ha->mbx_cmd_comp);
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				if (ha->isp_ops->abort_isp(vha)) {
					/* Failed. retry later. */
					set_bit(ISP_ABORT_NEEDED,
					    &vha->dpc_flags);
				}
				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
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				ql_dbg(ql_dbg_mbx, vha, 0x101f,
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				    "Finished abort_isp.\n");
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				goto mbx_done;
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			}
		}
	}

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premature_exit:
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	/* Allow next mbx cmd to come in. */
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	complete(&ha->mbx_cmd_comp);
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mbx_done:
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	if (rval) {
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		ql_log(ql_log_warn, base_vha, 0x1020,
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		    "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
		    mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
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	} else {
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		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
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	}

	return rval;
}

int
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qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
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    uint32_t risc_code_size)
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{
	int rval;
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	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

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	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
	    "Entered %s.\n", __func__);
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	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
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		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(risc_addr);
		mcp->out_mb = MBX_8|MBX_0;
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	} else {
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		mcp->mb[0] = MBC_LOAD_RISC_RAM;
		mcp->out_mb = MBX_0;
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	}
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
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	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
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	if (IS_FWI2_CAPABLE(ha)) {
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		mcp->mb[4] = MSW(risc_code_size);
		mcp->mb[5] = LSW(risc_code_size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(risc_code_size);
		mcp->out_mb |= MBX_4;
	}

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	mcp->in_mb = MBX_0;
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	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
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	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
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		ql_dbg(ql_dbg_mbx, vha, 0x1023,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
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	} else {
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

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#define	EXTENDED_BB_CREDITS	BIT_0
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/*
 * qla2x00_execute_fw
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 *     Start adapter firmware.
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 *
 * Input:
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 *     ha = adapter block pointer.
 *     TARGET_QUEUE_LOCK must be released.
 *     ADAPTER_STATE_LOCK must be released.
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 *
 * Returns:
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 *     qla2x00 local function return status code.
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 *
 * Context:
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 *     Kernel context.
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 */
int
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qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
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{
	int rval;
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	struct qla_hw_data *ha = vha->hw;
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	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

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	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
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	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
467
	if (IS_FWI2_CAPABLE(ha)) {
468 469 470
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->mb[3] = 0;
471 472
		if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
		    IS_QLA27XX(ha)) {
473 474 475 476 477
			struct nvram_81xx *nv = ha->nvram;
			mcp->mb[4] = (nv->enhanced_features &
			    EXTENDED_BB_CREDITS);
		} else
			mcp->mb[4] = 0;
478
		mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
479 480 481 482 483 484 485 486
		mcp->in_mb |= MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
			mcp->mb[2] = 0;
			mcp->out_mb |= MBX_2;
		}
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	}

489
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
491
	rval = qla2x00_mailbox_command(vha, mcp);
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492

493
	if (rval != QLA_SUCCESS) {
494 495
		ql_dbg(ql_dbg_mbx, vha, 0x1026,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
496
	} else {
497
		if (IS_FWI2_CAPABLE(ha)) {
498
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
499
			    "Done exchanges=%x.\n", mcp->mb[1]);
500
		} else {
501 502
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
			    "Done %s.\n", __func__);
503 504
		}
	}
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	return rval;
}

/*
 * qla2x00_get_fw_version
 *	Get firmware version.
 *
 * Input:
 *	ha:		adapter state pointer.
 *	major:		pointer for major number.
 *	minor:		pointer for minor number.
 *	subminor:	pointer for subminor number.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
525
int
526
qla2x00_get_fw_version(scsi_qla_host_t *vha)
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
531
	struct qla_hw_data *ha = vha->hw;
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533 534
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
539
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
540
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
541
	if (IS_FWI2_CAPABLE(ha))
542
		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
543 544
	if (IS_QLA27XX(ha))
		mcp->in_mb |= MBX_21|MBX_20|MBX_19|MBX_18;
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	mcp->flags = 0;
546
	mcp->tov = MBX_TOV_SECONDS;
547
	rval = qla2x00_mailbox_command(vha, mcp);
548 549
	if (rval != QLA_SUCCESS)
		goto failed;
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	/* Return mailbox data. */
552 553 554 555
	ha->fw_major_version = mcp->mb[1];
	ha->fw_minor_version = mcp->mb[2];
	ha->fw_subminor_version = mcp->mb[3];
	ha->fw_attributes = mcp->mb[6];
556
	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
557
		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
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	else
559
		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
560
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
561 562 563 564 565 566 567 568
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
		ha->phy_version[0] = mcp->mb[8] & 0xff;
		ha->phy_version[1] = mcp->mb[9] >> 8;
		ha->phy_version[2] = mcp->mb[9] & 0xff;
	}
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	if (IS_FWI2_CAPABLE(ha)) {
		ha->fw_attributes_h = mcp->mb[15];
		ha->fw_attributes_ext[0] = mcp->mb[16];
		ha->fw_attributes_ext[1] = mcp->mb[17];
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[15], mcp->mb[6]);
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[17], mcp->mb[16]);
579
	}
580 581 582 583
	if (IS_QLA27XX(ha)) {
		ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
		ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
	}
584

585
failed:
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
588
		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
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	} else {
		/*EMPTY*/
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		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
		    "Done %s.\n", __func__);
L
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	}
594
	return rval;
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}

/*
 * qla2x00_get_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
612
qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

618 619
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
624
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
626
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
630
		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
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631
	} else {
632
		fwopts[0] = mcp->mb[0];
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		fwopts[1] = mcp->mb[1];
		fwopts[2] = mcp->mb[2];
		fwopts[3] = mcp->mb[3];

637 638
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
		    "Done %s.\n", __func__);
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	}

	return rval;
}


/*
 * qla2x00_set_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
660
qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

666 667
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
	mcp->mb[1] = fwopts[1];
	mcp->mb[2] = fwopts[2];
	mcp->mb[3] = fwopts[3];
673
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
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	mcp->in_mb = MBX_0;
675
	if (IS_FWI2_CAPABLE(vha->hw)) {
676 677 678 679 680 681 682
		mcp->in_mb |= MBX_1;
	} else {
		mcp->mb[10] = fwopts[10];
		mcp->mb[11] = fwopts[11];
		mcp->mb[12] = 0;	/* Undocumented, but used */
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
	}
683
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
685
	rval = qla2x00_mailbox_command(vha, mcp);
L
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687 688
	fwopts[0] = mcp->mb[0];

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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
691 692
		ql_dbg(ql_dbg_mbx, vha, 0x1030,
		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
L
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	} else {
		/*EMPTY*/
695 696
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_mbx_reg_test
 *	Mailbox register wrap test.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
718
qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

724 725
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
	mcp->mb[1] = 0xAAAA;
	mcp->mb[2] = 0x5555;
	mcp->mb[3] = 0xAA55;
	mcp->mb[4] = 0x55AA;
	mcp->mb[5] = 0xA5A5;
	mcp->mb[6] = 0x5A5A;
	mcp->mb[7] = 0x2525;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
737
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
739
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval == QLA_SUCCESS) {
		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
			rval = QLA_FUNCTION_FAILED;
		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
		    mcp->mb[7] != 0x2525)
			rval = QLA_FUNCTION_FAILED;
	}

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
752
		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
L
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	} else {
		/*EMPTY*/
755 756
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_verify_checksum
 *	Verify firmware checksum.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
778
qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

784 785
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
788 789
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
790
	if (IS_FWI2_CAPABLE(vha->hw)) {
791 792 793 794 795 796 797 798 799 800
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->out_mb |= MBX_2|MBX_1;
		mcp->in_mb |= MBX_2|MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		mcp->in_mb |= MBX_1;
	}

801
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
803
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
806 807 808
		ql_dbg(ql_dbg_mbx, vha, 0x1036,
		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
L
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	} else {
810 811
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_issue_iocb
 *	Issue IOCB using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	buffer = buffer pointer.
 *	phys_addr = physical address of buffer.
 *	size = size of buffer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
835
int
836
qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
837
    dma_addr_t phys_addr, size_t size, uint32_t tov)
L
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

843 844
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
	    "Entered %s.\n", __func__);
845

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	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(phys_addr);
	mcp->mb[3] = LSW(phys_addr);
	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_0;
854
	mcp->tov = tov;
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855
	mcp->flags = 0;
856
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
860
		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
L
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	} else {
862 863 864 865
		sts_entry_t *sts_entry = (sts_entry_t *) buffer;

		/* Mask reserved bits. */
		sts_entry->entry_status &=
866
		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
867 868
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

874
int
875
qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
876 877
    size_t size)
{
878
	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
879 880 881
	    MBX_TOV_SECONDS);
}

L
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/*
 * qla2x00_abort_command
 *	Abort command aborts a specified IOCB.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sp = SB structure pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
897
qla2x00_abort_command(srb_t *sp)
L
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{
	unsigned long   flags = 0;
	int		rval;
901
	uint32_t	handle = 0;
L
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	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
904 905
	fc_port_t	*fcport = sp->fcport;
	scsi_qla_host_t *vha = fcport->vha;
906
	struct qla_hw_data *ha = vha->hw;
907
	struct req_que *req = vha->req;
908
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
L
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910 911
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
	    "Entered %s.\n", __func__);
L
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913
	spin_lock_irqsave(&ha->hardware_lock, flags);
914
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
915
		if (req->outstanding_cmds[handle] == sp)
L
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			break;
	}
918
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
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919

920
	if (handle == req->num_outstanding_cmds) {
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		/* command not found */
		return QLA_FUNCTION_FAILED;
	}

	mcp->mb[0] = MBC_ABORT_COMMAND;
	if (HAS_EXTENDED_IDS(ha))
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = (uint16_t)handle;
	mcp->mb[3] = (uint16_t)(handle >> 16);
932
	mcp->mb[6] = (uint16_t)cmd->device->lun;
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	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
935
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
937
	rval = qla2x00_mailbox_command(vha, mcp);
L
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	if (rval != QLA_SUCCESS) {
940
		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
L
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	} else {
942 943
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

int
950
qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
L
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{
952
	int rval, rval2;
L
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	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
955
	scsi_qla_host_t *vha;
956 957
	struct req_que *req;
	struct rsp_que *rsp;
L
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959
	l = l;
960
	vha = fcport->vha;
961

962 963
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
	    "Entered %s.\n", __func__);
964

965 966
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
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	mcp->mb[0] = MBC_ABORT_TARGET;
968
	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
969
	if (HAS_EXTENDED_IDS(vha->hw)) {
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		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = fcport->loop_id << 8;
	}
976 977
	mcp->mb[2] = vha->hw->loop_reset_delay;
	mcp->mb[9] = vha->vp_idx;
L
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	mcp->in_mb = MBX_0;
980
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
982
	rval = qla2x00_mailbox_command(vha, mcp);
983
	if (rval != QLA_SUCCESS) {
984 985
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
		    "Failed=%x.\n", rval);
986 987 988
	}

	/* Issue marker IOCB. */
989 990
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
							MK_SYNC_ID);
991
	if (rval2 != QLA_SUCCESS) {
992 993
		ql_dbg(ql_dbg_mbx, vha, 0x1040,
		    "Failed to issue marker IOCB (%x).\n", rval2);
994
	} else {
995 996
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
		    "Done %s.\n", __func__);
997 998 999 1000 1001 1002
	}

	return rval;
}

int
1003
qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
1004 1005 1006 1007
{
	int rval, rval2;
	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
1008
	scsi_qla_host_t *vha;
1009 1010
	struct req_que *req;
	struct rsp_que *rsp;
1011

1012
	vha = fcport->vha;
1013

1014 1015
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
	    "Entered %s.\n", __func__);
1016

1017 1018
	req = vha->hw->req_q_map[0];
	rsp = req->rsp;
1019 1020
	mcp->mb[0] = MBC_LUN_RESET;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1021
	if (HAS_EXTENDED_IDS(vha->hw))
1022 1023 1024 1025 1026
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = l;
	mcp->mb[3] = 0;
1027
	mcp->mb[9] = vha->vp_idx;
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1029
	mcp->in_mb = MBX_0;
1030
	mcp->tov = MBX_TOV_SECONDS;
1031
	mcp->flags = 0;
1032
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
1034
		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1035 1036 1037
	}

	/* Issue marker IOCB. */
1038 1039
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
								MK_SYNC_ID_LUN);
1040
	if (rval2 != QLA_SUCCESS) {
1041 1042
		ql_dbg(ql_dbg_mbx, vha, 0x1044,
		    "Failed to issue marker IOCB (%x).\n", rval2);
L
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	} else {
1044 1045
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_get_adapter_id
 *	Get adapter ID and topology.
 *
 * Input:
 *	ha = adapter block pointer.
 *	id = pointer for loop ID.
 *	al_pa = pointer for AL_PA.
 *	area = pointer for area.
 *	domain = pointer for domain.
 *	top = pointer for topology.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1072
qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1073
    uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1079 1080
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1083
	mcp->mb[9] = vha->vp_idx;
1084
	mcp->out_mb = MBX_9|MBX_0;
1085
	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1086
	if (IS_CNA_CAPABLE(vha->hw))
1087
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1088
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1090
	rval = qla2x00_mailbox_command(vha, mcp);
1091 1092
	if (mcp->mb[0] == MBS_COMMAND_ERROR)
		rval = QLA_COMMAND_ERROR;
1093 1094
	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
		rval = QLA_INVALID_COMMAND;
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	/* Return data. */
	*id = mcp->mb[1];
	*al_pa = LSB(mcp->mb[2]);
	*area = MSB(mcp->mb[2]);
	*domain	= LSB(mcp->mb[3]);
	*top = mcp->mb[6];
1102
	*sw_cap = mcp->mb[7];
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1103 1104 1105

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1106
		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
L
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	} else {
1108 1109
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
		    "Done %s.\n", __func__);
1110

1111
		if (IS_CNA_CAPABLE(vha->hw)) {
1112 1113 1114 1115 1116 1117 1118 1119 1120
			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
			vha->fcoe_fcf_idx = mcp->mb[10];
			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
		}
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	}

	return rval;
}

/*
 * qla2x00_get_retry_cnt
 *	Get current firmware login retry count and delay.
 *
 * Input:
 *	ha = adapter block pointer.
 *	retry_cnt = pointer to login retry count.
 *	tov = pointer to login timeout value.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1142
qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
L
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    uint16_t *r_a_tov)
{
	int rval;
	uint16_t ratov;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1150 1151
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_GET_RETRY_COUNT;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1156
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1158
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1159 1160 1161

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1162 1163
		ql_dbg(ql_dbg_mbx, vha, 0x104a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
L
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1164 1165 1166 1167 1168 1169 1170 1171 1172 1173
	} else {
		/* Convert returned data and check our values. */
		*r_a_tov = mcp->mb[3] / 2;
		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
			/* Update to the larger values */
			*retry_cnt = (uint8_t)mcp->mb[1];
			*tov = ratov;
		}

1174
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1175
		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
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	}

	return rval;
}

/*
 * qla2x00_init_firmware
 *	Initialize adapter firmware.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = Initialization control block pointer.
 *	size = size of initialization control block.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1199
qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
L
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1200 1201 1202 1203
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1204
	struct qla_hw_data *ha = vha->hw;
L
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1206 1207
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
	    "Entered %s.\n", __func__);
L
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1208

1209
	if (IS_P3P_TYPE(ha) && ql2xdbwr)
1210 1211 1212
		qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));

1213
	if (ha->flags.npiv_supported)
1214 1215 1216 1217
		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
	else
		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;

1218
	mcp->mb[1] = 0;
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	mcp->mb[2] = MSW(ha->init_cb_dma);
	mcp->mb[3] = LSW(ha->init_cb_dma);
	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1223
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1224
	if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1225 1226 1227 1228 1229 1230 1231 1232
		mcp->mb[1] = BIT_0;
		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[14] = sizeof(*ha->ex_init_cb);
		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
	}
1233 1234
	/* 1 and 2 should normally be captured. */
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
1235
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1236 1237
		/* mb3 is additional info about the installed SFP. */
		mcp->in_mb  |= MBX_3;
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	mcp->buf_size = size;
	mcp->flags = MBX_DMA_OUT;
1240
	mcp->tov = MBX_TOV_SECONDS;
1241
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1242 1243 1244

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1245
		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1246 1247
		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
L
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1248 1249
	} else {
		/*EMPTY*/
1250 1251
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
		    "Done %s.\n", __func__);
L
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1252 1253 1254 1255 1256
	}

	return rval;
}

1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346
/*
 * qla2x00_get_node_name_list
 *      Issue get node name list mailbox command, kmalloc()
 *      and return the resulting list. Caller must kfree() it!
 *
 * Input:
 *      ha = adapter state pointer.
 *      out_data = resulting list
 *      out_len = length of the resulting list
 *
 * Returns:
 *      qla2x00 local function return status code.
 *
 * Context:
 *      Kernel context.
 */
int
qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
{
	struct qla_hw_data *ha = vha->hw;
	struct qla_port_24xx_data *list = NULL;
	void *pmap;
	mbx_cmd_t mc;
	dma_addr_t pmap_dma;
	ulong dma_size;
	int rval, left;

	left = 1;
	while (left > 0) {
		dma_size = left * sizeof(*list);
		pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
					 &pmap_dma, GFP_KERNEL);
		if (!pmap) {
			ql_log(ql_log_warn, vha, 0x113f,
			    "%s(%ld): DMA Alloc failed of %ld\n",
			    __func__, vha->host_no, dma_size);
			rval = QLA_MEMORY_ALLOC_FAILED;
			goto out;
		}

		mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
		mc.mb[1] = BIT_1 | BIT_3;
		mc.mb[2] = MSW(pmap_dma);
		mc.mb[3] = LSW(pmap_dma);
		mc.mb[6] = MSW(MSD(pmap_dma));
		mc.mb[7] = LSW(MSD(pmap_dma));
		mc.mb[8] = dma_size;
		mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
		mc.in_mb = MBX_0|MBX_1;
		mc.tov = 30;
		mc.flags = MBX_DMA_IN;

		rval = qla2x00_mailbox_command(vha, &mc);
		if (rval != QLA_SUCCESS) {
			if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
			    (mc.mb[1] == 0xA)) {
				left += le16_to_cpu(mc.mb[2]) /
				    sizeof(struct qla_port_24xx_data);
				goto restart;
			}
			goto out_free;
		}

		left = 0;

		list = kzalloc(dma_size, GFP_KERNEL);
		if (!list) {
			ql_log(ql_log_warn, vha, 0x1140,
			    "%s(%ld): failed to allocate node names list "
			    "structure.\n", __func__, vha->host_no);
			rval = QLA_MEMORY_ALLOC_FAILED;
			goto out_free;
		}

		memcpy(list, pmap, dma_size);
restart:
		dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
	}

	*out_data = list;
	*out_len = dma_size;

out:
	return rval;

out_free:
	dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
	return rval;
}

L
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1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363
/*
 * qla2x00_get_port_database
 *	Issue normal/enhanced get port database mailbox command
 *	and copy device name as necessary.
 *
 * Input:
 *	ha = adapter state pointer.
 *	dev = structure pointer.
 *	opt = enhanced cmd option byte.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1364
qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	port_database_t *pd;
1370
	struct port_database_24xx *pd24;
L
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1371
	dma_addr_t pd_dma;
1372
	struct qla_hw_data *ha = vha->hw;
L
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1373

1374 1375
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
	    "Entered %s.\n", __func__);
L
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1377 1378
	pd24 = NULL;
	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
L
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1379
	if (pd  == NULL) {
1380 1381
		ql_log(ql_log_warn, vha, 0x1050,
		    "Failed to allocate port database structure.\n");
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		return QLA_MEMORY_ALLOC_FAILED;
	}
1384
	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
L
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1386
	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1387
	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
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		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
	mcp->mb[2] = MSW(pd_dma);
	mcp->mb[3] = LSW(pd_dma);
	mcp->mb[6] = MSW(MSD(pd_dma));
	mcp->mb[7] = LSW(MSD(pd_dma));
1393
	mcp->mb[9] = vha->vp_idx;
1394
	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
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	mcp->in_mb = MBX_0;
1396
	if (IS_FWI2_CAPABLE(ha)) {
1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = fcport->loop_id << 8 | opt;
		mcp->out_mb |= MBX_1;
	}
1409 1410
	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
L
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1411 1412
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1413
	rval = qla2x00_mailbox_command(vha, mcp);
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1414 1415 1416
	if (rval != QLA_SUCCESS)
		goto gpd_error_out;

1417
	if (IS_FWI2_CAPABLE(ha)) {
1418
		uint64_t zero = 0;
1419 1420 1421 1422 1423
		pd24 = (struct port_database_24xx *) pd;

		/* Check for logged in state. */
		if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
		    pd24->last_login_state != PDS_PRLI_COMPLETE) {
1424 1425 1426 1427
			ql_dbg(ql_dbg_mbx, vha, 0x1051,
			    "Unable to verify login-state (%x/%x) for "
			    "loop_id %x.\n", pd24->current_login_state,
			    pd24->last_login_state, fcport->loop_id);
1428 1429 1430
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
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1431

1432 1433 1434 1435 1436 1437 1438 1439
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd24->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd24->port_id[0];
		fcport->d_id.b.area = pd24->port_id[1];
		fcport->d_id.b.al_pa = pd24->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1455 1456 1457 1458 1459 1460 1461

		/* Passback COS information. */
		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
				FC_COS_CLASS2 : FC_COS_CLASS3;

		if (pd24->prli_svc_param_word_3[0] & BIT_7)
			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1462
	} else {
1463 1464
		uint64_t zero = 0;

1465 1466 1467
		/* Check for logged in state. */
		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1468 1469 1470 1471 1472
			ql_dbg(ql_dbg_mbx, vha, 0x100a,
			    "Unable to verify login-state (%x/%x) - "
			    "portid=%02x%02x%02x.\n", pd->master_state,
			    pd->slave_state, fcport->d_id.b.domain,
			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1473 1474 1475
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
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1476

1477 1478 1479 1480 1481 1482 1483 1484
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd->port_id[0];
		fcport->d_id.b.area = pd->port_id[3];
		fcport->d_id.b.al_pa = pd->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
1500 1501 1502 1503

		/* Passback COS information. */
		fcport->supported_classes = (pd->options & BIT_4) ?
		    FC_COS_CLASS2: FC_COS_CLASS3;
1504
	}
L
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gpd_error_out:
	dma_pool_free(ha->s_dma_pool, pd, pd_dma);

	if (rval != QLA_SUCCESS) {
1510 1511 1512
		ql_dbg(ql_dbg_mbx, vha, 0x1052,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
		    mcp->mb[0], mcp->mb[1]);
L
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1513
	} else {
1514 1515
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
		    "Done %s.\n", __func__);
L
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1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537
	}

	return rval;
}

/*
 * qla2x00_get_firmware_state
 *	Get adapter firmware state.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = pointer for firmware state.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1538
qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
L
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1539 1540 1541 1542 1543
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1544 1545
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
	    "Entered %s.\n", __func__);
L
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1546 1547 1548

	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
	mcp->out_mb = MBX_0;
1549 1550 1551 1552
	if (IS_FWI2_CAPABLE(vha->hw))
		mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	else
		mcp->in_mb = MBX_1|MBX_0;
1553
	mcp->tov = MBX_TOV_SECONDS;
L
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1554
	mcp->flags = 0;
1555
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1556

1557 1558
	/* Return firmware states. */
	states[0] = mcp->mb[1];
1559 1560 1561 1562 1563 1564
	if (IS_FWI2_CAPABLE(vha->hw)) {
		states[1] = mcp->mb[2];
		states[2] = mcp->mb[3];
		states[3] = mcp->mb[4];
		states[4] = mcp->mb[5];
	}
L
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1565 1566 1567

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1568
		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
L
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1569 1570
	} else {
		/*EMPTY*/
1571 1572
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
		    "Done %s.\n", __func__);
L
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1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596
	}

	return rval;
}

/*
 * qla2x00_get_port_name
 *	Issue get port name mailbox command.
 *	Returned name is in big endian format.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = loop ID of device.
 *	name = pointer for name.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1597
qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
L
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1598 1599 1600 1601 1602 1603
    uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1604 1605
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
	    "Entered %s.\n", __func__);
L
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1606 1607

	mcp->mb[0] = MBC_GET_PORT_NAME;
1608
	mcp->mb[9] = vha->vp_idx;
1609
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
1610
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
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1611 1612 1613 1614 1615 1616 1617 1618
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8 | opt;
	}

	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1619
	mcp->tov = MBX_TOV_SECONDS;
L
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1620
	mcp->flags = 0;
1621
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1622 1623 1624

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1625
		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
L
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1626 1627 1628
	} else {
		if (name != NULL) {
			/* This function returns name in big endian. */
1629 1630 1631 1632 1633 1634 1635 1636
			name[0] = MSB(mcp->mb[2]);
			name[1] = LSB(mcp->mb[2]);
			name[2] = MSB(mcp->mb[3]);
			name[3] = LSB(mcp->mb[3]);
			name[4] = MSB(mcp->mb[6]);
			name[5] = LSB(mcp->mb[6]);
			name[6] = MSB(mcp->mb[7]);
			name[7] = LSB(mcp->mb[7]);
L
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1637 1638
		}

1639 1640
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
		    "Done %s.\n", __func__);
L
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1641 1642 1643 1644 1645
	}

	return rval;
}

1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674
/*
 * qla24xx_link_initialization
 *	Issue link initialization mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_link_initialize(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
	    "Entered %s.\n", __func__);

	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_LINK_INITIALIZATION;
1675 1676 1677 1678 1679
	mcp->mb[1] = BIT_4;
	if (vha->hw->operating_mode == LOOP)
		mcp->mb[1] |= BIT_6;
	else
		mcp->mb[1] |= BIT_5;
1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697
	mcp->mb[2] = 0;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
		    "Done %s.\n", __func__);
	}

	return rval;
}

L
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1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713
/*
 * qla2x00_lip_reset
 *	Issue LIP reset mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1714
qla2x00_lip_reset(scsi_qla_host_t *vha)
L
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1715 1716 1717 1718 1719
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1720 1721
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1722

1723
	if (IS_CNA_CAPABLE(vha->hw)) {
1724 1725 1726 1727 1728 1729
		/* Logout across all FCFs. */
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
		mcp->mb[1] = BIT_1;
		mcp->mb[2] = 0;
		mcp->out_mb = MBX_2|MBX_1|MBX_0;
	} else if (IS_FWI2_CAPABLE(vha->hw)) {
1730
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1731 1732
		mcp->mb[1] = BIT_6;
		mcp->mb[2] = 0;
1733
		mcp->mb[3] = vha->hw->loop_reset_delay;
1734
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
L
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1735
	} else {
1736 1737
		mcp->mb[0] = MBC_LIP_RESET;
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1738
		if (HAS_EXTENDED_IDS(vha->hw)) {
1739 1740 1741 1742 1743 1744
			mcp->mb[1] = 0x00ff;
			mcp->mb[10] = 0;
			mcp->out_mb |= MBX_10;
		} else {
			mcp->mb[1] = 0xff00;
		}
1745
		mcp->mb[2] = vha->hw->loop_reset_delay;
1746
		mcp->mb[3] = 0;
L
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1747 1748
	}
	mcp->in_mb = MBX_0;
1749
	mcp->tov = MBX_TOV_SECONDS;
L
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1750
	mcp->flags = 0;
1751
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1752 1753 1754

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1755
		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
1756 1757
	} else {
		/*EMPTY*/
1758 1759
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783
	}

	return rval;
}

/*
 * qla2x00_send_sns
 *	Send SNS command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sns = pointer for command.
 *	cmd_size = command size.
 *	buf_size = response/command size.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1784
qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
L
Linus Torvalds 已提交
1785 1786 1787 1788 1789 1790
    uint16_t cmd_size, size_t buf_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1791 1792
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1793

1794
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1795 1796
	    "Retry cnt=%d ratov=%d total tov=%d.\n",
	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
L
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1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807

	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
	mcp->mb[1] = cmd_size;
	mcp->mb[2] = MSW(sns_phys_address);
	mcp->mb[3] = LSW(sns_phys_address);
	mcp->mb[6] = MSW(MSD(sns_phys_address));
	mcp->mb[7] = LSW(MSD(sns_phys_address));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->buf_size = buf_size;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1808 1809
	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1810 1811 1812

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1813 1814 1815
		ql_dbg(ql_dbg_mbx, vha, 0x105f,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
L
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1816 1817
	} else {
		/*EMPTY*/
1818 1819
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
		    "Done %s.\n", __func__);
L
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1820 1821 1822 1823 1824
	}

	return rval;
}

1825
int
1826
qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1827 1828 1829 1830 1831 1832 1833
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int		rval;

	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
	uint32_t	iop[2];
1834
	struct qla_hw_data *ha = vha->hw;
1835 1836
	struct req_que *req;
	struct rsp_que *rsp;
1837

1838 1839
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
	    "Entered %s.\n", __func__);
1840

1841
	if (ha->flags.cpu_affinity_enabled)
1842 1843 1844
		req = ha->req_q_map[0];
	else
		req = vha->req;
1845 1846
	rsp = req->rsp;

1847 1848
	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
1849 1850
		ql_log(ql_log_warn, vha, 0x1062,
		    "Failed to allocate login IOCB.\n");
1851 1852 1853 1854 1855 1856
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
1857
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
1858 1859 1860 1861
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
	if (opt & BIT_0)
		lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1862 1863
	if (opt & BIT_1)
		lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1864 1865 1866
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
1867
	lg->vp_index = vha->vp_idx;
1868 1869
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
1870
	if (rval != QLA_SUCCESS) {
1871 1872
		ql_dbg(ql_dbg_mbx, vha, 0x1063,
		    "Failed to issue login IOCB (%x).\n", rval);
1873
	} else if (lg->entry_status != 0) {
1874 1875 1876
		ql_dbg(ql_dbg_mbx, vha, 0x1064,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
1877 1878 1879 1880 1881
		rval = QLA_FUNCTION_FAILED;
	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
		iop[0] = le32_to_cpu(lg->io_parameter[0]);
		iop[1] = le32_to_cpu(lg->io_parameter[1]);

1882 1883 1884 1885
		ql_dbg(ql_dbg_mbx, vha, 0x1065,
		    "Failed to complete IOCB -- completion  status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
		    iop[0], iop[1]);
1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912

		switch (iop[0]) {
		case LSC_SCODE_PORTID_USED:
			mb[0] = MBS_PORT_ID_USED;
			mb[1] = LSW(iop[1]);
			break;
		case LSC_SCODE_NPORT_USED:
			mb[0] = MBS_LOOP_ID_USED;
			break;
		case LSC_SCODE_NOLINK:
		case LSC_SCODE_NOIOCB:
		case LSC_SCODE_NOXCB:
		case LSC_SCODE_CMD_FAILED:
		case LSC_SCODE_NOFABRIC:
		case LSC_SCODE_FW_NOT_READY:
		case LSC_SCODE_NOT_LOGGED_IN:
		case LSC_SCODE_NOPCB:
		case LSC_SCODE_ELS_REJECT:
		case LSC_SCODE_CMD_PARAM_ERR:
		case LSC_SCODE_NONPORT:
		case LSC_SCODE_LOGGED_IN:
		case LSC_SCODE_NOFLOGI_ACC:
		default:
			mb[0] = MBS_COMMAND_ERROR;
			break;
		}
	} else {
1913 1914
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
		    "Done %s.\n", __func__);
1915 1916 1917 1918 1919 1920 1921 1922 1923 1924

		iop[0] = le32_to_cpu(lg->io_parameter[0]);

		mb[0] = MBS_COMMAND_COMPLETE;
		mb[1] = 0;
		if (iop[0] & BIT_4) {
			if (iop[0] & BIT_8)
				mb[1] |= BIT_1;
		} else
			mb[1] = BIT_0;
1925 1926 1927 1928 1929 1930 1931

		/* Passback COS information. */
		mb[10] = 0;
		if (lg->io_parameter[7] || lg->io_parameter[8])
			mb[10] |= BIT_0;	/* Class 2. */
		if (lg->io_parameter[9] || lg->io_parameter[10])
			mb[10] |= BIT_1;	/* Class 3. */
1932 1933 1934 1935
		if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
			mb[10] |= BIT_7;	/* Confirmed Completion
						 * Allowed
						 */
1936 1937 1938 1939 1940 1941 1942
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964
/*
 * qla2x00_login_fabric
 *	Issue login fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	domain = device domain.
 *	area = device area.
 *	al_pa = device AL_PA.
 *	status = pointer for return status.
 *	opt = command options.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1965
qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
L
Linus Torvalds 已提交
1966 1967 1968 1969 1970
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1971
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1972

1973 1974
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990

	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = (loop_id << 8) | opt;
	}
	mcp->mb[2] = domain;
	mcp->mb[3] = area << 8 | al_pa;

	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
1991
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1992 1993 1994 1995 1996 1997 1998 1999

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[2] = mcp->mb[2];
		mb[6] = mcp->mb[6];
		mb[7] = mcp->mb[7];
2000 2001
		/* COS retrieved from Get-Port-Database mailbox command. */
		mb[10] = 0;
L
Linus Torvalds 已提交
2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016
	}

	if (rval != QLA_SUCCESS) {
		/* RLU tmp code: need to change main mailbox_command function to
		 * return ok even when the mailbox completion value is not
		 * SUCCESS. The caller needs to be responsible to interpret
		 * the return values of this mailbox command if we're not
		 * to change too much of the existing code.
		 */
		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
		    mcp->mb[0] == 0x4006)
			rval = QLA_SUCCESS;

		/*EMPTY*/
2017 2018 2019
		ql_dbg(ql_dbg_mbx, vha, 0x1068,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
L
Linus Torvalds 已提交
2020 2021
	} else {
		/*EMPTY*/
2022 2023
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2024 2025 2026 2027 2028 2029 2030 2031
	}

	return rval;
}

/*
 * qla2x00_login_local_device
 *           Issue login loop port mailbox command.
A
Andrew Vasquez 已提交
2032
 *
L
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2033 2034 2035 2036
 * Input:
 *           ha = adapter block pointer.
 *           loop_id = device loop ID.
 *           opt = command options.
A
Andrew Vasquez 已提交
2037
 *
L
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2038 2039
 * Returns:
 *            Return status code.
A
Andrew Vasquez 已提交
2040
 *
L
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2041 2042
 * Context:
 *            Kernel context.
A
Andrew Vasquez 已提交
2043
 *
L
Linus Torvalds 已提交
2044 2045
 */
int
2046
qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
L
Linus Torvalds 已提交
2047 2048 2049 2050 2051
    uint16_t *mb_ret, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2052
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2053

2054 2055
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
	    "Entered %s.\n", __func__);
2056

2057
	if (IS_FWI2_CAPABLE(ha))
2058
		return qla24xx_login_fabric(vha, fcport->loop_id,
2059 2060 2061
		    fcport->d_id.b.domain, fcport->d_id.b.area,
		    fcport->d_id.b.al_pa, mb_ret, opt);

L
Linus Torvalds 已提交
2062 2063
	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
	if (HAS_EXTENDED_IDS(ha))
2064
		mcp->mb[1] = fcport->loop_id;
L
Linus Torvalds 已提交
2065
	else
2066
		mcp->mb[1] = fcport->loop_id << 8;
L
Linus Torvalds 已提交
2067 2068 2069 2070 2071
	mcp->mb[2] = opt;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
 	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2072
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091

 	/* Return mailbox statuses. */
 	if (mb_ret != NULL) {
 		mb_ret[0] = mcp->mb[0];
 		mb_ret[1] = mcp->mb[1];
 		mb_ret[6] = mcp->mb[6];
 		mb_ret[7] = mcp->mb[7];
 	}

	if (rval != QLA_SUCCESS) {
 		/* AV tmp code: need to change main mailbox_command function to
 		 * return ok even when the mailbox completion value is not
 		 * SUCCESS. The caller needs to be responsible to interpret
 		 * the return values of this mailbox command if we're not
 		 * to change too much of the existing code.
 		 */
 		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
 			rval = QLA_SUCCESS;

2092 2093 2094
		ql_dbg(ql_dbg_mbx, vha, 0x106b,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
L
Linus Torvalds 已提交
2095 2096
	} else {
		/*EMPTY*/
2097 2098
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2099 2100 2101 2102 2103
	}

	return (rval);
}

2104
int
2105
qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2106 2107 2108 2109 2110
    uint8_t area, uint8_t al_pa)
{
	int		rval;
	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
2111
	struct qla_hw_data *ha = vha->hw;
2112 2113
	struct req_que *req;
	struct rsp_que *rsp;
2114

2115 2116
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
	    "Entered %s.\n", __func__);
2117 2118 2119

	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
	if (lg == NULL) {
2120 2121
		ql_log(ql_log_warn, vha, 0x106e,
		    "Failed to allocate logout IOCB.\n");
2122 2123 2124 2125
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(lg, 0, sizeof(struct logio_entry_24xx));

2126 2127 2128 2129 2130
	if (ql2xmaxqueues > 1)
		req = ha->req_q_map[0];
	else
		req = vha->req;
	rsp = req->rsp;
2131 2132
	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2133
	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2134 2135
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags =
2136 2137
	    __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
		LCF_FREE_NPORT);
2138 2139 2140
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2141
	lg->vp_index = vha->vp_idx;
2142 2143
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2144
	if (rval != QLA_SUCCESS) {
2145 2146
		ql_dbg(ql_dbg_mbx, vha, 0x106f,
		    "Failed to issue logout IOCB (%x).\n", rval);
2147
	} else if (lg->entry_status != 0) {
2148 2149 2150
		ql_dbg(ql_dbg_mbx, vha, 0x1070,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2151 2152
		rval = QLA_FUNCTION_FAILED;
	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2153 2154 2155
		ql_dbg(ql_dbg_mbx, vha, 0x1071,
		    "Failed to complete IOCB -- completion status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2156
		    le32_to_cpu(lg->io_parameter[0]),
2157
		    le32_to_cpu(lg->io_parameter[1]));
2158 2159
	} else {
		/*EMPTY*/
2160 2161
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
		    "Done %s.\n", __func__);
2162 2163 2164 2165 2166 2167 2168
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185
/*
 * qla2x00_fabric_logout
 *	Issue logout fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2186
qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2187
    uint8_t area, uint8_t al_pa)
L
Linus Torvalds 已提交
2188 2189 2190 2191 2192
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2193 2194
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2195 2196 2197

	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
	mcp->out_mb = MBX_1|MBX_0;
2198
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
Linus Torvalds 已提交
2199 2200 2201 2202 2203 2204 2205 2206
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8;
	}

	mcp->in_mb = MBX_1|MBX_0;
2207
	mcp->tov = MBX_TOV_SECONDS;
L
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2208
	mcp->flags = 0;
2209
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2210 2211 2212

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2213 2214
		ql_dbg(ql_dbg_mbx, vha, 0x1074,
		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
L
Linus Torvalds 已提交
2215 2216
	} else {
		/*EMPTY*/
2217 2218
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239
	}

	return rval;
}

/*
 * qla2x00_full_login_lip
 *	Issue full login LIP mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2240
qla2x00_full_login_lip(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2241 2242 2243 2244 2245
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2246 2247
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2248 2249

	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2250
	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2251
	mcp->mb[2] = 0;
L
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2252 2253 2254
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2255
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2256
	mcp->flags = 0;
2257
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2258 2259 2260

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2261
		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2262 2263
	} else {
		/*EMPTY*/
2264 2265
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283
	}

	return rval;
}

/*
 * qla2x00_get_id_list
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2284
qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
L
Linus Torvalds 已提交
2285 2286 2287 2288 2289 2290
    uint16_t *entries)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2291 2292
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2293 2294 2295 2296 2297

	if (id_list == NULL)
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_ID_LIST;
2298
	mcp->out_mb = MBX_0;
2299
	if (IS_FWI2_CAPABLE(vha->hw)) {
2300 2301 2302 2303
		mcp->mb[2] = MSW(id_list_dma);
		mcp->mb[3] = LSW(id_list_dma);
		mcp->mb[6] = MSW(MSD(id_list_dma));
		mcp->mb[7] = LSW(MSD(id_list_dma));
2304
		mcp->mb[8] = 0;
2305
		mcp->mb[9] = vha->vp_idx;
2306
		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2307 2308 2309 2310 2311 2312 2313
	} else {
		mcp->mb[1] = MSW(id_list_dma);
		mcp->mb[2] = LSW(id_list_dma);
		mcp->mb[3] = MSW(MSD(id_list_dma));
		mcp->mb[6] = LSW(MSD(id_list_dma));
		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
	}
L
Linus Torvalds 已提交
2314
	mcp->in_mb = MBX_1|MBX_0;
2315
	mcp->tov = MBX_TOV_SECONDS;
L
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2316
	mcp->flags = 0;
2317
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2318 2319 2320

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2321
		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2322 2323
	} else {
		*entries = mcp->mb[1];
2324 2325
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
		    "Done %s.\n", __func__);
L
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2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344
	}

	return rval;
}

/*
 * qla2x00_get_resource_cnts
 *	Get current firmware resource counts.
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2345
qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2346
    uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2347
    uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
L
Linus Torvalds 已提交
2348 2349 2350 2351 2352
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2353 2354
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2355 2356 2357

	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
	mcp->out_mb = MBX_0;
2358
	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2359
	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2360
		mcp->in_mb |= MBX_12;
2361
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2362
	mcp->flags = 0;
2363
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2364 2365 2366

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2367 2368
		ql_dbg(ql_dbg_mbx, vha, 0x107d,
		    "Failed mb[0]=%x.\n", mcp->mb[0]);
L
Linus Torvalds 已提交
2369
	} else {
2370
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2371 2372 2373 2374
		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
		    mcp->mb[11], mcp->mb[12]);
L
Linus Torvalds 已提交
2375 2376 2377 2378 2379 2380 2381 2382 2383

		if (cur_xchg_cnt)
			*cur_xchg_cnt = mcp->mb[3];
		if (orig_xchg_cnt)
			*orig_xchg_cnt = mcp->mb[6];
		if (cur_iocb_cnt)
			*cur_iocb_cnt = mcp->mb[7];
		if (orig_iocb_cnt)
			*orig_iocb_cnt = mcp->mb[10];
2384
		if (vha->hw->flags.npiv_supported && max_npiv_vports)
2385
			*max_npiv_vports = mcp->mb[11];
2386
		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2387
			*max_fcfs = mcp->mb[12];
L
Linus Torvalds 已提交
2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407
	}

	return (rval);
}

/*
 * qla2x00_get_fcal_position_map
 *	Get FCAL (LILP) position map using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	pos_map = buffer pointer (can be NULL).
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2408
qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
L
Linus Torvalds 已提交
2409 2410 2411 2412 2413 2414
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	char *pmap;
	dma_addr_t pmap_dma;
2415
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2416

2417 2418
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
	    "Entered %s.\n", __func__);
2419

2420
	pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
L
Linus Torvalds 已提交
2421
	if (pmap  == NULL) {
2422 2423
		ql_log(ql_log_warn, vha, 0x1080,
		    "Memory alloc failed.\n");
L
Linus Torvalds 已提交
2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(pmap, 0, FCAL_MAP_SIZE);

	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
	mcp->mb[2] = MSW(pmap_dma);
	mcp->mb[3] = LSW(pmap_dma);
	mcp->mb[6] = MSW(MSD(pmap_dma));
	mcp->mb[7] = LSW(MSD(pmap_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->buf_size = FCAL_MAP_SIZE;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2438
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2439 2440

	if (rval == QLA_SUCCESS) {
2441
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2442 2443 2444 2445
		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
		    pmap, pmap[0] + 1);
L
Linus Torvalds 已提交
2446 2447 2448 2449 2450 2451 2452

		if (pos_map)
			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
	}
	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);

	if (rval != QLA_SUCCESS) {
2453
		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2454
	} else {
2455 2456
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2457 2458 2459 2460
	}

	return rval;
}
2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475

/*
 * qla2x00_get_link_status
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	ret_buf = pointer to link status return buffer.
 *
 * Returns:
 *	0 = success.
 *	BIT_0 = mem alloc error.
 *	BIT_1 = mailbox error.
 */
int
2476
qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2477
    struct link_statistics *stats, dma_addr_t stats_dma)
2478 2479 2480 2481
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2482
	uint32_t *siter, *diter, dwords;
2483
	struct qla_hw_data *ha = vha->hw;
2484

2485 2486
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
	    "Entered %s.\n", __func__);
2487 2488

	mcp->mb[0] = MBC_GET_LINK_STATUS;
2489 2490 2491 2492
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
2493 2494
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_0;
2495
	if (IS_FWI2_CAPABLE(ha)) {
2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508
		mcp->mb[1] = loop_id;
		mcp->mb[4] = 0;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = loop_id << 8;
		mcp->out_mb |= MBX_1;
	}
2509
	mcp->tov = MBX_TOV_SECONDS;
2510
	mcp->flags = IOCTL_CMD;
2511
	rval = qla2x00_mailbox_command(vha, mcp);
2512 2513 2514

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2515 2516
			ql_dbg(ql_dbg_mbx, vha, 0x1085,
			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2517
			rval = QLA_FUNCTION_FAILED;
2518
		} else {
2519
			/* Copy over data -- firmware data is LE. */
2520 2521
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
			    "Done %s.\n", __func__);
2522 2523 2524 2525
			dwords = offsetof(struct link_statistics, unused1) / 4;
			siter = diter = &stats->link_fail_cnt;
			while (dwords--)
				*diter++ = le32_to_cpu(*siter++);
2526 2527 2528
		}
	} else {
		/* Failed. */
2529
		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2530 2531 2532 2533 2534 2535
	}

	return rval;
}

int
2536
qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2537
    dma_addr_t stats_dma)
2538 2539 2540 2541
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2542
	uint32_t *siter, *diter, dwords;
2543

2544 2545
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
	    "Entered %s.\n", __func__);
2546 2547

	mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2548 2549 2550 2551 2552
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = sizeof(struct link_statistics) / 4;
2553
	mcp->mb[9] = vha->vp_idx;
2554
	mcp->mb[10] = 0;
2555
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2556
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
2557
	mcp->tov = MBX_TOV_SECONDS;
2558
	mcp->flags = IOCTL_CMD;
2559
	rval = qla2x00_mailbox_command(vha, mcp);
2560 2561 2562

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2563 2564
			ql_dbg(ql_dbg_mbx, vha, 0x1089,
			    "Failed mb[0]=%x.\n", mcp->mb[0]);
2565
			rval = QLA_FUNCTION_FAILED;
2566
		} else {
2567 2568
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
			    "Done %s.\n", __func__);
2569
			/* Copy over data -- firmware data is LE. */
2570 2571
			dwords = sizeof(struct link_statistics) / 4;
			siter = diter = &stats->link_fail_cnt;
2572
			while (dwords--)
2573
				*diter++ = le32_to_cpu(*siter++);
2574 2575 2576
		}
	} else {
		/* Failed. */
2577
		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2578 2579 2580 2581 2582 2583
	}

	return rval;
}

int
2584
qla24xx_abort_command(srb_t *sp)
2585 2586 2587 2588 2589 2590 2591
{
	int		rval;
	unsigned long   flags = 0;

	struct abort_entry_24xx *abt;
	dma_addr_t	abt_dma;
	uint32_t	handle;
2592 2593
	fc_port_t	*fcport = sp->fcport;
	struct scsi_qla_host *vha = fcport->vha;
2594
	struct qla_hw_data *ha = vha->hw;
2595
	struct req_que *req = vha->req;
2596

2597 2598
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
	    "Entered %s.\n", __func__);
2599

2600
	spin_lock_irqsave(&ha->hardware_lock, flags);
2601
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2602
		if (req->outstanding_cmds[handle] == sp)
2603 2604
			break;
	}
2605
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2606
	if (handle == req->num_outstanding_cmds) {
2607 2608 2609 2610 2611 2612
		/* Command not found. */
		return QLA_FUNCTION_FAILED;
	}

	abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
	if (abt == NULL) {
2613 2614
		ql_log(ql_log_warn, vha, 0x108d,
		    "Failed to allocate abort IOCB.\n");
2615 2616 2617 2618 2619 2620
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(abt, 0, sizeof(struct abort_entry_24xx));

	abt->entry_type = ABORT_IOCB_TYPE;
	abt->entry_count = 1;
2621
	abt->handle = MAKE_HANDLE(req->id, abt->handle);
2622
	abt->nport_handle = cpu_to_le16(fcport->loop_id);
2623
	abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2624 2625 2626
	abt->port_id[0] = fcport->d_id.b.al_pa;
	abt->port_id[1] = fcport->d_id.b.area;
	abt->port_id[2] = fcport->d_id.b.domain;
2627
	abt->vp_index = fcport->vha->vp_idx;
2628 2629 2630

	abt->req_que_no = cpu_to_le16(req->id);

2631
	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2632
	if (rval != QLA_SUCCESS) {
2633 2634
		ql_dbg(ql_dbg_mbx, vha, 0x108e,
		    "Failed to issue IOCB (%x).\n", rval);
2635
	} else if (abt->entry_status != 0) {
2636 2637 2638
		ql_dbg(ql_dbg_mbx, vha, 0x108f,
		    "Failed to complete IOCB -- error status (%x).\n",
		    abt->entry_status);
2639 2640
		rval = QLA_FUNCTION_FAILED;
	} else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2641 2642 2643
		ql_dbg(ql_dbg_mbx, vha, 0x1090,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(abt->nport_handle));
2644 2645
		rval = QLA_FUNCTION_FAILED;
	} else {
2646 2647
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
		    "Done %s.\n", __func__);
2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661
	}

	dma_pool_free(ha->s_dma_pool, abt, abt_dma);

	return rval;
}

struct tsk_mgmt_cmd {
	union {
		struct tsk_mgmt_entry tsk;
		struct sts_entry_24xx sts;
	} p;
};

2662 2663
static int
__qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2664
    unsigned int l, int tag)
2665
{
2666
	int		rval, rval2;
2667
	struct tsk_mgmt_cmd *tsk;
2668
	struct sts_entry_24xx *sts;
2669
	dma_addr_t	tsk_dma;
2670 2671
	scsi_qla_host_t *vha;
	struct qla_hw_data *ha;
2672 2673
	struct req_que *req;
	struct rsp_que *rsp;
2674

2675 2676
	vha = fcport->vha;
	ha = vha->hw;
2677
	req = vha->req;
2678

2679 2680
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
	    "Entered %s.\n", __func__);
2681

2682
	if (ha->flags.cpu_affinity_enabled)
2683 2684 2685
		rsp = ha->rsp_q_map[tag + 1];
	else
		rsp = req->rsp;
2686
	tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2687
	if (tsk == NULL) {
2688 2689
		ql_log(ql_log_warn, vha, 0x1093,
		    "Failed to allocate task management IOCB.\n");
2690 2691 2692 2693 2694 2695
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));

	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
	tsk->p.tsk.entry_count = 1;
2696
	tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2697
	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2698
	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2699
	tsk->p.tsk.control_flags = cpu_to_le32(type);
2700 2701 2702
	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2703
	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2704 2705 2706 2707 2708
	if (type == TCF_LUN_RESET) {
		int_to_scsilun(l, &tsk->p.tsk.lun);
		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
		    sizeof(tsk->p.tsk.lun));
	}
2709

2710
	sts = &tsk->p.sts;
2711
	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2712
	if (rval != QLA_SUCCESS) {
2713 2714
		ql_dbg(ql_dbg_mbx, vha, 0x1094,
		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
2715
	} else if (sts->entry_status != 0) {
2716 2717 2718
		ql_dbg(ql_dbg_mbx, vha, 0x1095,
		    "Failed to complete IOCB -- error status (%x).\n",
		    sts->entry_status);
2719
		rval = QLA_FUNCTION_FAILED;
2720
	} else if (sts->comp_status !=
2721
	    __constant_cpu_to_le16(CS_COMPLETE)) {
2722 2723 2724
		ql_dbg(ql_dbg_mbx, vha, 0x1096,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(sts->comp_status));
2725
		rval = QLA_FUNCTION_FAILED;
2726 2727 2728
	} else if (le16_to_cpu(sts->scsi_status) &
	    SS_RESPONSE_INFO_LEN_VALID) {
		if (le32_to_cpu(sts->rsp_data_len) < 4) {
2729
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2730 2731 2732
			    "Ignoring inconsistent data length -- not enough "
			    "response info (%d).\n",
			    le32_to_cpu(sts->rsp_data_len));
2733
		} else if (sts->data[3]) {
2734 2735 2736
			ql_dbg(ql_dbg_mbx, vha, 0x1098,
			    "Failed to complete IOCB -- response (%x).\n",
			    sts->data[3]);
2737 2738
			rval = QLA_FUNCTION_FAILED;
		}
2739 2740 2741
	}

	/* Issue marker IOCB. */
2742
	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2743 2744
	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
	if (rval2 != QLA_SUCCESS) {
2745 2746
		ql_dbg(ql_dbg_mbx, vha, 0x1099,
		    "Failed to issue marker IOCB (%x).\n", rval2);
2747
	} else {
2748 2749
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
		    "Done %s.\n", __func__);
2750 2751
	}

2752
	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2753 2754 2755 2756

	return rval;
}

2757
int
2758
qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
2759
{
2760 2761 2762 2763 2764
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);

2765
	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2766 2767 2768
}

int
2769
qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
2770
{
2771 2772 2773 2774 2775
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);

2776
	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2777 2778
}

2779
int
2780
qla2x00_system_error(scsi_qla_host_t *vha)
2781 2782 2783 2784
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2785
	struct qla_hw_data *ha = vha->hw;
2786

2787
	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2788 2789
		return QLA_FUNCTION_FAILED;

2790 2791
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
	    "Entered %s.\n", __func__);
2792 2793 2794 2795 2796 2797

	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
2798
	rval = qla2x00_mailbox_command(vha, mcp);
2799 2800

	if (rval != QLA_SUCCESS) {
2801
		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2802
	} else {
2803 2804
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
		    "Done %s.\n", __func__);
2805 2806 2807 2808 2809
	}

	return rval;
}

2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878
int
qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA2031(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_WRITE_SERDES;
	mcp->mb[1] = addr;
	mcp->mb[2] = data & 0xff;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1183,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA2031(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_READ_SERDES;
	mcp->mb[1] = addr;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	*data = mcp->mb[1] & 0xff;

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1186,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
		    "Done %s.\n", __func__);
	}

	return rval;
}

2879 2880 2881 2882 2883 2884 2885
/**
 * qla2x00_set_serdes_params() -
 * @ha: HA context
 *
 * Returns
 */
int
2886
qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2887 2888 2889 2890 2891 2892
    uint16_t sw_em_2g, uint16_t sw_em_4g)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2893 2894
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
	    "Entered %s.\n", __func__);
2895 2896 2897

	mcp->mb[0] = MBC_SERDES_PARAMS;
	mcp->mb[1] = BIT_0;
2898 2899 2900
	mcp->mb[2] = sw_em_1g | BIT_15;
	mcp->mb[3] = sw_em_2g | BIT_15;
	mcp->mb[4] = sw_em_4g | BIT_15;
2901 2902
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2903
	mcp->tov = MBX_TOV_SECONDS;
2904
	mcp->flags = 0;
2905
	rval = qla2x00_mailbox_command(vha, mcp);
2906 2907 2908

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2909 2910
		ql_dbg(ql_dbg_mbx, vha, 0x109f,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2911 2912
	} else {
		/*EMPTY*/
2913 2914
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
		    "Done %s.\n", __func__);
2915 2916 2917 2918
	}

	return rval;
}
2919 2920

int
2921
qla2x00_stop_firmware(scsi_qla_host_t *vha)
2922 2923 2924 2925 2926
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2927
	if (!IS_FWI2_CAPABLE(vha->hw))
2928 2929
		return QLA_FUNCTION_FAILED;

2930 2931
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
	    "Entered %s.\n", __func__);
2932 2933

	mcp->mb[0] = MBC_STOP_FIRMWARE;
2934 2935
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
2936 2937 2938
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
2939
	rval = qla2x00_mailbox_command(vha, mcp);
2940 2941

	if (rval != QLA_SUCCESS) {
2942
		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
2943 2944
		if (mcp->mb[0] == MBS_INVALID_COMMAND)
			rval = QLA_INVALID_COMMAND;
2945
	} else {
2946 2947
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
		    "Done %s.\n", __func__);
2948 2949 2950 2951
	}

	return rval;
}
2952 2953

int
2954
qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2955 2956 2957 2958 2959 2960
    uint16_t buffers)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2961 2962
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
	    "Entered %s.\n", __func__);
2963

2964
	if (!IS_FWI2_CAPABLE(vha->hw))
2965 2966
		return QLA_FUNCTION_FAILED;

2967 2968 2969
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

2970
	mcp->mb[0] = MBC_TRACE_CONTROL;
2971 2972 2973 2974 2975 2976 2977 2978
	mcp->mb[1] = TC_EFT_ENABLE;
	mcp->mb[2] = LSW(eft_dma);
	mcp->mb[3] = MSW(eft_dma);
	mcp->mb[4] = LSW(MSD(eft_dma));
	mcp->mb[5] = MSW(MSD(eft_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2979
	mcp->in_mb = MBX_1|MBX_0;
2980
	mcp->tov = MBX_TOV_SECONDS;
2981
	mcp->flags = 0;
2982
	rval = qla2x00_mailbox_command(vha, mcp);
2983
	if (rval != QLA_SUCCESS) {
2984 2985 2986
		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
2987
	} else {
2988 2989
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
		    "Done %s.\n", __func__);
2990 2991 2992 2993
	}

	return rval;
}
2994

2995
int
2996
qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2997 2998 2999 3000 3001
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3002 3003
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
	    "Entered %s.\n", __func__);
3004

3005
	if (!IS_FWI2_CAPABLE(vha->hw))
3006 3007
		return QLA_FUNCTION_FAILED;

3008 3009 3010
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3011 3012 3013 3014
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_EFT_DISABLE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
3015
	mcp->tov = MBX_TOV_SECONDS;
3016
	mcp->flags = 0;
3017
	rval = qla2x00_mailbox_command(vha, mcp);
3018
	if (rval != QLA_SUCCESS) {
3019 3020 3021
		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3022
	} else {
3023 3024
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
		    "Done %s.\n", __func__);
3025 3026 3027 3028 3029
	}

	return rval;
}

3030
int
3031
qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3032 3033 3034 3035 3036 3037
    uint16_t buffers, uint16_t *mb, uint32_t *dwords)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3038 3039
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
	    "Entered %s.\n", __func__);
3040

3041
	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3042
	    !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3043 3044
		return QLA_FUNCTION_FAILED;

3045 3046 3047
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_ENABLE;
	mcp->mb[2] = LSW(fce_dma);
	mcp->mb[3] = MSW(fce_dma);
	mcp->mb[4] = LSW(MSD(fce_dma));
	mcp->mb[5] = MSW(MSD(fce_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->mb[8] = 0;
	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3062
	mcp->tov = MBX_TOV_SECONDS;
3063
	mcp->flags = 0;
3064
	rval = qla2x00_mailbox_command(vha, mcp);
3065
	if (rval != QLA_SUCCESS) {
3066 3067 3068
		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3069
	} else {
3070 3071
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
		    "Done %s.\n", __func__);
3072 3073 3074 3075

		if (mb)
			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
		if (dwords)
3076
			*dwords = buffers;
3077 3078 3079 3080 3081 3082
	}

	return rval;
}

int
3083
qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3084 3085 3086 3087 3088
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3089 3090
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
	    "Entered %s.\n", __func__);
3091

3092
	if (!IS_FWI2_CAPABLE(vha->hw))
3093 3094
		return QLA_FUNCTION_FAILED;

3095 3096 3097
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3098 3099 3100 3101 3102 3103
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_DISABLE;
	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
3104
	mcp->tov = MBX_TOV_SECONDS;
3105
	mcp->flags = 0;
3106
	rval = qla2x00_mailbox_command(vha, mcp);
3107
	if (rval != QLA_SUCCESS) {
3108 3109 3110
		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3111
	} else {
3112 3113
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
		    "Done %s.\n", __func__);
3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129

		if (wr)
			*wr = (uint64_t) mcp->mb[5] << 48 |
			    (uint64_t) mcp->mb[4] << 32 |
			    (uint64_t) mcp->mb[3] << 16 |
			    (uint64_t) mcp->mb[2];
		if (rd)
			*rd = (uint64_t) mcp->mb[9] << 48 |
			    (uint64_t) mcp->mb[8] << 32 |
			    (uint64_t) mcp->mb[7] << 16 |
			    (uint64_t) mcp->mb[6];
	}

	return rval;
}

3130 3131 3132 3133 3134 3135 3136 3137
int
qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
	uint16_t *port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3138 3139
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
	    "Entered %s.\n", __func__);
3140

3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161
	if (!IS_IIDMA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = mcp->mb[3] = 0;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3162
		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3163
	} else {
3164 3165
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
		    "Done %s.\n", __func__);
3166 3167 3168 3169 3170 3171 3172
		if (port_speed)
			*port_speed = mcp->mb[3];
	}

	return rval;
}

3173
int
3174
qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3175 3176 3177 3178 3179 3180
    uint16_t port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3181 3182
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
	    "Entered %s.\n", __func__);
3183

3184
	if (!IS_IIDMA_CAPABLE(vha->hw))
3185 3186 3187 3188 3189
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = BIT_0;
3190
	if (IS_CNA_CAPABLE(vha->hw))
3191 3192 3193 3194 3195 3196
		mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
	else
		mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3197
	mcp->tov = MBX_TOV_SECONDS;
3198
	mcp->flags = 0;
3199
	rval = qla2x00_mailbox_command(vha, mcp);
3200 3201 3202 3203 3204 3205 3206 3207 3208

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3209 3210
		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
		    "Failed=%x.\n", rval);
3211
	} else {
3212 3213
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
		    "Done %s.\n", __func__);
3214 3215 3216 3217
	}

	return rval;
}
3218 3219

void
3220
qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3221 3222 3223
	struct vp_rpt_id_entry_24xx *rptid_entry)
{
	uint8_t vp_idx;
3224
	uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3225 3226
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *vp;
3227
	unsigned long   flags;
3228
	int found;
3229

3230 3231
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
	    "Entered %s.\n", __func__);
3232

3233 3234 3235 3236
	if (rptid_entry->entry_status != 0)
		return;

	if (rptid_entry->format == 0) {
3237
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3238 3239 3240 3241
		    "Format 0 : Number of VPs setup %d, number of "
		    "VPs acquired %d.\n",
		    MSB(le16_to_cpu(rptid_entry->vp_count)),
		    LSB(le16_to_cpu(rptid_entry->vp_count)));
3242
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3243 3244 3245
		    "Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);
3246
	} else if (rptid_entry->format == 1) {
3247
		vp_idx = LSB(stat);
3248
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3249 3250
		    "Format 1: VP[%d] enabled - status %d - with "
		    "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3251
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3252
		    rptid_entry->port_id[0]);
3253 3254 3255 3256

		vp = vha;
		if (vp_idx == 0 && (MSB(stat) != 1))
			goto reg_needed;
3257

3258
		if (MSB(stat) != 0 && MSB(stat) != 2) {
3259 3260
			ql_dbg(ql_dbg_mbx, vha, 0x10ba,
			    "Could not acquire ID for VP[%d].\n", vp_idx);
3261
			return;
3262
		}
3263

3264
		found = 0;
3265
		spin_lock_irqsave(&ha->vport_slock, flags);
3266 3267 3268
		list_for_each_entry(vp, &ha->vp_list, list) {
			if (vp_idx == vp->vp_idx) {
				found = 1;
3269
				break;
3270 3271
			}
		}
3272 3273
		spin_unlock_irqrestore(&ha->vport_slock, flags);

3274
		if (!found)
3275 3276
			return;

3277 3278 3279
		vp->d_id.b.domain = rptid_entry->port_id[2];
		vp->d_id.b.area =  rptid_entry->port_id[1];
		vp->d_id.b.al_pa = rptid_entry->port_id[0];
3280 3281 3282 3283 3284

		/*
		 * Cannot configure here as we are still sitting on the
		 * response queue. Handle it in dpc context.
		 */
3285
		set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3286

3287 3288 3289 3290
reg_needed:
		set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
		set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3291
		qla2xxx_wake_dpc(vha);
3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313
	}
}

/*
 * qla24xx_modify_vp_config
 *	Change VP configuration for vha
 *
 * Input:
 *	vha = adapter block pointer.
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_modify_vp_config(scsi_qla_host_t *vha)
{
	int		rval;
	struct vp_config_entry_24xx *vpmod;
	dma_addr_t	vpmod_dma;
3314 3315
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3316 3317 3318

	/* This can be called by the parent */

3319 3320
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
	    "Entered %s.\n", __func__);
3321

3322
	vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3323
	if (!vpmod) {
3324 3325
		ql_log(ql_log_warn, vha, 0x10bc,
		    "Failed to allocate modify VP IOCB.\n");
3326 3327 3328 3329 3330 3331 3332 3333 3334 3335
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
	vpmod->entry_count = 1;
	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
	vpmod->vp_count = 1;
	vpmod->vp_index1 = vha->vp_idx;
	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3336 3337 3338

	qlt_modify_vp_config(vha, vpmod);

3339 3340 3341 3342
	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
	vpmod->entry_count = 1;

3343
	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3344
	if (rval != QLA_SUCCESS) {
3345 3346
		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
		    "Failed to issue VP config IOCB (%x).\n", rval);
3347
	} else if (vpmod->comp_status != 0) {
3348 3349 3350
		ql_dbg(ql_dbg_mbx, vha, 0x10be,
		    "Failed to complete IOCB -- error status (%x).\n",
		    vpmod->comp_status);
3351 3352
		rval = QLA_FUNCTION_FAILED;
	} else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3353 3354 3355
		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(vpmod->comp_status));
3356 3357 3358
		rval = QLA_FUNCTION_FAILED;
	} else {
		/* EMPTY */
3359 3360
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
		    "Done %s.\n", __func__);
3361 3362
		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
	}
3363
	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389

	return rval;
}

/*
 * qla24xx_control_vp
 *	Enable a virtual port for given host
 *
 * Input:
 *	ha = adapter block pointer.
 *	vhba = virtual adapter (unused)
 *	index = index number for enabled VP
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
{
	int		rval;
	int		map, pos;
	struct vp_ctrl_entry_24xx   *vce;
	dma_addr_t	vce_dma;
3390
	struct qla_hw_data *ha = vha->hw;
3391
	int	vp_index = vha->vp_idx;
3392
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3393

3394
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3395
	    "Entered %s enabling index %d.\n", __func__, vp_index);
3396

3397
	if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3398 3399 3400 3401
		return QLA_PARAMETER_ERROR;

	vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
	if (!vce) {
3402 3403
		ql_log(ql_log_warn, vha, 0x10c2,
		    "Failed to allocate VP control IOCB.\n");
3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417
		return QLA_MEMORY_ALLOC_FAILED;
	}
	memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));

	vce->entry_type = VP_CTRL_IOCB_TYPE;
	vce->entry_count = 1;
	vce->command = cpu_to_le16(cmd);
	vce->vp_count = __constant_cpu_to_le16(1);

	/* index map in firmware starts with 1; decrement index
	 * this is ok as we never use index 0
	 */
	map = (vp_index - 1) / 8;
	pos = (vp_index - 1) & 7;
3418
	mutex_lock(&ha->vport_lock);
3419
	vce->vp_idx_map[map] |= 1 << pos;
3420
	mutex_unlock(&ha->vport_lock);
3421

3422
	rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3423
	if (rval != QLA_SUCCESS) {
3424 3425
		ql_dbg(ql_dbg_mbx, vha, 0x10c3,
		    "Failed to issue VP control IOCB (%x).\n", rval);
3426
	} else if (vce->entry_status != 0) {
3427 3428
		ql_dbg(ql_dbg_mbx, vha, 0x10c4,
		    "Failed to complete IOCB -- error status (%x).\n",
3429 3430 3431
		    vce->entry_status);
		rval = QLA_FUNCTION_FAILED;
	} else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3432 3433
		ql_dbg(ql_dbg_mbx, vha, 0x10c5,
		    "Failed to complet IOCB -- completion status (%x).\n",
3434 3435 3436
		    le16_to_cpu(vce->comp_status));
		rval = QLA_FUNCTION_FAILED;
	} else {
3437 3438
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
		    "Done %s.\n", __func__);
3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467
	}

	dma_pool_free(ha->s_dma_pool, vce, vce_dma);

	return rval;
}

/*
 * qla2x00_send_change_request
 *	Receive or disable RSCN request from fabric controller
 *
 * Input:
 *	ha = adapter block pointer
 *	format = registration format:
 *		0 - Reserved
 *		1 - Fabric detected registration
 *		2 - N_port detected registration
 *		3 - Full registration
 *		FF - clear registration
 *	vp_idx = Virtual port index
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel Context
 */

int
3468
qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3469 3470 3471 3472 3473 3474
			    uint16_t vp_idx)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3475 3476
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
	    "Entered %s.\n", __func__);
3477

3478 3479 3480 3481 3482 3483 3484
	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
	mcp->mb[1] = format;
	mcp->mb[9] = vp_idx;
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
3485
	rval = qla2x00_mailbox_command(vha, mcp);
3486 3487 3488 3489 3490 3491 3492 3493 3494 3495

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
			rval = BIT_1;
		}
	} else
		rval = BIT_1;

	return rval;
}
3496 3497

int
3498
qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3499 3500 3501 3502 3503 3504
    uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3505 3506
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
	    "Entered %s.\n", __func__);
3507

3508
	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521
		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(addr);
		mcp->out_mb = MBX_8|MBX_0;
	} else {
		mcp->mb[0] = MBC_DUMP_RISC_RAM;
		mcp->out_mb = MBX_0;
	}
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3522
	if (IS_FWI2_CAPABLE(vha->hw)) {
3523 3524 3525 3526 3527 3528 3529 3530 3531
		mcp->mb[4] = MSW(size);
		mcp->mb[5] = LSW(size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(size);
		mcp->out_mb |= MBX_4;
	}

	mcp->in_mb = MBX_0;
3532
	mcp->tov = MBX_TOV_SECONDS;
3533
	mcp->flags = 0;
3534
	rval = qla2x00_mailbox_command(vha, mcp);
3535 3536

	if (rval != QLA_SUCCESS) {
3537 3538
		ql_dbg(ql_dbg_mbx, vha, 0x1008,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3539
	} else {
3540 3541
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
		    "Done %s.\n", __func__);
3542 3543 3544 3545
	}

	return rval;
}
3546 3547 3548 3549 3550 3551 3552 3553 3554 3555
/* 84XX Support **************************************************************/

struct cs84xx_mgmt_cmd {
	union {
		struct verify_chip_entry_84xx req;
		struct verify_chip_rsp_84xx rsp;
	} p;
};

int
3556
qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3557 3558 3559 3560 3561 3562
{
	int rval, retry;
	struct cs84xx_mgmt_cmd *mn;
	dma_addr_t mn_dma;
	uint16_t options;
	unsigned long flags;
3563
	struct qla_hw_data *ha = vha->hw;
3564

3565 3566
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
	    "Entered %s.\n", __func__);
3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580

	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
	if (mn == NULL) {
		return QLA_MEMORY_ALLOC_FAILED;
	}

	/* Force Update? */
	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
	/* Diagnostic firmware? */
	/* options |= MENLO_DIAG_FW; */
	/* We update the firmware with only one data sequence. */
	options |= VCO_END_OF_DATA;

	do {
3581
		retry = 0;
3582 3583 3584 3585 3586
		memset(mn, 0, sizeof(*mn));
		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
		mn->p.req.entry_count = 1;
		mn->p.req.options = cpu_to_le16(options);

3587 3588 3589 3590
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
		    "Dump of Verify Request.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
		    (uint8_t *)mn, sizeof(*mn));
3591

3592
		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3593
		if (rval != QLA_SUCCESS) {
3594 3595
			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
			    "Failed to issue verify IOCB (%x).\n", rval);
3596 3597 3598
			goto verify_done;
		}

3599 3600 3601 3602
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
		    "Dump of Verify Response.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
		    (uint8_t *)mn, sizeof(*mn));
3603 3604 3605 3606

		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
3607
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3608
		    "cs=%x fc=%x.\n", status[0], status[1]);
3609 3610 3611 3612

		if (status[0] != CS_COMPLETE) {
			rval = QLA_FUNCTION_FAILED;
			if (!(options & VCO_DONT_UPDATE_FW)) {
3613 3614 3615
				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
				    "Firmware update failed. Retrying "
				    "without update firmware.\n");
3616 3617 3618 3619 3620
				options |= VCO_DONT_UPDATE_FW;
				options &= ~VCO_FORCE_UPDATE;
				retry = 1;
			}
		} else {
3621
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3622 3623
			    "Firmware updated to %x.\n",
			    le32_to_cpu(mn->p.rsp.fw_ver));
3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637

			/* NOTE: we only update OP firmware. */
			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
			ha->cs84xx->op_fw_version =
			    le32_to_cpu(mn->p.rsp.fw_ver);
			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
			    flags);
		}
	} while (retry);

verify_done:
	dma_pool_free(ha->s_dma_pool, mn, mn_dma);

	if (rval != QLA_SUCCESS) {
3638 3639
		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
		    "Failed=%x.\n", rval);
3640
	} else {
3641 3642
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
		    "Done %s.\n", __func__);
3643 3644 3645 3646
	}

	return rval;
}
3647 3648

int
3649
qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3650 3651 3652 3653 3654 3655 3656
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

3657 3658
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
	    "Entered %s.\n", __func__);
3659

3660
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3661
	mcp->mb[1] = req->options;
3662 3663 3664 3665 3666 3667 3668 3669 3670 3671
	mcp->mb[2] = MSW(LSD(req->dma));
	mcp->mb[3] = LSW(LSD(req->dma));
	mcp->mb[6] = MSW(MSD(req->dma));
	mcp->mb[7] = LSW(MSD(req->dma));
	mcp->mb[5] = req->length;
	if (req->rsp)
		mcp->mb[10] = req->rsp->id;
	mcp->mb[12] = req->qos;
	mcp->mb[11] = req->vp_idx;
	mcp->mb[13] = req->rid;
3672
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3673
		mcp->mb[15] = 0;
3674 3675 3676 3677 3678 3679 3680 3681 3682 3683

	mcp->mb[4] = req->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
	mcp->mb[9] = 0;
	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
3684 3685
	mcp->tov = MBX_TOV_SECONDS * 2;

3686
	if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
3687
		mcp->in_mb |= MBX_1;
3688
	if (IS_QLA83XX(ha) || !IS_QLA27XX(ha)) {
3689 3690 3691 3692
		mcp->out_mb |= MBX_15;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
3693 3694

	spin_lock_irqsave(&ha->hardware_lock, flags);
3695
	if (!(req->options & BIT_0)) {
3696
		WRT_REG_DWORD(req->req_q_in, 0);
3697
		if (!IS_QLA83XX(ha) || !IS_QLA27XX(ha))
3698
			WRT_REG_DWORD(req->req_q_out, 0);
3699 3700 3701
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

3702
	rval = qla2x00_mailbox_command(vha, mcp);
3703 3704 3705 3706
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
3707 3708
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
		    "Done %s.\n", __func__);
3709 3710
	}

3711 3712 3713 3714
	return rval;
}

int
3715
qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3716 3717 3718 3719 3720 3721 3722
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

3723 3724
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
	    "Entered %s.\n", __func__);
3725

3726
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3727
	mcp->mb[1] = rsp->options;
3728 3729 3730 3731 3732
	mcp->mb[2] = MSW(LSD(rsp->dma));
	mcp->mb[3] = LSW(LSD(rsp->dma));
	mcp->mb[6] = MSW(MSD(rsp->dma));
	mcp->mb[7] = LSW(MSD(rsp->dma));
	mcp->mb[5] = rsp->length;
3733
	mcp->mb[14] = rsp->msix->entry;
3734
	mcp->mb[13] = rsp->rid;
3735
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3736
		mcp->mb[15] = 0;
3737 3738 3739 3740 3741 3742

	mcp->mb[4] = rsp->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
	mcp->mb[9] = 0;
3743
	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3744 3745 3746
			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
3747 3748 3749 3750 3751
	mcp->tov = MBX_TOV_SECONDS * 2;

	if (IS_QLA81XX(ha)) {
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
3752
	} else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3753 3754 3755 3756 3757
		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
3758 3759

	spin_lock_irqsave(&ha->hardware_lock, flags);
3760
	if (!(rsp->options & BIT_0)) {
3761
		WRT_REG_DWORD(rsp->rsp_q_out, 0);
3762
		if (!IS_QLA83XX(ha))
3763
			WRT_REG_DWORD(rsp->rsp_q_in, 0);
3764 3765 3766 3767
	}

	spin_unlock_irqrestore(&ha->hardware_lock, flags);

3768
	rval = qla2x00_mailbox_command(vha, mcp);
3769 3770 3771 3772
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
3773 3774
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
		    "Done %s.\n", __func__);
3775 3776
	}

3777 3778 3779
	return rval;
}

3780 3781 3782 3783 3784 3785 3786
int
qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3787 3788
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
	    "Entered %s.\n", __func__);
3789 3790 3791 3792 3793 3794 3795 3796 3797 3798

	mcp->mb[0] = MBC_IDC_ACK;
	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3799 3800
		ql_dbg(ql_dbg_mbx, vha, 0x10da,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3801
	} else {
3802 3803
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
		    "Done %s.\n", __func__);
3804 3805 3806 3807
	}

	return rval;
}
3808 3809 3810 3811 3812 3813 3814 3815

int
qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3816 3817
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
	    "Entered %s.\n", __func__);
3818

3819 3820
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3832 3833 3834
		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3835
	} else {
3836 3837
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
		    "Done %s.\n", __func__);
3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850
		*sector_size = mcp->mb[1];
	}

	return rval;
}

int
qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3851 3852
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
3853 3854
		return QLA_FUNCTION_FAILED;

3855 3856
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
	    "Entered %s.\n", __func__);
3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
	    FAC_OPT_CMD_WRITE_PROTECT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3868 3869 3870
		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3871
	} else {
3872 3873
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
		    "Done %s.\n", __func__);
3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885
	}

	return rval;
}

int
qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3886 3887
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
	    !IS_QLA27XX(vha->hw))
3888 3889
		return QLA_FUNCTION_FAILED;

3890 3891
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
	    "Entered %s.\n", __func__);
3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
	mcp->mb[2] = LSW(start);
	mcp->mb[3] = MSW(start);
	mcp->mb[4] = LSW(finish);
	mcp->mb[5] = MSW(finish);
	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3906 3907 3908
		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
3909
	} else {
3910 3911
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
		    "Done %s.\n", __func__);
3912 3913 3914 3915
	}

	return rval;
}
3916 3917 3918 3919 3920 3921 3922 3923

int
qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
{
	int rval = 0;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3924 3925
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
	    "Entered %s.\n", __func__);
3926 3927 3928 3929 3930 3931 3932 3933 3934

	mcp->mb[0] = MBC_RESTART_MPI_FW;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3935 3936 3937
		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3938
	} else {
3939 3940
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
		    "Done %s.\n", __func__);
3941 3942 3943 3944
	}

	return rval;
}
3945

3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051
int
qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int i;
	int len;
	uint16_t *str;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
	    "Entered %s.\n", __func__);

	str = (void *)version;
	len = strlen(version);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
	mcp->out_mb = MBX_1|MBX_0;
	for (i = 4; i < 16 && len; i++, str++, len -= 2) {
		mcp->mb[i] = cpu_to_le16p(str);
		mcp->out_mb |= 1<<i;
	}
	for (; i < 16; i++) {
		mcp->mb[i] = 0;
		mcp->out_mb |= 1<<i;
	}
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x117c,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int len;
	uint16_t dwlen;
	uint8_t *str;
	dma_addr_t str_dma;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
	    IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
	    "Entered %s.\n", __func__);

	str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
	if (!str) {
		ql_log(ql_log_warn, vha, 0x117f,
		    "Failed to allocate driver version param.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memcpy(str, "\x7\x3\x11\x0", 4);
	dwlen = str[0];
	len = dwlen * 4 - 4;
	memset(str + 4, 0, len);
	if (len > strlen(version))
		len = strlen(version);
	memcpy(str + 4, version, len);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
	mcp->mb[2] = MSW(LSD(str_dma));
	mcp->mb[3] = LSW(LSD(str_dma));
	mcp->mb[6] = MSW(MSD(str_dma));
	mcp->mb[7] = LSW(MSD(str_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1180,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
		    "Done %s.\n", __func__);
	}

	dma_pool_free(ha->s_dma_pool, str, str_dma);

	return rval;
}

4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4083 4084
static int
qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_GET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	*temp = mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x115a,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

4085
int
4086 4087
qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4088 4089 4090 4091
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
4092 4093
	struct qla_hw_data *ha = vha->hw;

4094 4095
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);
4096

4097 4098
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
4099

4100 4101 4102
	if (len == 1)
		opt |= BIT_0;

4103 4104 4105 4106 4107 4108 4109
	mcp->mb[0] = MBC_READ_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
4110
	mcp->mb[9] = off;
4111 4112
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4113
	mcp->in_mb = MBX_1|MBX_0;
4114 4115 4116 4117 4118
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (opt & BIT_0)
4119
		*sfp = mcp->mb[1];
4120 4121

	if (rval != QLA_SUCCESS) {
4122 4123
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4124
	} else {
4125 4126
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
4127 4128 4129 4130 4131 4132
	}

	return rval;
}

int
4133 4134
qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4135 4136 4137 4138
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
4139 4140
	struct qla_hw_data *ha = vha->hw;

4141 4142
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
	    "Entered %s.\n", __func__);
4143

4144 4145
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
4146

4147 4148 4149
	if (len == 1)
		opt |= BIT_0;

4150
	if (opt & BIT_0)
4151
		len = *sfp;
4152 4153 4154 4155 4156 4157 4158 4159

	mcp->mb[0] = MBC_WRITE_SFP;
	mcp->mb[1] = dev;
	mcp->mb[2] = MSW(sfp_dma);
	mcp->mb[3] = LSW(sfp_dma);
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
4160
	mcp->mb[9] = off;
4161 4162
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4163
	mcp->in_mb = MBX_1|MBX_0;
4164 4165 4166 4167 4168
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4169 4170
		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4171
	} else {
4172 4173
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
		    "Done %s.\n", __func__);
4174 4175 4176 4177
	}

	return rval;
}
4178 4179 4180 4181 4182 4183 4184 4185 4186

int
qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
    uint16_t size_in_bytes, uint16_t *actual_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4187 4188
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
	    "Entered %s.\n", __func__);
4189

4190
	if (!IS_CNA_CAPABLE(vha->hw))
4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_XGMAC_STATS;
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = size_in_bytes >> 2;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4206 4207 4208
		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4209
	} else {
4210 4211
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
		    "Done %s.\n", __func__);
4212

4213 4214 4215 4216 4217 4218

		*actual_size = mcp->mb[2] << 2;
	}

	return rval;
}
4219 4220 4221 4222 4223 4224 4225 4226 4227

int
qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
    uint16_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4228 4229
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
	    "Entered %s.\n", __func__);
4230

4231
	if (!IS_CNA_CAPABLE(vha->hw))
4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(tlv_dma);
	mcp->mb[3] = LSW(tlv_dma);
	mcp->mb[6] = MSW(MSD(tlv_dma));
	mcp->mb[7] = LSW(MSD(tlv_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4248 4249 4250
		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4251
	} else {
4252 4253
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
		    "Done %s.\n", __func__);
4254 4255 4256 4257
	}

	return rval;
}
4258 4259 4260 4261 4262 4263 4264 4265

int
qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4266 4267
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
	    "Entered %s.\n", __func__);
4268

4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280
	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4281 4282
		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4283
	} else {
4284 4285
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
		    "Done %s.\n", __func__);
4286 4287 4288 4289 4290 4291
		*data = mcp->mb[3] << 16 | mcp->mb[2];
	}

	return rval;
}

4292
int
4293 4294
qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4295 4296 4297 4298 4299
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4300 4301
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
	    "Entered %s.\n", __func__);
4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing

	/* transfer count */
	mcp->mb[10] = LSW(mreq->transfer_size);
	mcp->mb[11] = MSW(mreq->transfer_size);

	/* send data address */
	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

L
Lucas De Marchi 已提交
4317
	/* receive data address */
4318 4319 4320 4321 4322 4323
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	/* Iteration count */
4324 4325
	mcp->mb[18] = LSW(mreq->iteration_count);
	mcp->mb[19] = MSW(mreq->iteration_count);
4326 4327 4328

	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4329
	if (IS_CNA_CAPABLE(vha->hw))
4330 4331 4332 4333 4334 4335 4336 4337 4338 4339
		mcp->out_mb |= MBX_2;
	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->buf_size = mreq->transfer_size;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4340 4341 4342 4343
		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4344
	} else {
4345 4346
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
		    "Done %s.\n", __func__);
4347 4348 4349 4350 4351 4352 4353 4354
	}

	/* Copy mailbox information */
	memcpy( mresp, mcp->mb, 64);
	return rval;
}

int
4355 4356
qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
4357 4358 4359 4360 4361 4362
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4363 4364
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
	    "Entered %s.\n", __func__);
4365 4366 4367 4368

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
	mcp->mb[1] = mreq->options | BIT_6;	/* BIT_6 specifies 64bit address */
4369
	if (IS_CNA_CAPABLE(ha)) {
4370
		mcp->mb[1] |= BIT_15;
4371 4372
		mcp->mb[2] = vha->fcoe_fcf_idx;
	}
4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	mcp->mb[10] = LSW(mreq->transfer_size);

	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4387
	if (IS_CNA_CAPABLE(ha))
4388 4389 4390
		mcp->out_mb |= MBX_2;

	mcp->in_mb = MBX_0;
4391 4392
	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
	    IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4393
		mcp->in_mb |= MBX_1;
4394
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4395 4396 4397 4398 4399 4400 4401 4402 4403
		mcp->in_mb |= MBX_3;

	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->buf_size = mreq->transfer_size;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4404 4405 4406
		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4407
	} else {
4408 4409
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
		    "Done %s.\n", __func__);
4410 4411 4412
	}

	/* Copy mailbox information */
4413
	memcpy(mresp, mcp->mb, 64);
4414 4415
	return rval;
}
4416

4417
int
4418
qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4419 4420 4421 4422 4423
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4424
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4425
	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4426 4427 4428 4429 4430 4431 4432

	mcp->mb[0] = MBC_ISP84XX_RESET;
	mcp->mb[1] = enable_diagnostic;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4433
	rval = qla2x00_mailbox_command(vha, mcp);
4434 4435

	if (rval != QLA_SUCCESS)
4436
		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4437
	else
4438 4439
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
		    "Done %s.\n", __func__);
4440 4441 4442 4443

	return rval;
}

4444 4445 4446 4447 4448 4449 4450
int
qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4451 4452
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
	    "Entered %s.\n", __func__);
4453

4454
	if (!IS_FWI2_CAPABLE(vha->hw))
4455
		return QLA_FUNCTION_FAILED;
4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467

	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = LSW(data);
	mcp->mb[3] = MSW(data);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4468 4469
		ql_dbg(ql_dbg_mbx, vha, 0x1101,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4470
	} else {
4471 4472
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
		    "Done %s.\n", __func__);
4473 4474 4475 4476
	}

	return rval;
}
4477

4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488
int
qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	uint32_t stat, timer;
	uint16_t mb0 = 0;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	rval = QLA_SUCCESS;

4489 4490
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
	    "Entered %s.\n", __func__);
4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529

	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Write the MBC data to the registers */
	WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
	WRT_REG_WORD(&reg->mailbox1, mb[0]);
	WRT_REG_WORD(&reg->mailbox2, mb[1]);
	WRT_REG_WORD(&reg->mailbox3, mb[2]);
	WRT_REG_WORD(&reg->mailbox4, mb[3]);

	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);

	/* Poll for MBC interrupt */
	for (timer = 6000000; timer; timer--) {
		/* Check for pending interrupts. */
		stat = RD_REG_DWORD(&reg->host_status);
		if (stat & HSRX_RISC_INT) {
			stat &= 0xff;

			if (stat == 0x1 || stat == 0x2 ||
			    stat == 0x10 || stat == 0x11) {
				set_bit(MBX_INTERRUPT,
				    &ha->mbx_cmd_flags);
				mb0 = RD_REG_WORD(&reg->mailbox0);
				WRT_REG_DWORD(&reg->hccr,
				    HCCRX_CLR_RISC_INT);
				RD_REG_DWORD(&reg->hccr);
				break;
			}
		}
		udelay(5);
	}

	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
		rval = mb0 & MBS_MASK;
	else
		rval = QLA_FUNCTION_FAILED;

	if (rval != QLA_SUCCESS) {
4530 4531
		ql_dbg(ql_dbg_mbx, vha, 0x1104,
		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4532
	} else {
4533 4534
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
		    "Done %s.\n", __func__);
4535 4536 4537 4538
	}

	return rval;
}
4539

4540 4541 4542 4543 4544 4545 4546 4547
int
qla2x00_get_data_rate(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4548 4549
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
	    "Entered %s.\n", __func__);
4550

4551 4552 4553 4554 4555 4556 4557
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_DATA_RATE;
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4558
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4559
		mcp->in_mb |= MBX_3;
4560 4561 4562 4563
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4564 4565
		ql_dbg(ql_dbg_mbx, vha, 0x1107,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4566
	} else {
4567 4568
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
		    "Done %s.\n", __func__);
4569 4570 4571 4572 4573 4574
		if (mcp->mb[1] != 0x7)
			ha->link_data_rate = mcp->mb[1];
	}

	return rval;
}
S
Sarang Radke 已提交
4575

4576 4577 4578 4579 4580 4581 4582 4583
int
qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4584 4585
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
	    "Entered %s.\n", __func__);
4586

4587 4588
	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
	    !IS_QLA27XX(ha))
4589 4590 4591 4592 4593 4594 4595 4596 4597 4598
		return QLA_FUNCTION_FAILED;
	mcp->mb[0] = MBC_GET_PORT_CONFIG;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4599 4600
		ql_dbg(ql_dbg_mbx, vha, 0x110a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4601 4602 4603 4604
	} else {
		/* Copy all bits to preserve original value */
		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);

4605 4606
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
		    "Done %s.\n", __func__);
4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617
	}
	return rval;
}

int
qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4618 4619
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
	    "Entered %s.\n", __func__);
4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630

	mcp->mb[0] = MBC_SET_PORT_CONFIG;
	/* Copy all bits to preserve original setting */
	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4631 4632
		ql_dbg(ql_dbg_mbx, vha, 0x110d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4633
	} else
4634 4635
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
		    "Done %s.\n", __func__);
4636 4637 4638 4639 4640

	return rval;
}


S
Sarang Radke 已提交
4641 4642 4643 4644 4645 4646 4647 4648 4649
int
qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
		uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4650 4651
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
	    "Entered %s.\n", __func__);
4652

S
Sarang Radke 已提交
4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676
	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	if (ha->flags.fcp_prio_enabled)
		mcp->mb[2] = BIT_1;
	else
		mcp->mb[2] = BIT_2;
	mcp->mb[4] = priority & 0xf;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
		mb[4] = mcp->mb[4];
	}

	if (rval != QLA_SUCCESS) {
4677
		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
S
Sarang Radke 已提交
4678
	} else {
4679 4680
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
		    "Done %s.\n", __func__);
S
Sarang Radke 已提交
4681 4682 4683 4684
	}

	return rval;
}
4685

4686
int
4687
qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4688
{
4689
	int rval = QLA_FUNCTION_FAILED;
4690
	struct qla_hw_data *ha = vha->hw;
4691
	uint8_t byte;
4692

4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716
	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
		ql_dbg(ql_dbg_mbx, vha, 0x1150,
		    "Thermal not supported by this card.\n");
		return rval;
	}

	if (IS_QLA25XX(ha)) {
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
		    ha->pdev->subsystem_device == 0x0175) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_13|BIT_0);
			*temp = byte;
			return rval;
		}
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
		    ha->pdev->subsystem_device == 0x338e) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
			*temp = byte;
			return rval;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x10c9,
		    "Thermal not supported by this card.\n");
		return rval;
4717 4718
	}

4719 4720 4721 4722 4723 4724 4725 4726
	if (IS_QLA82XX(ha)) {
		*temp = qla82xx_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
	} else if (IS_QLA8044(ha)) {
		*temp = qla8044_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
4727 4728
	}

4729
	rval = qla2x00_read_asic_temperature(vha, temp);
4730 4731 4732
	return rval;
}

4733 4734 4735 4736 4737 4738 4739 4740
int
qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4741 4742
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
	    "Entered %s.\n", __func__);
4743

4744 4745 4746 4747
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
4748
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4749 4750 4751 4752 4753 4754 4755 4756 4757
	mcp->mb[1] = 1;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4758 4759
		ql_dbg(ql_dbg_mbx, vha, 0x1016,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4760
	} else {
4761 4762
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
		    "Done %s.\n", __func__);
4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775
	}

	return rval;
}

int
qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4776 4777
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
	    "Entered %s.\n", __func__);
4778

4779
	if (!IS_P3P_TYPE(ha))
4780 4781 4782
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
4783
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4784 4785 4786 4787 4788 4789 4790 4791 4792
	mcp->mb[1] = 0;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
4793 4794
		ql_dbg(ql_dbg_mbx, vha, 0x100c,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4795
	} else {
4796 4797
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
		    "Done %s.\n", __func__);
4798 4799 4800 4801
	}

	return rval;
}
4802 4803 4804 4805 4806 4807 4808 4809 4810

int
qla82xx_md_get_template_size(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

4811 4812
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
	    "Entered %s.\n", __func__);
4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);

	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Always copy back return mailbox values. */
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1120,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    (mcp->mb[1] << 16) | mcp->mb[0],
		    (mcp->mb[3] << 16) | mcp->mb[2]);
	} else {
4835 4836
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
		    "Done %s.\n", __func__);
4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854
		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
		if (!ha->md_template_size) {
			ql_dbg(ql_dbg_mbx, vha, 0x1122,
			    "Null template size obtained.\n");
			rval = QLA_FUNCTION_FAILED;
		}
	}
	return rval;
}

int
qla82xx_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

4855 4856
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
	    "Entered %s.\n", __func__);
4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0x1124,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT);
	mcp->mb[3] = MSW(RQST_TMPLT);
	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[8] = LSW(ha->md_template_size);
	mcp->mb[9] = MSW(ha->md_template_size);

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1125,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    ((mcp->mb[1] << 16) | mcp->mb[0]),
		    ((mcp->mb[3] << 16) | mcp->mb[2]));
	} else
4891 4892
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
		    "Done %s.\n", __func__);
4893 4894
	return rval;
}
4895

4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949
int
qla8044_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;
	int offset = 0, size = MINIDUMP_SIZE_36K;
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
	    "Entered %s.\n", __func__);

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0xb11b,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	while (offset < ha->md_template_size) {
		mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[2] = LSW(RQST_TMPLT);
		mcp->mb[3] = MSW(RQST_TMPLT);
		mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[8] = LSW(size);
		mcp->mb[9] = MSW(size);
		mcp->mb[10] = offset & 0x0000FFFF;
		mcp->mb[11] = offset & 0xFFFF0000;
		mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
		mcp->tov = MBX_TOV_SECONDS;
		mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
			MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
		mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
		rval = qla2x00_mailbox_command(vha, mcp);

		if (rval != QLA_SUCCESS) {
			ql_dbg(ql_dbg_mbx, vha, 0xb11c,
				"mailbox command FAILED=0x%x, subcode=%x.\n",
				((mcp->mb[1] << 16) | mcp->mb[0]),
				((mcp->mb[3] << 16) | mcp->mb[2]));
			return rval;
		} else
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
				"Done %s.\n", __func__);
		offset = offset + size;
	}
	return rval;
}

4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960
int
qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

4961 4962
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
	    "Entered %s.\n", __func__);
4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	mcp->mb[1] = led_cfg[0];
	mcp->mb[2] = led_cfg[1];
	if (IS_QLA8031(ha)) {
		mcp->mb[3] = led_cfg[2];
		mcp->mb[4] = led_cfg[3];
		mcp->mb[5] = led_cfg[4];
		mcp->mb[6] = led_cfg[5];
	}

	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->in_mb = MBX_0;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1134,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4987 4988
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
		    "Done %s.\n", __func__);
4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004
	}

	return rval;
}

int
qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

5005 5006
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
	    "Entered %s.\n", __func__);
5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_GET_LED_CONFIG;

	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->tov = 30;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1137,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		led_cfg[0] = mcp->mb[1];
		led_cfg[1] = mcp->mb[2];
		if (IS_QLA8031(ha)) {
			led_cfg[2] = mcp->mb[3];
			led_cfg[3] = mcp->mb[4];
			led_cfg[4] = mcp->mb[5];
			led_cfg[5] = mcp->mb[6];
		}
5031 5032
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
		    "Done %s.\n", __func__);
5033 5034 5035 5036 5037
	}

	return rval;
}

5038 5039 5040 5041 5042 5043 5044 5045
int
qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5046
	if (!IS_P3P_TYPE(ha))
5047 5048
		return QLA_FUNCTION_FAILED;

5049
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060
		"Entered %s.\n", __func__);

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	if (enable)
		mcp->mb[7] = 0xE;
	else
		mcp->mb[7] = 0xD;

	mcp->out_mb = MBX_7|MBX_0;
	mcp->in_mb = MBX_0;
5061
	mcp->tov = MBX_TOV_SECONDS;
5062 5063 5064 5065 5066 5067 5068
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1128,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
5069
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5070 5071 5072 5073 5074
		    "Done %s.\n", __func__);
	}

	return rval;
}
5075 5076

int
5077
qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5078 5079 5080 5081 5082 5083
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5084
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5085 5086
		return QLA_FUNCTION_FAILED;

5087 5088
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
	    "Entered %s.\n", __func__);
5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105

	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->mb[3] = LSW(data);
	mcp->mb[4] = MSW(data);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1131,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
5106
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5107 5108
		    "Done %s.\n", __func__);
	}
5109

5110 5111
	return rval;
}
5112 5113 5114 5115 5116 5117 5118 5119 5120 5121

int
qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5122
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5123 5124 5125 5126 5127
		    "Implicit LOGO Unsupported.\n");
		return QLA_FUNCTION_FAILED;
	}


5128 5129
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
	    "Entering %s.\n",  __func__);
5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143

	/* Perform Implicit LOGO. */
	mcp->mb[0] = MBC_PORT_LOGOUT;
	mcp->mb[1] = fcport->loop_id;
	mcp->mb[10] = BIT_15;
	mcp->out_mb = MBX_10|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS)
		ql_dbg(ql_dbg_mbx, vha, 0x113d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	else
5144 5145
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
		    "Done %s.\n", __func__);
5146 5147 5148 5149

	return rval;
}

5150 5151 5152 5153 5154 5155 5156 5157 5158
int
qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;
	unsigned long retry_max_time = jiffies + (2 * HZ);

5159
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);

retry_rd_reg:
	mcp->mb[0] = MBC_READ_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114c,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
	} else {
		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
		if (*data == QLA8XXX_BAD_VALUE) {
			/*
			 * During soft-reset CAMRAM register reads might
			 * return 0xbad0bad0. So retry for MAX of 2 sec
			 * while reading camram registers.
			 */
			if (time_after(jiffies, retry_max_time)) {
				ql_dbg(ql_dbg_mbx, vha, 0x1141,
				    "Failure to read CAMRAM register. "
				    "data=0x%x.\n", *data);
				return QLA_FUNCTION_FAILED;
			}
			msleep(100);
			goto retry_rd_reg;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA83XX(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1144,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint8_t subcode = (uint8_t)options;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
	mcp->mb[1] = options;
	mcp->out_mb = MBX_1|MBX_0;
	if (subcode & BIT_2) {
		mcp->mb[2] = LSW(start_addr);
		mcp->mb[3] = MSW(start_addr);
		mcp->mb[4] = LSW(end_addr);
		mcp->mb[5] = MSW(end_addr);
		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
	}
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (!(subcode & (BIT_2 | BIT_5)))
		mcp->in_mb |= MBX_4|MBX_3;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1147,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
		    mcp->mb[4]);
		ha->isp_ops->fw_dump(vha, 0);
	} else {
		if (subcode & BIT_5)
			*sector_size = mcp->mb[1];
		else if (subcode & (BIT_6 | BIT_7)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1148,
			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		} else if (subcode & (BIT_3 | BIT_4)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1149,
			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		}
		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
	}

	return rval;
}
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int
qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
	uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_MCTP_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[4] = MSW(size);
	mcp->mb[5] = LSW(size);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->mb[8] = MSW(addr);
	/* Setting RAM ID to valid */
	mcp->mb[10] |= BIT_7;
	/* For MCTP RAM ID is 0x40 */
	mcp->mb[10] |= 0x40;

	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
	    MBX_0;

	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114e,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
		    "Done %s.\n", __func__);
	}

	return rval;
}